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Merge tag 'driver-core-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-block.git] / arch / arm64 / boot / dts / qcom / sc7280-qcard.dtsi
CommitLineData
116f7cc4
DA		 1// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
2/*
3 * sc7280 Qcard device tree source
4 *
5 * Qcard PCB has the processor, RAM, eMMC (if stuffed), and eDP connector (if
6 * stuffed) on it. This device tree tries to encapsulate all the things that
7 * all boards using Qcard will have in common. Given that there are stuffing
8 * options, some things may be left with status "disabled" and enabled in
9 * the actual board device tree files.
10 *
11 * Copyright 2022 Google LLC.
12 */
13
14#include <dt-bindings/iio/qcom,spmi-adc7-pmk8350.h>
15#include <dt-bindings/iio/qcom,spmi-adc7-pmr735a.h>
16#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>
17#include <dt-bindings/regulator/qcom,rpmh-regulator.h>
18
19#include "sc7280.dtsi"
20
21/* PMICs depend on spmi_bus label and so must come after SoC */
22#include "pm7325.dtsi"
23#include "pm8350c.dtsi"
24#include "pmk8350.dtsi"
25
26/ {
27 aliases {
28 bluetooth0 = &bluetooth;
29 serial0 = &uart5;
30 serial1 = &uart7;
31 };
366a0a19
DA		 32
33 pm8350c_pwm_backlight: backlight {
34 compatible = "pwm-backlight";
35 status = "disabled";
36
37 enable-gpios = <&pm8350c_gpios 7 GPIO_ACTIVE_HIGH>;
38 pinctrl-names = "default";
39 pinctrl-0 = <&pmic_edp_bl_en>;
40 pwms = <&pm8350c_pwm 3 65535>;
41 };
116f7cc4
DA		 42};
43
44&apps_rsc {
45 /*
46 * Regulators are given labels corresponding to the various names
47 * they are referred to on schematics. They are also given labels
48 * corresponding to named voltage inputs on the SoC or components
49 * bundled with the SoC (like radio companion chips). We totally
50 * ignore it when one regulator is the input to another regulator.
51 * That's handled automatically by the initial config given to
52 * RPMH by the firmware.
53 *
54 * Regulators that the HLOS (High Level OS) doesn't touch at all
55 * are left out of here since they are managed elsewhere.
56 */
57
58 pm7325-regulators {
59 compatible = "qcom,pm7325-rpmh-regulators";
60 qcom,pmic-id = "b";
61
62 vdd19_pmu_pcie_i:
63 vdd19_pmu_rfa_i:
64 vreg_s1b_1p856: smps1 {
65 regulator-min-microvolt = <1856000>;
66 regulator-max-microvolt = <2040000>;
67 };
68
69 vdd_pmu_aon_i:
70 vdd09_pmu_rfa_i:
71 vdd095_mx_pmu:
72 vdd095_pmu:
73 vreg_s7b_0p952: smps7 {
74 regulator-min-microvolt = <535000>;
75 regulator-max-microvolt = <1120000>;
76 };
77
78 vdd13_pmu_rfa_i:
79 vdd13_pmu_pcie_i:
80 vreg_s8b_1p256: smps8 {
81 regulator-min-microvolt = <1256000>;
82 regulator-max-microvolt = <1500000>;
83 };
84
85 vdd_a_usbssdp_0_core:
86 vreg_l1b_0p912: ldo1 {
87 regulator-min-microvolt = <825000>;
88 regulator-max-microvolt = <925000>;
89 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
90 };
91
92 vdd_a_usbhs_3p1:
93 vreg_l2b_3p072: ldo2 {
94 regulator-min-microvolt = <2700000>;
95 regulator-max-microvolt = <3544000>;
96 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
97 };
98
99 vdd_a_csi_0_1_1p2:
100 vdd_a_csi_2_3_1p2:
101 vdd_a_csi_4_1p2:
102 vdd_a_dsi_0_1p2:
103 vdd_a_edp_0_1p2:
104 vdd_a_qlink_0_1p2:
105 vdd_a_qlink_1_1p2:
106 vdd_a_pcie_0_1p2:
107 vdd_a_pcie_1_1p2:
108 vdd_a_ufs_0_1p2:
109 vdd_a_usbssdp_0_1p2:
110 vreg_l6b_1p2: ldo6 {
111 regulator-min-microvolt = <1140000>;
112 regulator-max-microvolt = <1260000>;
113 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
114 };
115
116 /*
117 * Despite the fact that this is named to be 2.5V on the
118 * schematic, it powers eMMC which doesn't accept 2.5V
119 */
120 vreg_l7b_2p5: ldo7 {
121 regulator-min-microvolt = <2960000>;
122 regulator-max-microvolt = <2960000>;
123 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
124 };
125
126 vdd_px_wcd9385:
127 vdd_txrx:
128 vddpx_0:
129 vddpx_3:
130 vddpx_7:
131 vreg_l18b_1p8: ldo18 {
132 regulator-min-microvolt = <1800000>;
133 regulator-max-microvolt = <2000000>;
134 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
135 };
136
137 vdd_1p8:
138 vdd_px_sdr735:
139 vdd_pxm:
140 vdd18_io:
141 vddio_px_1:
142 vddio_px_2:
143 vddio_px_3:
144 vddpx_ts:
145 vddpx_wl4otp:
146 vreg_l19b_1p8: ldo19 {
147 regulator-min-microvolt = <1800000>;
148 regulator-max-microvolt = <1800000>;
149 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
150 };
151 };
152
153 pm8350c-regulators {
154 compatible = "qcom,pm8350c-rpmh-regulators";
155 qcom,pmic-id = "c";
156
157 vdd22_wlbtpa_ch0:
158 vdd22_wlbtpa_ch1:
159 vdd22_wlbtppa_ch0:
160 vdd22_wlbtppa_ch1:
161 vdd22_wlpa5g_ch0:
162 vdd22_wlpa5g_ch1:
163 vdd22_wlppa5g_ch0:
164 vdd22_wlppa5g_ch1:
165 vreg_s1c_2p2: smps1 {
166 regulator-min-microvolt = <2190000>;
167 regulator-max-microvolt = <2210000>;
168 };
169
170 lp4_vdd2_1p052:
171 vreg_s9c_0p676: smps9 {
172 regulator-min-microvolt = <1010000>;
173 regulator-max-microvolt = <1170000>;
174 };
175
176 vdda_apc_cs_1p8:
177 vdda_gfx_cs_1p8:
178 vdda_turing_q6_cs_1p8:
179 vdd_a_cxo_1p8:
180 vdd_a_qrefs_1p8:
181 vdd_a_usbhs_1p8:
182 vdd_qfprom:
183 vreg_l1c_1p8: ldo1 {
184 regulator-min-microvolt = <1800000>;
185 regulator-max-microvolt = <1980000>;
186 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
187 };
188
189 vreg_l2c_1p8: ldo2 {
190 regulator-min-microvolt = <1620000>;
191 regulator-max-microvolt = <1980000>;
192 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
193 };
194
195 vreg_l3c_3p0: ldo3 {
196 regulator-min-microvolt = <2800000>;
197 regulator-max-microvolt = <3540000>;
198 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
199 };
200
201 vddpx_5:
202 vreg_l4c_1p8_3p0: ldo4 {
203 regulator-min-microvolt = <1620000>;
204 regulator-max-microvolt = <3300000>;
205 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
206 };
207
208 vddpx_6:
209 vreg_l5c_1p8_3p0: ldo5 {
210 regulator-min-microvolt = <1620000>;
211 regulator-max-microvolt = <3300000>;
212 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
213 };
214
215 vddpx_2:
216 vreg_l6c_2p96: ldo6 {
217 regulator-min-microvolt = <1800000>;
218 regulator-max-microvolt = <2950000>;
219 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
220 };
221
222 vreg_l7c_3p0: ldo7 {
223 regulator-min-microvolt = <3000000>;
224 regulator-max-microvolt = <3544000>;
225 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
226 };
227
228 vreg_l8c_1p8: ldo8 {
229 regulator-min-microvolt = <1620000>;
230 regulator-max-microvolt = <2000000>;
231 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
232 };
233
234 vreg_l9c_2p96: ldo9 {
235 regulator-min-microvolt = <2960000>;
236 regulator-max-microvolt = <2960000>;
237 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
238 };
239
240 vdd_a_csi_0_1_0p9:
241 vdd_a_csi_2_3_0p9:
242 vdd_a_csi_4_0p9:
243 vdd_a_dsi_0_0p9:
244 vdd_a_dsi_0_pll_0p9:
245 vdd_a_edp_0_0p9:
246 vdd_a_gnss_0p9:
247 vdd_a_pcie_0_core:
248 vdd_a_pcie_1_core:
249 vdd_a_qlink_0_0p9:
250 vdd_a_qlink_0_0p9_ck:
251 vdd_a_qlink_1_0p9:
252 vdd_a_qlink_1_0p9_ck:
253 vdd_a_qrefs_0p875_0:
254 vdd_a_qrefs_0p875_1:
255 vdd_a_qrefs_0p875_2:
256 vdd_a_qrefs_0p875_3:
257 vdd_a_qrefs_0p875_4_5:
258 vdd_a_qrefs_0p875_6:
259 vdd_a_qrefs_0p875_7:
260 vdd_a_qrefs_0p875_8:
261 vdd_a_qrefs_0p875_9:
262 vdd_a_ufs_0_core:
263 vdd_a_usbhs_core:
264 vreg_l10c_0p88: ldo10 {
265 regulator-min-microvolt = <720000>;
266 regulator-max-microvolt = <1050000>;
267 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
268 };
269
270 vreg_l11c_2p8: ldo11 {
271 regulator-min-microvolt = <2800000>;
272 regulator-max-microvolt = <3544000>;
273 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
274 };
275
276 vreg_l12c_1p8: ldo12 {
277 regulator-min-microvolt = <1650000>;
278 regulator-max-microvolt = <2000000>;
279 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
280 };
281
282 vreg_l13c_3p0: ldo13 {
283 regulator-min-microvolt = <2700000>;
284 regulator-max-microvolt = <3544000>;
285 regulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;
286 };
287
288 vdd_flash:
289 vdd_iris_rgb:
290 vdd_mic_bias:
291 vreg_bob: bob {
292 regulator-min-microvolt = <3008000>;
293 regulator-max-microvolt = <3960000>;
294 regulator-initial-mode = <RPMH_REGULATOR_MODE_AUTO>;
295 };
296 };
297};
298
299/* ADDITIONS TO NODES DEFINED IN PARENT DEVICE TREE FILES */
300
301&ipa {
302 status = "okay";
303 modem-init;
304};
305
366a0a19
DA		 306/* NOTE: Not all Qcards have eDP connector stuffed */
307&mdss_edp {
308 vdda-0p9-supply = <&vdd_a_edp_0_0p9>;
309 vdda-1p2-supply = <&vdd_a_edp_0_1p2>;
310
311 aux-bus {
312 edp_panel: panel {
313 compatible = "edp-panel";
314
315 backlight = <&pm8350c_pwm_backlight>;
316
317 ports {
318 #address-cells = <1>;
319 #size-cells = <0>;
320 port@0 {
321 reg = <0>;
322 edp_panel_in: endpoint {
323 remote-endpoint = <&mdss_edp_out>;
324 };
325 };
326 };
327 };
328 };
329};
330
331&mdss_edp_out {
332 remote-endpoint = <&edp_panel_in>;
333};
334
335&mdss_edp_phy {
336 vdda-pll-supply = <&vdd_a_edp_0_0p9>;
337 vdda-phy-supply = <&vdd_a_edp_0_1p2>;
338};
339
116f7cc4
DA		 340&pcie1_phy {
341 vdda-phy-supply = <&vreg_l10c_0p88>;
342 vdda-pll-supply = <&vreg_l6b_1p2>;
343};
344
366a0a19
DA		 345&pm8350c_pwm {
346 pinctrl-names = "default";
347 pinctrl-0 = <&pmic_edp_bl_pwm>;
348};
349
116f7cc4
DA		 350&pmk8350_vadc {
351 pmk8350-die-temp@3 {
352 reg = <PMK8350_ADC7_DIE_TEMP>;
353 label = "pmk8350_die_temp";
354 qcom,pre-scaling = <1 1>;
355 };
356
357 pmr735a-die-temp@403 {
358 reg = <PMR735A_ADC7_DIE_TEMP>;
359 label = "pmr735a_die_temp";
360 qcom,pre-scaling = <1 1>;
361 };
362};
363
364&qfprom {
365 vcc-supply = <&vdd_qfprom>;
366};
367
368/* For eMMC. NOTE: not all Qcards have eMMC stuffed */
369&sdhc_1 {
370 vmmc-supply = <&vreg_l7b_2p5>;
371 vqmmc-supply = <&vreg_l19b_1p8>;
372
373 non-removable;
374 no-sd;
375 no-sdio;
376};
377
378uart_dbg: &uart5 {
379 compatible = "qcom,geni-debug-uart";
380 status = "okay";
381};
382
383mos_bt_uart: &uart7 {
384 status = "okay";
385
386 /delete-property/ interrupts;
387 interrupts-extended = <&intc GIC_SPI 608 IRQ_TYPE_LEVEL_HIGH>,
388 <&tlmm 31 IRQ_TYPE_EDGE_FALLING>;
389 pinctrl-names = "default", "sleep";
390 pinctrl-1 = <&qup_uart7_sleep_cts>, <&qup_uart7_sleep_rts>, <&qup_uart7_sleep_tx>, <&qup_uart7_sleep_rx>;
391
392 bluetooth: bluetooth {
393 compatible = "qcom,wcn6750-bt";
394 pinctrl-names = "default";
395 pinctrl-0 = <&mos_bt_en>;
396 enable-gpios = <&tlmm 85 GPIO_ACTIVE_HIGH>;
397 swctrl-gpios = <&tlmm 86 GPIO_ACTIVE_HIGH>;
398 vddaon-supply = <&vreg_s7b_0p952>;
399 vddbtcxmx-supply = <&vreg_s7b_0p952>;
400 vddrfacmn-supply = <&vreg_s7b_0p952>;
401 vddrfa0p8-supply = <&vreg_s7b_0p952>;
402 vddrfa1p7-supply = <&vdd19_pmu_rfa_i>;
403 vddrfa1p2-supply = <&vdd13_pmu_rfa_i>;
404 vddrfa2p2-supply = <&vreg_s1c_2p2>;
405 vddasd-supply = <&vreg_l11c_2p8>;
406 vddio-supply = <&vreg_l18b_1p8>;
407 max-speed = <3200000>;
408 };
409};
410
411&usb_1_hsphy {
412 vdda-pll-supply = <&vdd_a_usbhs_core>;
413 vdda33-supply = <&vdd_a_usbhs_3p1>;
414 vdda18-supply = <&vdd_a_usbhs_1p8>;
415};
416
417&usb_1_qmpphy {
418 vdda-phy-supply = <&vdd_a_usbssdp_0_1p2>;
419 vdda-pll-supply = <&vdd_a_usbssdp_0_core>;
420};
421
422&usb_2_hsphy {
423 vdda-pll-supply = <&vdd_a_usbhs_core>;
424 vdda33-supply = <&vdd_a_usbhs_3p1>;
425 vdda18-supply = <&vdd_a_usbhs_1p8>;
426};
427
428/*
429 * PINCTRL - ADDITIONS TO NODES IN PARENT DEVICE TREE FILES
430 *
431 * NOTE: In general if pins leave the Qcard then the pinctrl goes in the
432 * baseboard or board device tree, not here.
433 */
434
366a0a19
DA		 435/* No external pull for eDP HPD, so set the internal one. */
436&edp_hot_plug_det {
437 bias-pull-down;
438};
439
116f7cc4
DA		 440/*
441 * For ts_i2c
442 *
443 * Technically this i2c bus actually leaves the Qcard, but it leaves directly
444 * via the eDP connector (it doesn't hit the baseboard). The external pulls
445 * are on Qcard.
446 */
447&qup_i2c13_data_clk {
448 /* Has external pull */
449 bias-disable;
450 drive-strength = <2>;
451};
452
453/* For mos_bt_uart */
454&qup_uart7_cts {
3d0e375b
VKN		 455 /*
456 * Configure a bias-bus-hold on CTS to lower power
457 * usage when Bluetooth is turned off. Bus hold will
458 * maintain a low power state regardless of whether
459 * the Bluetooth module drives the pin in either
460 * direction or leaves the pin fully unpowered.
461 */
462 bias-bus-hold;
116f7cc4
DA		 463};
464
465/* For mos_bt_uart */
466&qup_uart7_rts {
467 /* We'll drive RTS, so no pull */
468 bias-disable;
469 drive-strength = <2>;
470};
471
472/* For mos_bt_uart */
473&qup_uart7_tx {
474 /* We'll drive TX, so no pull */
475 bias-disable;
476 drive-strength = <2>;
477};
478
479/* For mos_bt_uart */
480&qup_uart7_rx {
481 /*
482 * Configure a pull-up on RX. This is needed to avoid
483 * garbage data when the TX pin of the Bluetooth module is
484 * in tri-state (module powered off or not driving the
485 * signal yet).
486 */
487 bias-pull-up;
488};
489
490/* eMMC, if stuffed, is straight on the Qcard */
491&sdc1_clk {
492 bias-disable;
493 drive-strength = <16>;
494};
495
496&sdc1_cmd {
497 bias-pull-up;
498 drive-strength = <10>;
499};
500
501&sdc1_data {
502 bias-pull-up;
503 drive-strength = <10>;
504};
505
506&sdc1_rclk {
507 bias-pull-down;
508};
509
510/*
511 * PINCTRL - QCARD
512 *
513 * This has entries that are defined by Qcard even if they go to the main
514 * board. In cases where the pulls may be board dependent we defer those
515 * settings to the board device tree. Drive strengths tend to be assinged here
516 * but could conceivably be overwridden by board device trees.
517 */
518
519&pm8350c_gpios {
520 pmic_edp_bl_en: pmic-edp-bl-en {
521 pins = "gpio7";
522 function = "normal";
523 bias-disable;
524 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
525
526 /* Force backlight to be disabled to match state at boot. */
527 output-low;
528 };
529
530 pmic_edp_bl_pwm: pmic-edp-bl-pwm {
531 pins = "gpio8";
532 function = "func1";
533 bias-disable;
534 qcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;
535 output-low;
536 power-source = <0>;
537 };
538};
539
540&tlmm {
541 mos_bt_en: mos-bt-en {
542 pins = "gpio85";
543 function = "gpio";
544 drive-strength = <2>;
545 output-low;
546 };
547
548 /* For mos_bt_uart */
549 qup_uart7_sleep_cts: qup-uart7-sleep-cts {
550 pins = "gpio28";
551 function = "gpio";
552 /*
3d0e375b
VKN		 553 * Configure a bias-bus-hold on CTS to lower power
554 * usage when Bluetooth is turned off. Bus hold will
555 * maintain a low power state regardless of whether
556 * the Bluetooth module drives the pin in either
557 * direction or leaves the pin fully unpowered.
116f7cc4 558 */
3d0e375b 559 bias-bus-hold;
116f7cc4
DA		 560 };
561
562 /* For mos_bt_uart */
563 qup_uart7_sleep_rts: qup-uart7-sleep-rts {
564 pins = "gpio29";
565 function = "gpio";
566 /*
567 * Configure pull-down on RTS. As RTS is active low
568 * signal, pull it low to indicate the BT SoC that it
569 * can wakeup the system anytime from suspend state by
570 * pulling RX low (by sending wakeup bytes).
571 */
572 bias-pull-down;
573 };
574
575 /* For mos_bt_uart */
576 qup_uart7_sleep_rx: qup-uart7-sleep-rx {
577 pins = "gpio31";
578 function = "gpio";
579 /*
580 * Configure a pull-up on RX. This is needed to avoid
581 * garbage data when the TX pin of the Bluetooth module
582 * is floating which may cause spurious wakeups.
583 */
584 bias-pull-up;
585 };
586
587 /* For mos_bt_uart */
588 qup_uart7_sleep_tx: qup-uart7-sleep-tx {
589 pins = "gpio30";
590 function = "gpio";
591 /*
592 * Configure pull-up on TX when it isn't actively driven
593 * to prevent BT SoC from receiving garbage during sleep.
594 */
595 bias-pull-up;
596 };
597
598 ts_int_conn: ts-int-conn {
599 pins = "gpio55";
600 function = "gpio";
601 bias-pull-up;
602 };
603
604 ts_rst_conn: ts-rst-conn {
605 pins = "gpio54";
606 function = "gpio";
607 bias-pull-up;
608 drive-strength = <2>;
609 };
610};
Linux 6.x block layer and io_uring tree(s)