Documentation: tee subsystem and op-tee driver
[linux-2.6-block.git] / arch / arm64 / boot / dts / hisilicon / hi6220-hikey.dts
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1/*
2 * dts file for Hisilicon HiKey Development Board
3 *
4 * Copyright (C) 2015, Hisilicon Ltd.
5 *
6 */
7
8/dts-v1/;
86e8f528 9#include "hi6220.dtsi"
379e9bf5 10#include "hikey-pinctrl.dtsi"
a817137a 11#include <dt-bindings/gpio/gpio.h>
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12
13/ {
14 model = "HiKey Development Board";
15 compatible = "hisilicon,hi6220-hikey", "hisilicon,hi6220";
16
17 aliases {
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TB
18 serial0 = &uart0; /* On board UART0 */
19 serial1 = &uart1; /* BT UART */
20 serial2 = &uart2; /* LS Expansion UART0 */
21 serial3 = &uart3; /* LS Expansion UART1 */
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22 };
23
24 chosen {
a362ec8f 25 stdout-path = "serial3:115200n8";
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26 };
27
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LY
28 /*
29 * Reserve below regions from memory node:
30 *
31 * 0x05e0,0000 - 0x05ef,ffff: MCU firmware runtime using
330fd87c 32 * 0x05f0,1000 - 0x05f0,1fff: Reboot reason
6da3aba6
LY
33 * 0x06df,f000 - 0x06df,ffff: Mailbox message data
34 * 0x0740,f000 - 0x0740,ffff: MCU firmware section
813a7315 35 * 0x21f0,0000 - 0x21ff,ffff: pstore/ramoops buffer
6da3aba6
LY
36 * 0x3e00,0000 - 0x3fff,ffff: OP-TEE
37 */
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BW
38 memory@0 {
39 device_type = "memory";
6da3aba6 40 reg = <0x00000000 0x00000000 0x00000000 0x05e00000>,
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JS
41 <0x00000000 0x05f00000 0x00000000 0x00001000>,
42 <0x00000000 0x05f02000 0x00000000 0x00efd000>,
6da3aba6 43 <0x00000000 0x06e00000 0x00000000 0x0060f000>,
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JS
44 <0x00000000 0x07410000 0x00000000 0x1aaf0000>,
45 <0x00000000 0x22000000 0x00000000 0x1c000000>;
86e8f528 46 };
60dac1b1 47
813a7315
JS
48 reserved-memory {
49 #address-cells = <2>;
50 #size-cells = <2>;
51 ranges;
52
53 ramoops@0x21f00000 {
54 compatible = "ramoops";
55 reg = <0x0 0x21f00000 0x0 0x00100000>;
56 record-size = <0x00020000>;
57 console-size = <0x00020000>;
58 ftrace-size = <0x00020000>;
59 };
813a7315 60
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GX
61 /* global autoconfigured region for contiguous allocations */
62 linux,cma {
63 compatible = "shared-dma-pool";
64 reusable;
65 size = <0x00000000 0x08000000>;
66 linux,cma-default;
67 };
68 };
813a7315 69
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JS
70 reboot-mode-syscon@5f01000 {
71 compatible = "syscon", "simple-mfd";
72 reg = <0x0 0x05f01000 0x0 0x00001000>;
73
74 reboot-mode {
75 compatible = "syscon-reboot-mode";
76 offset = <0x0>;
77
78 mode-normal = <0x77665501>;
79 mode-bootloader = <0x77665500>;
80 mode-recovery = <0x77665502>;
81 };
82 };
83
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ZK
84 soc {
85 spi0: spi@f7106000 {
86 status = "ok";
87 };
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GX
88
89 i2c0: i2c@f7100000 {
90 status = "ok";
91 };
92
93 i2c1: i2c@f7101000 {
94 status = "ok";
95 };
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GX
96
97 uart1: uart@f7111000 {
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98 assigned-clocks = <&sys_ctrl HI6220_UART1_SRC>;
99 assigned-clock-rates = <150000000>;
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100 status = "ok";
101 };
102
103 uart2: uart@f7112000 {
104 status = "ok";
105 };
106
107 uart3: uart@f7113000 {
108 status = "ok";
109 };
841478d4 110
bbaf867e
LW
111 /*
112 * Legend: proper name = the GPIO line is used as GPIO
113 * NC = not connected (not routed from the SoC)
114 * "[PER]" = pin is muxed for peripheral (not GPIO)
115 * "" = no idea, schematic doesn't say, could be
116 * unrouted (not connected to any external pin)
117 * LSEC = Low Speed External Connector
118 * HSEC = High Speed External Connector
119 *
120 * Pin assignments taken from LeMaker and CircuitCo Schematics
121 * Rev A1.
122 *
123 * For the lines routed to the external connectors the
124 * lines are named after the 96Boards CE Specification 1.0,
125 * Appendix "Expansion Connector Signal Description".
126 *
127 * When the 96Board naming of a line and the schematic name of
128 * the same line are in conflict, the 96Board specification
129 * takes precedence, which means that the external UART on the
130 * LSEC is named UART0 while the schematic and SoC names this
131 * UART2. This is only for the informational lines i.e. "[FOO]",
132 * the GPIO named lines "GPIO-A" thru "GPIO-L" are the only
133 * ones actually used for GPIO.
134 */
135 gpio0: gpio@f8011000 {
136 gpio-line-names = "PWR_HOLD", "DSI_SEL",
137 "USB_HUB_RESET_N", "USB_SEL", "HDMI_PD", "WL_REG_ON",
138 "PWRON_DET", "5V_HUB_EN";
139 };
140
141 gpio1: gpio@f8012000 {
142 gpio-line-names = "SD_DET", "HDMI_INT", "PMU_IRQ_N",
143 "WL_HOST_WAKE", "NC", "NC", "NC", "BT_REG_ON";
144 };
145
146 gpio2: gpio@f8013000 {
147 gpio-line-names =
148 "GPIO-A", /* LSEC Pin 23: GPIO2_0 */
149 "GPIO-B", /* LSEC Pin 24: GPIO2_1 */
150 "GPIO-C", /* LSEC Pin 25: GPIO2_2 */
151 "GPIO-D", /* LSEC Pin 26: GPIO2_3 */
152 "GPIO-E", /* LSEC Pin 27: GPIO2_4 */
153 "USB_ID_DET", "USB_VBUS_DET",
154 "GPIO-H"; /* LSEC Pin 30: GPIO2_7 */
155 };
156
157 gpio3: gpio@f8014000 {
158 gpio-line-names = "GPIO3_0", "NC", "NC", "", "NC", "",
159 "WLAN_ACTIVE", "NC", "NC";
160 };
161
162 gpio4: gpio@f7020000 {
163 gpio-line-names = "USER_LED1", "USER_LED2", "USER_LED3",
164 "USER_LED4", "SD_SEL", "NC", "NC", "BT_ACTIVE";
165 };
166
167 gpio5: gpio@f7021000 {
168 gpio-line-names = "NC", "NC",
169 "[UART1_RxD]", /* LSEC Pin 11: UART3_RX */
170 "[UART1_TxD]", /* LSEC Pin 13: UART3_TX */
171 "[AUX_SSI1]", "NC",
172 "[PCM_CLK]", /* LSEC Pin 18: MODEM_PCM_XCLK */
173 "[PCM_FS]"; /* LSEC Pin 16: MODEM_PCM_XFS */
174 };
175
176 gpio6: gpio@f7022000 {
177 gpio-line-names =
178 "[SPI0_DIN]", /* Pin 10: SPI0_DI */
179 "[SPI0_DOUT]", /* Pin 14: SPI0_DO */
180 "[SPI0_CS]", /* Pin 12: SPI0_CS_N */
181 "[SPI0_SCLK]", /* Pin 8: SPI0_SCLK */
182 "NC", "NC", "NC",
183 "GPIO-G"; /* Pin 29: GPIO6_7_DSI_TE0 */
184 };
185
186 gpio7: gpio@f7023000 {
187 gpio-line-names = "NC", "NC", "NC", "NC",
188 "[PCM_DI]", /* Pin 22: MODEM_PCM_DI */
189 "[PCM_DO]", /* Pin 20: MODEM_PCM_DO */
190 "NC", "NC";
191 };
192
193 gpio8: gpio@f7024000 {
194 gpio-line-names = "NC", "[CEC_CLK_19_2MHZ]", "NC",
195 "", "", "", "", "", "";
196 };
197
198 gpio9: gpio@f7025000 {
199 gpio-line-names = "",
200 "GPIO-J", /* LSEC Pin 32: ISP_PWDN0_GPIO9_1 */
201 "GPIO-L", /* LSEC Pin 34: ISP_PWDN1_GPIO9_2 */
202 "NC", "NC", "NC", "NC", "[ISP_CCLK0]";
203 };
204
205 gpio10: gpio@f7026000 {
206 gpio-line-names = "BOOT_SEL",
207 "[ISP_CCLK1]",
208 "GPIO-I", /* LSEC Pin 31: ISP_RSTB0_GPIO10_2 */
209 "GPIO-K", /* LSEC Pin 33: ISP_RSTB1_GPIO10_3 */
210 "NC", "NC",
211 "[I2C2_SDA]", /* HSEC Pin 34: ISP0_SDA */
212 "[I2C2_SCL]"; /* HSEC Pin 32: ISP0_SCL */
213 };
214
215 gpio11: gpio@f7027000 {
216 gpio-line-names =
217 "[I2C3_SDA]", /* HSEC Pin 38: ISP1_SDA */
218 "[I2C3_SCL]", /* HSEC Pin 36: ISP1_SCL */
219 "", "NC", "NC", "NC", "", "";
220 };
221
222 gpio12: gpio@f7028000 {
223 gpio-line-names = "[BT_PCM_XFS]", "[BT_PCM_DI]",
224 "[BT_PCM_DO]",
225 "NC", "NC", "NC", "NC",
226 "GPIO-F"; /* LSEC Pin 28: BL_PWM_GPIO12_7 */
227 };
228
229 gpio13: gpio@f7029000 {
230 gpio-line-names = "[UART0_RX]", "[UART0_TX]",
231 "[BT_UART1_CTS]", "[BT_UART1_RTS]",
232 "[BT_UART1_RX]", "[BT_UART1_TX]",
233 "[UART0_CTS]", /* LSEC Pin 3: UART2_CTS_N */
234 "[UART0_RTS]"; /* LSEC Pin 9: UART2_RTS_N */
235 };
236
237 gpio14: gpio@f702a000 {
238 gpio-line-names =
239 "[UART0_RxD]", /* LSEC Pin 7: UART2_RX */
240 "[UART0_TxD]", /* LSEC Pin 5: UART2_TX */
241 "[I2C0_SCL]", /* LSEC Pin 15: I2C0_SCL */
242 "[I2C0_SDA]", /* LSEC Pin 17: I2C0_SDA */
243 "[I2C1_SCL]", /* LSEC Pin 19: I2C1_SCL */
244 "[I2C1_SDA]", /* LSEC Pin 21: I2C1_SDA */
245 "[I2C2_SCL]", "[I2C2_SDA]";
246 };
247
248 gpio15: gpio@f702b000 {
249 gpio-line-names = "", "", "", "", "", "", "NC", "";
250 };
251
252 /* GPIO blocks 16 thru 19 do not appear to be routed to pins */
253
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254 dwmmc_2: dwmmc2@f723f000 {
255 ti,non-removable;
256 non-removable;
257 /* WL_EN */
258 vmmc-supply = <&wlan_en_reg>;
259
260 #address-cells = <0x1>;
261 #size-cells = <0x0>;
262 wlcore: wlcore@2 {
263 compatible = "ti,wl1835";
264 reg = <2>; /* sdio func num */
265 /* WL_IRQ, WL_HOST_WAKE_GPIO1_3 */
266 interrupt-parent = <&gpio1>;
267 interrupts = <3 IRQ_TYPE_EDGE_RISING>;
268 };
269 };
270
271 wlan_en_reg: regulator@1 {
272 compatible = "regulator-fixed";
273 regulator-name = "wlan-en-regulator";
274 regulator-min-microvolt = <1800000>;
275 regulator-max-microvolt = <1800000>;
276 /* WLAN_EN GPIO */
277 gpio = <&gpio0 5 0>;
278 /* WLAN card specific delay */
279 startup-delay-us = <70000>;
280 enable-active-high;
281 };
60dac1b1 282 };
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283
284 leds {
285 compatible = "gpio-leds";
286 user_led4 {
287 label = "user_led4";
288 gpios = <&gpio4 0 0>; /* <&gpio_user_led_1>; */
289 linux,default-trigger = "heartbeat";
290 };
291
292 user_led3 {
293 label = "user_led3";
294 gpios = <&gpio4 1 0>; /* <&gpio_user_led_2>; */
295 linux,default-trigger = "mmc0";
296 };
297
298 user_led2 {
299 label = "user_led2";
300 gpios = <&gpio4 2 0>; /* <&gpio_user_led_3>; */
301 linux,default-trigger = "mmc1";
302 };
303
304 user_led1 {
305 label = "user_led1";
306 gpios = <&gpio4 3 0>; /* <&gpio_user_led_4>; */
307 linux,default-trigger = "cpu0";
308 };
309
310 wlan_active_led {
311 label = "wifi_active";
312 gpios = <&gpio3 5 0>; /* <&gpio_wlan_active_led>; */
313 linux,default-trigger = "phy0tx";
314 default-state = "off";
315 };
316
317 bt_active_led {
318 label = "bt_active";
319 gpios = <&gpio4 7 0>; /* <&gpio_bt_active_led>; */
320 linux,default-trigger = "hci0rx";
321 default-state = "off";
322 };
323 };
a817137a
CF
324
325 pmic: pmic@f8000000 {
326 compatible = "hisilicon,hi655x-pmic";
327 reg = <0x0 0xf8000000 0x0 0x1000>;
328 interrupt-controller;
329 #interrupt-cells = <2>;
330 pmic-gpios = <&gpio1 2 GPIO_ACTIVE_HIGH>;
331
332 regulators {
333 ldo2: LDO2 {
334 regulator-name = "LDO2_2V8";
335 regulator-min-microvolt = <2500000>;
336 regulator-max-microvolt = <3200000>;
337 regulator-enable-ramp-delay = <120>;
338 };
339
340 ldo7: LDO7 {
341 regulator-name = "LDO7_SDIO";
342 regulator-min-microvolt = <1800000>;
343 regulator-max-microvolt = <3300000>;
344 regulator-enable-ramp-delay = <120>;
345 };
346
347 ldo10: LDO10 {
348 regulator-name = "LDO10_2V85";
349 regulator-min-microvolt = <1800000>;
350 regulator-max-microvolt = <3000000>;
351 regulator-enable-ramp-delay = <360>;
352 };
353
354 ldo13: LDO13 {
355 regulator-name = "LDO13_1V8";
356 regulator-min-microvolt = <1600000>;
357 regulator-max-microvolt = <1950000>;
358 regulator-enable-ramp-delay = <120>;
359 };
360
361 ldo14: LDO14 {
362 regulator-name = "LDO14_2V8";
363 regulator-min-microvolt = <2500000>;
364 regulator-max-microvolt = <3200000>;
365 regulator-enable-ramp-delay = <120>;
366 };
367
368 ldo15: LDO15 {
369 regulator-name = "LDO15_1V8";
370 regulator-min-microvolt = <1600000>;
371 regulator-max-microvolt = <1950000>;
372 regulator-boot-on;
373 regulator-always-on;
374 regulator-enable-ramp-delay = <120>;
375 };
376
377 ldo17: LDO17 {
378 regulator-name = "LDO17_2V5";
379 regulator-min-microvolt = <2500000>;
380 regulator-max-microvolt = <3200000>;
381 regulator-enable-ramp-delay = <120>;
382 };
383
384 ldo19: LDO19 {
385 regulator-name = "LDO19_3V0";
386 regulator-min-microvolt = <1800000>;
387 regulator-max-microvolt = <3000000>;
388 regulator-enable-ramp-delay = <360>;
389 };
390
391 ldo21: LDO21 {
392 regulator-name = "LDO21_1V8";
393 regulator-min-microvolt = <1650000>;
394 regulator-max-microvolt = <2000000>;
395 regulator-always-on;
396 regulator-enable-ramp-delay = <120>;
397 };
398
399 ldo22: LDO22 {
400 regulator-name = "LDO22_1V2";
401 regulator-min-microvolt = <900000>;
402 regulator-max-microvolt = <1200000>;
403 regulator-boot-on;
404 regulator-always-on;
405 regulator-enable-ramp-delay = <120>;
406 };
407 };
408 };
86e8f528 409};
dd90caac
RH
410
411&uart2 {
412 label = "LS-UART0";
413};
414&uart3 {
415 label = "LS-UART1";
416};
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XL
417
418&ade {
419 status = "ok";
420};
421
422&dsi {
423 status = "ok";
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XL
424
425 ports {
426 /* 1 for output port */
427 port@1 {
428 reg = <1>;
429
430 dsi_out0: endpoint@0 {
431 remote-endpoint = <&adv7533_in>;
432 };
433 };
434 };
435};
436
437&i2c2 {
438 #address-cells = <1>;
439 #size-cells = <0>;
440 status = "ok";
441
442 adv7533: adv7533@39 {
443 compatible = "adi,adv7533";
444 reg = <0x39>;
445 interrupt-parent = <&gpio1>;
446 interrupts = <1 2>;
447 pd-gpio = <&gpio0 4 0>;
448 adi,dsi-lanes = <4>;
449
450 port {
451 adv7533_in: endpoint {
452 remote-endpoint = <&dsi_out0>;
453 };
454 };
455 };
3814b61b 456};