[linux-block.git] / arch / arm64 / boot / dts / freescale / imx8mp-venice-gw73xx.dtsi

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright 2023 Gateworks Corporation
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/leds/common.h>
#include <dt-bindings/phy/phy-imx8-pcie.h>

/ {
	connector {
		compatible = "gpio-usb-b-connector", "usb-b-connector";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usbcon1>;
		type = "micro";
		label = "otg";
		vbus-supply = <&reg_usb1_vbus>;
		id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;

		port {
			usb_dr_connector: endpoint {
				remote-endpoint = <&usb3_dwc>;
			};
		};
	};

	led-controller {
		compatible = "gpio-leds";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_gpio_leds>;

		led-0 {
			function = LED_FUNCTION_STATUS;
			color = <LED_COLOR_ID_GREEN>;
			gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
			default-state = "on";
			linux,default-trigger = "heartbeat";
		};

		led-1 {
			function = LED_FUNCTION_STATUS;
			color = <LED_COLOR_ID_RED>;
			gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
			default-state = "off";
		};
	};

	pcie0_refclk: clock-pcie0 {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <100000000>;
	};

	pps {
		compatible = "pps-gpio";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_pps>;
		gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
		status = "okay";
	};

	reg_usb1_vbus: regulator-usb1 {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_reg_usb1_en>;
		regulator-name = "usb1_vbus";
		gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
	};

	reg_usb2_vbus: regulator-usb2 {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_reg_usb2_en>;
		regulator-name = "usb2_vbus";
		gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
		enable-active-high;
		regulator-min-microvolt = <5000000>;
		regulator-max-microvolt = <5000000>;
	};

	reg_wifi_en: regulator-wifi-en {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_reg_wl>;
		regulator-name = "wl";
		gpio = <&gpio4 19 GPIO_ACTIVE_HIGH>;
		startup-delay-us = <100>;
		enable-active-high;
		regulator-min-microvolt = <3300000>;
		regulator-max-microvolt = <3300000>;
	};

	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
		compatible = "regulator-fixed";
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
		regulator-name = "VDD_3V3_SD";
		enable-active-high;
		gpio = <&gpio2 19 0>; /* SD2_RESET */
		off-on-delay-us = <12000>;
		regulator-max-microvolt = <3300000>;
		regulator-min-microvolt = <3300000>;
		startup-delay-us = <100>;
	};
};

/* off-board header */
&ecspi2 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_spi2>;
	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
		   <&gpio1 10 GPIO_ACTIVE_LOW>;
	status = "okay";

	tpm@1 {
		compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
		reg = <0x1>;
		spi-max-frequency = <36000000>;
	};
};

&gpio4 {
	gpio-line-names =
		"", "", "", "",
		"", "", "", "",
		"dio1", "", "", "dio0",
		"", "", "pci_usb_sel", "",
		"", "", "", "",
		"", "", "rs485_en", "rs485_term",
		"", "", "", "rs485_half",
		"pci_wdis#", "", "", "";
};

&i2c2 {
	clock-frequency = <400000>;
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_i2c2>;
	status = "okay";

	accelerometer@19 {
		compatible = "st,lis2de12";
		reg = <0x19>;
		pinctrl-names = "default";
		pinctrl-0 = <&pinctrl_accel>;
		st,drdy-int-pin = <1>;
		interrupt-parent = <&gpio4>;
		interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
	};
};

&pcie_phy {
	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
	fsl,clkreq-unsupported;
	clocks = <&pcie0_refclk>;
	clock-names = "ref";
	status = "okay";
};

&pcie {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_pcie0>;
	reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
	status = "okay";
};

/* GPS */
&uart1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart1>;
	status = "okay";
};

/* bluetooth HCI */
&uart3 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>;
	cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
	rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
	status = "okay";

	bluetooth {
		compatible = "brcm,bcm4330-bt";
		shutdown-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
	};
};

/* RS232 */
&uart4 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_uart4>;
	status = "okay";
};

/* USB1 - OTG */
&usb3_0 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usb1>;
	fsl,over-current-active-low;
	status = "okay";
};

&usb3_phy0 {
	status = "okay";
};

&usb_dwc3_0 {
	/* dual role is implemented but not a full featured OTG */
	adp-disable;
	hnp-disable;
	srp-disable;
	dr_mode = "otg";
	usb-role-switch;
	role-switch-default-mode = "peripheral";
	status = "okay";

	port {
		usb3_dwc: endpoint {
			remote-endpoint = <&usb_dr_connector>;
		};
	};
};

/* USB2 - USB3.0 Hub */
&usb3_1 {
	fsl,permanently-attached;
	fsl,disable-port-power-control;
	status = "okay";
};

&usb3_phy1 {
	vbus-supply = <&reg_usb2_vbus>;
	status = "okay";
};

&usb_dwc3_1 {
	dr_mode = "host";
	status = "okay";
};

/* SDIO WiFi */
&usdhc1 {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_usdhc1>;
	bus-width = <4>;
	non-removable;
	vmmc-supply = <&reg_wifi_en>;
	status = "okay";
};

/* microSD */
&usdhc2 {
	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
	bus-width = <4>;
	vmmc-supply = <&reg_usdhc2_vmmc>;
	status = "okay";
};

&iomuxc {
	pinctrl-names = "default";
	pinctrl-0 = <&pinctrl_hog>;

	pinctrl_hog: hoggrp {
		fsl,pins = <
			MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08	0x40000146 /* DIO1 */
			MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11	0x40000146 /* DIO0 */
			MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14	0x40000106 /* PCIE_USBSEL */
			MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27	0x40000106 /* RS485_HALF */
			MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22	0x40000106 /* RS485_EN */
			MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23	0x40000106 /* RS485_TERM */
			MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28	0x40000106 /* PCIE_WDIS# */
		>;
	};

	pinctrl_accel: accelgrp {
		fsl,pins = <
			MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21	0x150	/* IRQ */
		>;
	};

	pinctrl_bten: btengrp {
		fsl,pins = <
			MX8MP_IOMUXC_SAI1_TXD4__GPIO4_IO16	0x146
		>;
	};

	pinctrl_gpio_leds: gpioledgrp {
		fsl,pins = <
			MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01	0x6	/* LEDG */
			MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05	0x6	/* LEDR */
		>;
	};

	pinctrl_pcie0: pcie0grp {
		fsl,pins = <
			MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29	0x106
		>;
	};

	pinctrl_pps: ppsgrp {
		fsl,pins = <
			MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03	0x146
		>;
	};

	pinctrl_reg_wl: regwlgrp {
		fsl,pins = <
			MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19	0x146
		>;
	};

	pinctrl_reg_usb1_en: regusb1grp {
		fsl,pins = <
			MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12	0x146 /* USB1_EN */
		>;
	};

	pinctrl_usb1: usb1grp {
		fsl,pins = <
			MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC	0x140 /* USB1_FLT# */
		>;
	};

	pinctrl_usbcon1: usbcon1grp {
		fsl,pins = <
			MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21	0x140 /* USB1_ID */
		>;
	};

	pinctrl_reg_usb2_en: regusb2grp {
		fsl,pins = <
			MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12	0x146 /* USBHUB_RST# */
		>;
	};

	pinctrl_spi2: spi2grp {
		fsl,pins = <
			MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK	0x140
			MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI	0x140
			MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO	0x140
			MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13	0x140
		>;
	};

	pinctrl_uart1: uart1grp {
		fsl,pins = <
			MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX	0x140
			MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX	0x140
		>;
	};

	pinctrl_uart3: uart3grp {
		fsl,pins = <
			MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX	0x140
			MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX	0x140
			MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08	0x140
			MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09	0x140
		>;
	};

	pinctrl_uart4: uart4grp {
		fsl,pins = <
			MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX	0x140
			MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX	0x140
		>;
	};

	pinctrl_usdhc1: usdhc1grp {
		fsl,pins = <
			MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK	0x190
			MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD	0x1d0
			MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0	0x1d0
			MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1	0x1d0
			MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2	0x1d0
			MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3	0x1d0
		>;
	};

	pinctrl_usdhc2: usdhc2grp {
		fsl,pins = <
			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x190
			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d0
			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d0
			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d0
			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d0
			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d0
			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1
		>;
	};

	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
		fsl,pins = <
			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x194
			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d4
			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d4
			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d4
			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d4
			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d4
			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1
		>;
	};

	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
		fsl,pins = <
			MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK	0x196
			MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD	0x1d6
			MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0	0x1d6
			MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1	0x1d6
			MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2	0x1d6
			MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3	0x1d6
			MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT	0xc1
		>;
	};

	pinctrl_usdhc2_vmmc: usdhc2-vmmc-grp {
		fsl,pins = <
			MX8MP_IOMUXC_SD2_RESET_B__USDHC2_RESET_B	0x1d0
		>;
	};

	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
		fsl,pins = <
			MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12		0x1c4
		>;
	};
};
Commit	Line	Data
716ced30 TH	1	// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
	2	/*
	3	* Copyright 2023 Gateworks Corporation
	4	*/
	5
	6	#include <dt-bindings/gpio/gpio.h>
	7	#include <dt-bindings/leds/common.h>
	8	#include <dt-bindings/phy/phy-imx8-pcie.h>
	9
	10	/ {
ad9a12f7 FE	11	connector {
	12	compatible = "gpio-usb-b-connector", "usb-b-connector";
	13	pinctrl-names = "default";
	14	pinctrl-0 = <&pinctrl_usbcon1>;
	15	type = "micro";
	16	label = "otg";
6f8e0aca	17	vbus-supply = <&reg_usb1_vbus>;
ad9a12f7 FE	18	id-gpios = <&gpio3 21 GPIO_ACTIVE_HIGH>;
	19
	20	port {
	21	usb_dr_connector: endpoint {
	22	remote-endpoint = <&usb3_dwc>;
	23	};
	24	};
	25	};
	26
716ced30 TH	27	led-controller {
	28	compatible = "gpio-leds";
	29	pinctrl-names = "default";
	30	pinctrl-0 = <&pinctrl_gpio_leds>;
	31
	32	led-0 {
	33	function = LED_FUNCTION_STATUS;
	34	color = <LED_COLOR_ID_GREEN>;
	35	gpios = <&gpio4 1 GPIO_ACTIVE_HIGH>;
	36	default-state = "on";
	37	linux,default-trigger = "heartbeat";
	38	};
	39
	40	led-1 {
	41	function = LED_FUNCTION_STATUS;
	42	color = <LED_COLOR_ID_RED>;
	43	gpios = <&gpio4 5 GPIO_ACTIVE_HIGH>;
	44	default-state = "off";
	45	};
	46	};
	47
	48	pcie0_refclk: clock-pcie0 {
	49	compatible = "fixed-clock";
	50	#clock-cells = <0>;
	51	clock-frequency = <100000000>;
	52	};
	53
	54	pps {
	55	compatible = "pps-gpio";
	56	pinctrl-names = "default";
	57	pinctrl-0 = <&pinctrl_pps>;
	58	gpios = <&gpio4 3 GPIO_ACTIVE_HIGH>;
	59	status = "okay";
	60	};
	61
	62	reg_usb1_vbus: regulator-usb1 {
	63	compatible = "regulator-fixed";
	64	pinctrl-names = "default";
	65	pinctrl-0 = <&pinctrl_reg_usb1_en>;
	66	regulator-name = "usb1_vbus";
	67	gpio = <&gpio1 12 GPIO_ACTIVE_HIGH>;
	68	enable-active-high;
	69	regulator-min-microvolt = <5000000>;
	70	regulator-max-microvolt = <5000000>;
	71	};
	72
	73	reg_usb2_vbus: regulator-usb2 {
	74	compatible = "regulator-fixed";
	75	pinctrl-names = "default";
	76	pinctrl-0 = <&pinctrl_reg_usb2_en>;
	77	regulator-name = "usb2_vbus";
	78	gpio = <&gpio4 12 GPIO_ACTIVE_HIGH>;
	79	enable-active-high;
	80	regulator-min-microvolt = <5000000>;
	81	regulator-max-microvolt = <5000000>;
	82	};
	83
	84	reg_wifi_en: regulator-wifi-en {
	85	compatible = "regulator-fixed";
	86	pinctrl-names = "default";
	87	pinctrl-0 = <&pinctrl_reg_wl>;
	88	regulator-name = "wl";
	89	gpio = <&gpio4 19 GPIO_ACTIVE_HIGH>;
	90	startup-delay-us = <100>;
91	enable-active-high;
92	regulator-min-microvolt = <3300000>;
93	regulator-max-microvolt = <3300000>;
94	};
95
96	reg_usdhc2_vmmc: regulator-usdhc2-vmmc {
97	compatible = "regulator-fixed";
98	pinctrl-names = "default";
99	pinctrl-0 = <&pinctrl_usdhc2_vmmc>;
100	regulator-name = "VDD_3V3_SD";
101	enable-active-high;
102	gpio = <&gpio2 19 0>; /* SD2_RESET */
103	off-on-delay-us = <12000>;
104	regulator-max-microvolt = <3300000>;
105	regulator-min-microvolt = <3300000>;
106	startup-delay-us = <100>;
107	};
108	};
109
110	/* off-board header */
111	&ecspi2 {
112	pinctrl-names = "default";
113	pinctrl-0 = <&pinctrl_spi2>;
2b3ab9d8 TH	114	cs-gpios = <&gpio5 13 GPIO_ACTIVE_LOW>,
2b3ab9d8 TH	115	<&gpio1 10 GPIO_ACTIVE_LOW>;
716ced30	116	status = "okay";
2b3ab9d8 TH	117
2b3ab9d8 TH	118	tpm@1 {
5e2400f1	119	compatible = "atmel,attpm20p", "tcg,tpm_tis-spi";
2b3ab9d8 TH	120	reg = <0x1>;
	121	spi-max-frequency = <36000000>;
	122	};
716ced30 TH	123	};
	124
	125	&gpio4 {
	126	gpio-line-names =
	127	"", "", "", "",
	128	"", "", "", "",
	129	"dio1", "", "", "dio0",
	130	"", "", "pci_usb_sel", "",
	131	"", "", "", "",
	132	"", "", "rs485_en", "rs485_term",
	133	"", "", "", "rs485_half",
	134	"pci_wdis#", "", "", "";
	135	};
	136
	137	&i2c2 {
	138	clock-frequency = <400000>;
	139	pinctrl-names = "default";
	140	pinctrl-0 = <&pinctrl_i2c2>;
	141	status = "okay";
	142
	143	accelerometer@19 {
	144	compatible = "st,lis2de12";
	145	reg = <0x19>;
	146	pinctrl-names = "default";
	147	pinctrl-0 = <&pinctrl_accel>;
	148	st,drdy-int-pin = <1>;
	149	interrupt-parent = <&gpio4>;
	150	interrupts = <21 IRQ_TYPE_LEVEL_LOW>;
716ced30 TH	151	};
	152	};
	153
	154	&pcie_phy {
	155	fsl,refclk-pad-mode = <IMX8_PCIE_REFCLK_PAD_INPUT>;
	156	fsl,clkreq-unsupported;
	157	clocks = <&pcie0_refclk>;
	158	clock-names = "ref";
	159	status = "okay";
	160	};
	161
	162	&pcie {
	163	pinctrl-names = "default";
	164	pinctrl-0 = <&pinctrl_pcie0>;
	165	reset-gpio = <&gpio4 29 GPIO_ACTIVE_LOW>;
	166	status = "okay";
	167	};
	168
	169	/* GPS */
	170	&uart1 {
	171	pinctrl-names = "default";
	172	pinctrl-0 = <&pinctrl_uart1>;
	173	status = "okay";
	174	};
	175
	176	/* bluetooth HCI */
	177	&uart3 {
	178	pinctrl-names = "default";
	179	pinctrl-0 = <&pinctrl_uart3>, <&pinctrl_bten>;
	180	cts-gpios = <&gpio5 8 GPIO_ACTIVE_LOW>;
	181	rts-gpios = <&gpio5 9 GPIO_ACTIVE_LOW>;
	182	status = "okay";
	183
	184	bluetooth {
	185	compatible = "brcm,bcm4330-bt";
	186	shutdown-gpios = <&gpio4 16 GPIO_ACTIVE_HIGH>;
	187	};
	188	};
	189
	190	/* RS232 */
	191	&uart4 {
	192	pinctrl-names = "default";
	193	pinctrl-0 = <&pinctrl_uart4>;
	194	status = "okay";
	195	};
	196
	197	/* USB1 - OTG */
	198	&usb3_0 {
	199	pinctrl-names = "default";
	200	pinctrl-0 = <&pinctrl_usb1>;
	201	fsl,over-current-active-low;
	202	status = "okay";
	203	};
	204
	205	&usb3_phy0 {
716ced30 TH	206	status = "okay";
	207	};
	208
	209	&usb_dwc3_0 {
	210	/* dual role is implemented but not a full featured OTG */
	211	adp-disable;
	212	hnp-disable;
	213	srp-disable;
	214	dr_mode = "otg";
	215	usb-role-switch;
	216	role-switch-default-mode = "peripheral";
	217	status = "okay";
	218
ad9a12f7 FE	219	port {
	220	usb3_dwc: endpoint {
	221	remote-endpoint = <&usb_dr_connector>;
	222	};
716ced30 TH	223	};
	224	};
	225
	226	/* USB2 - USB3.0 Hub */
	227	&usb3_1 {
	228	fsl,permanently-attached;
	229	fsl,disable-port-power-control;
	230	status = "okay";
	231	};
	232
	233	&usb3_phy1 {
	234	vbus-supply = <&reg_usb2_vbus>;
	235	status = "okay";
	236	};
	237
	238	&usb_dwc3_1 {
	239	dr_mode = "host";
	240	status = "okay";
	241	};
	242
	243	/* SDIO WiFi */
	244	&usdhc1 {
	245	pinctrl-names = "default";
	246	pinctrl-0 = <&pinctrl_usdhc1>;
	247	bus-width = <4>;
	248	non-removable;
	249	vmmc-supply = <&reg_wifi_en>;
	250	status = "okay";
	251	};
	252
	253	/* microSD */
	254	&usdhc2 {
	255	pinctrl-names = "default", "state_100mhz", "state_200mhz";
	256	pinctrl-0 = <&pinctrl_usdhc2>, <&pinctrl_usdhc2_gpio>;
	257	pinctrl-1 = <&pinctrl_usdhc2_100mhz>, <&pinctrl_usdhc2_gpio>;
	258	pinctrl-2 = <&pinctrl_usdhc2_200mhz>, <&pinctrl_usdhc2_gpio>;
	259	cd-gpios = <&gpio2 12 GPIO_ACTIVE_LOW>;
	260	bus-width = <4>;
	261	vmmc-supply = <&reg_usdhc2_vmmc>;
	262	status = "okay";
	263	};
	264
	265	&iomuxc {
	266	pinctrl-names = "default";
	267	pinctrl-0 = <&pinctrl_hog>;
	268
	269	pinctrl_hog: hoggrp {
	270	fsl,pins = <
	271	MX8MP_IOMUXC_SAI1_RXD6__GPIO4_IO08 0x40000146 /* DIO1 */
	272	MX8MP_IOMUXC_SAI1_TXC__GPIO4_IO11 0x40000146 /* DIO0 */
	273	MX8MP_IOMUXC_SAI1_TXD2__GPIO4_IO14 0x40000106 /* PCIE_USBSEL */
	274	MX8MP_IOMUXC_SAI2_MCLK__GPIO4_IO27 0x40000106 /* RS485_HALF */
	275	MX8MP_IOMUXC_SAI2_RXC__GPIO4_IO22 0x40000106 /* RS485_EN */
	276	MX8MP_IOMUXC_SAI2_RXD0__GPIO4_IO23 0x40000106 /* RS485_TERM */
	277	MX8MP_IOMUXC_SAI3_RXFS__GPIO4_IO28 0x40000106 /* PCIE_WDIS# */
	278	>;
	279	};
	280
	281	pinctrl_accel: accelgrp {
	282	fsl,pins = <
	283	MX8MP_IOMUXC_SAI2_RXFS__GPIO4_IO21 0x150 /* IRQ */
	284	>;
	285	};
	286
287	pinctrl_bten: btengrp {
288	fsl,pins = <
289	MX8MP_IOMUXC_SAI1_TXD4__GPIO4_IO16 0x146
290	>;
291	};
292
293	pinctrl_gpio_leds: gpioledgrp {
294	fsl,pins = <
295	MX8MP_IOMUXC_SAI1_RXC__GPIO4_IO01 0x6 /* LEDG */
296	MX8MP_IOMUXC_SAI1_RXD3__GPIO4_IO05 0x6 /* LEDR */
297	>;
298	};
299
300	pinctrl_pcie0: pcie0grp {
301	fsl,pins = <
302	MX8MP_IOMUXC_SAI3_RXC__GPIO4_IO29 0x106
303	>;
304	};
305
306	pinctrl_pps: ppsgrp {
307	fsl,pins = <
308	MX8MP_IOMUXC_SAI1_RXD1__GPIO4_IO03 0x146
309	>;
310	};
311
312	pinctrl_reg_wl: regwlgrp {
313	fsl,pins = <
314	MX8MP_IOMUXC_SAI1_TXD7__GPIO4_IO19 0x146
315	>;
316	};
317
318	pinctrl_reg_usb1_en: regusb1grp {
319	fsl,pins = <
320	MX8MP_IOMUXC_GPIO1_IO12__GPIO1_IO12 0x146 /* USB1_EN */
321	>;
322	};
323
324	pinctrl_usb1: usb1grp {
325	fsl,pins = <
326	MX8MP_IOMUXC_GPIO1_IO13__USB1_OTG_OC 0x140 /* USB1_FLT# */
327	>;
328	};
329
330	pinctrl_usbcon1: usbcon1grp {
331	fsl,pins = <
332	MX8MP_IOMUXC_SAI5_RXD0__GPIO3_IO21 0x140 /* USB1_ID */
333	>;
334	};
335
336	pinctrl_reg_usb2_en: regusb2grp {
337	fsl,pins = <
338	MX8MP_IOMUXC_SAI1_TXD0__GPIO4_IO12 0x146 /* USBHUB_RST# */
339	>;
340	};
341
342	pinctrl_spi2: spi2grp {
343	fsl,pins = <
344	MX8MP_IOMUXC_ECSPI2_SCLK__ECSPI2_SCLK 0x140
345	MX8MP_IOMUXC_ECSPI2_MOSI__ECSPI2_MOSI 0x140
346	MX8MP_IOMUXC_ECSPI2_MISO__ECSPI2_MISO 0x140
347	MX8MP_IOMUXC_ECSPI2_SS0__GPIO5_IO13 0x140
348	>;
349	};
350
351	pinctrl_uart1: uart1grp {
352	fsl,pins = <
353	MX8MP_IOMUXC_UART1_RXD__UART1_DCE_RX 0x140
354	MX8MP_IOMUXC_UART1_TXD__UART1_DCE_TX 0x140
355	>;
356	};
357
358	pinctrl_uart3: uart3grp {
359	fsl,pins = <
360	MX8MP_IOMUXC_UART3_RXD__UART3_DCE_RX 0x140
361	MX8MP_IOMUXC_UART3_TXD__UART3_DCE_TX 0x140
362	MX8MP_IOMUXC_ECSPI1_MISO__GPIO5_IO08 0x140
363	MX8MP_IOMUXC_ECSPI1_SS0__GPIO5_IO09 0x140
364	>;
365	};
366
367	pinctrl_uart4: uart4grp {
368	fsl,pins = <
369	MX8MP_IOMUXC_UART4_RXD__UART4_DCE_RX 0x140
370	MX8MP_IOMUXC_UART4_TXD__UART4_DCE_TX 0x140
371	>;
372	};
373
374	pinctrl_usdhc1: usdhc1grp {
375	fsl,pins = <
376	MX8MP_IOMUXC_SD1_CLK__USDHC1_CLK 0x190
377	MX8MP_IOMUXC_SD1_CMD__USDHC1_CMD 0x1d0
378	MX8MP_IOMUXC_SD1_DATA0__USDHC1_DATA0 0x1d0
379	MX8MP_IOMUXC_SD1_DATA1__USDHC1_DATA1 0x1d0
380	MX8MP_IOMUXC_SD1_DATA2__USDHC1_DATA2 0x1d0
381	MX8MP_IOMUXC_SD1_DATA3__USDHC1_DATA3 0x1d0
382	>;
383	};
384
385	pinctrl_usdhc2: usdhc2grp {
386	fsl,pins = <
387	MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x190
388	MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d0
389	MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d0
390	MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d0
391	MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d0
392	MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d0
393	MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
394	>;
395	};
396
397	pinctrl_usdhc2_100mhz: usdhc2-100mhzgrp {
398	fsl,pins = <
399	MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x194
400	MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d4
401	MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d4
402	MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d4
403	MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d4
404	MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d4
405	MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
406	>;
407	};
408
409	pinctrl_usdhc2_200mhz: usdhc2-200mhzgrp {
410	fsl,pins = <
411	MX8MP_IOMUXC_SD2_CLK__USDHC2_CLK 0x196
412	MX8MP_IOMUXC_SD2_CMD__USDHC2_CMD 0x1d6
413	MX8MP_IOMUXC_SD2_DATA0__USDHC2_DATA0 0x1d6
414	MX8MP_IOMUXC_SD2_DATA1__USDHC2_DATA1 0x1d6
415	MX8MP_IOMUXC_SD2_DATA2__USDHC2_DATA2 0x1d6
416	MX8MP_IOMUXC_SD2_DATA3__USDHC2_DATA3 0x1d6
417	MX8MP_IOMUXC_GPIO1_IO04__USDHC2_VSELECT 0xc1
418	>;
419	};
420
421	pinctrl_usdhc2_vmmc: usdhc2-vmmc-grp {
422	fsl,pins = <
423	MX8MP_IOMUXC_SD2_RESET_B__USDHC2_RESET_B 0x1d0
424	>;
425	};
426
427	pinctrl_usdhc2_gpio: usdhc2gpiogrp {
428	fsl,pins = <
429	MX8MP_IOMUXC_SD2_CD_B__GPIO2_IO12 0x1c4
430	>;
431	};
432	};