[linux-block.git] / arch / arm64 / boot / dts / freescale / fsl-ls1012a.dtsi

/*
 * Device Tree Include file for Freescale Layerscape-1012A family SoC.
 *
 * Copyright 2016, Freescale Semiconductor
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPLv2 or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This library is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This library is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/thermal/thermal.h>

/ {
	compatible = "fsl,ls1012a";
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	cpus {
		#address-cells = <1>;
		#size-cells = <0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53";
			reg = <0x0>;
			clocks = <&clockgen 1 0>;
			#cooling-cells = <2>;
		};
	};

	sysclk: sysclk {
		compatible = "fixed-clock";
		#clock-cells = <0>;
		clock-frequency = <100000000>;
		clock-output-names = "sysclk";
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
			     <1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
			     <1 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */
			     <1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */
	};

	pmu {
		compatible = "arm,armv8-pmuv3";
		interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
	};

	gic: interrupt-controller@1400000 {
		compatible = "arm,gic-400";
		#interrupt-cells = <3>;
		interrupt-controller;
		reg = <0x0 0x1401000 0 0x1000>, /* GICD */
		      <0x0 0x1402000 0 0x2000>, /* GICC */
		      <0x0 0x1404000 0 0x2000>, /* GICH */
		      <0x0 0x1406000 0 0x2000>; /* GICV */
		interrupts = <1 9 IRQ_TYPE_LEVEL_LOW>;
	};

	reboot {
		compatible = "syscon-reboot";
		regmap = <&dcfg>;
		offset = <0xb0>;
		mask = <0x02>;
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		scfg: scfg@1570000 {
			compatible = "fsl,ls1012a-scfg", "syscon";
			reg = <0x0 0x1570000 0x0 0x10000>;
			big-endian;
		};

		dcfg: dcfg@1ee0000 {
			compatible = "fsl,ls1012a-dcfg",
				     "syscon";
			reg = <0x0 0x1ee0000 0x0 0x10000>;
			big-endian;
		};

		clockgen: clocking@1ee1000 {
			compatible = "fsl,ls1012a-clockgen";
			reg = <0x0 0x1ee1000 0x0 0x1000>;
			#clock-cells = <2>;
			clocks = <&sysclk>;
		};

		tmu: tmu@1f00000 {
			compatible = "fsl,qoriq-tmu";
			reg = <0x0 0x1f00000 0x0 0x10000>;
			interrupts = <0 33 0x4>;
			fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
			fsl,tmu-calibration = <0x00000000 0x00000026
					       0x00000001 0x0000002d
					       0x00000002 0x00000032
					       0x00000003 0x00000039
					       0x00000004 0x0000003f
					       0x00000005 0x00000046
					       0x00000006 0x0000004d
					       0x00000007 0x00000054
					       0x00000008 0x0000005a
					       0x00000009 0x00000061
					       0x0000000a 0x0000006a
					       0x0000000b 0x00000071

					       0x00010000 0x00000025
					       0x00010001 0x0000002c
					       0x00010002 0x00000035
					       0x00010003 0x0000003d
					       0x00010004 0x00000045
					       0x00010005 0x0000004e
					       0x00010006 0x00000057
					       0x00010007 0x00000061
					       0x00010008 0x0000006b
					       0x00010009 0x00000076

					       0x00020000 0x00000029
					       0x00020001 0x00000033
					       0x00020002 0x0000003d
					       0x00020003 0x00000049
					       0x00020004 0x00000056
					       0x00020005 0x00000061
					       0x00020006 0x0000006d

					       0x00030000 0x00000021
					       0x00030001 0x0000002a
					       0x00030002 0x0000003c
					       0x00030003 0x0000004e>;
			big-endian;
			#thermal-sensor-cells = <1>;
		};

		thermal-zones {
			cpu_thermal: cpu-thermal {
				polling-delay-passive = <1000>;
				polling-delay = <5000>;
				thermal-sensors = <&tmu 0>;

				trips {
					cpu_alert: cpu-alert {
						temperature = <85000>;
						hysteresis = <2000>;
						type = "passive";
					};

					cpu_crit: cpu-crit {
						temperature = <95000>;
						hysteresis = <2000>;
						type = "critical";
					};
				};

				cooling-maps {
					map0 {
						trip = <&cpu_alert>;
						cooling-device =
							<&cpu0 THERMAL_NO_LIMIT
							THERMAL_NO_LIMIT>;
					};
				};
			};
		};

		i2c0: i2c@2180000 {
			compatible = "fsl,vf610-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x0 0x2180000 0x0 0x10000>;
			interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 0>;
			status = "disabled";
		};

		i2c1: i2c@2190000 {
			compatible = "fsl,vf610-i2c";
			#address-cells = <1>;
			#size-cells = <0>;
			reg = <0x0 0x2190000 0x0 0x10000>;
			interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 0>;
			status = "disabled";
		};

		duart0: serial@21c0500 {
			compatible = "fsl,ns16550", "ns16550a";
			reg = <0x00 0x21c0500 0x0 0x100>;
			interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 0>;
			status = "disabled";
		};

		duart1: serial@21c0600 {
			compatible = "fsl,ns16550", "ns16550a";
			reg = <0x00 0x21c0600 0x0 0x100>;
			interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 0>;
			status = "disabled";
		};

		gpio0: gpio@2300000 {
			compatible = "fsl,qoriq-gpio";
			reg = <0x0 0x2300000 0x0 0x10000>;
			interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		gpio1: gpio@2310000 {
			compatible = "fsl,qoriq-gpio";
			reg = <0x0 0x2310000 0x0 0x10000>;
			interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
			gpio-controller;
			#gpio-cells = <2>;
			interrupt-controller;
			#interrupt-cells = <2>;
		};

		wdog0: wdog@2ad0000 {
			compatible = "fsl,ls1012a-wdt",
				     "fsl,imx21-wdt";
			reg = <0x0 0x2ad0000 0x0 0x10000>;
			interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 0>;
			big-endian;
		};

		sai1: sai@2b50000 {
			#sound-dai-cells = <0>;
			compatible = "fsl,vf610-sai";
			reg = <0x0 0x2b50000 0x0 0x10000>;
			interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 3>, <&clockgen 4 3>,
				 <&clockgen 4 3>, <&clockgen 4 3>;
			clock-names = "bus", "mclk1", "mclk2", "mclk3";
			dma-names = "tx", "rx";
			dmas = <&edma0 1 47>,
			       <&edma0 1 46>;
			status = "disabled";
		};

		sai2: sai@2b60000 {
			#sound-dai-cells = <0>;
			compatible = "fsl,vf610-sai";
			reg = <0x0 0x2b60000 0x0 0x10000>;
			interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 3>, <&clockgen 4 3>,
				 <&clockgen 4 3>, <&clockgen 4 3>;
			clock-names = "bus", "mclk1", "mclk2", "mclk3";
			dma-names = "tx", "rx";
			dmas = <&edma0 1 45>,
			       <&edma0 1 44>;
			status = "disabled";
		};

		edma0: edma@2c00000 {
			#dma-cells = <2>;
			compatible = "fsl,vf610-edma";
			reg = <0x0 0x2c00000 0x0 0x10000>,
			      <0x0 0x2c10000 0x0 0x10000>,
			      <0x0 0x2c20000 0x0 0x10000>;
			interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>,
				     <0 103 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "edma-tx", "edma-err";
			dma-channels = <32>;
			big-endian;
			clock-names = "dmamux0", "dmamux1";
			clocks = <&clockgen 4 3>,
				 <&clockgen 4 3>;
		};

		sata: sata@3200000 {
			compatible = "fsl,ls1012a-ahci", "fsl,ls1043a-ahci";
			reg = <0x0 0x3200000 0x0 0x10000>,
				<0x0 0x20140520 0x0 0x4>;
			reg-names = "ahci", "sata-ecc";
			interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clockgen 4 0>;
			dma-coherent;
			status = "disabled";
		};
	};
};
Commit	Line	Data
ba321360 HR	1	/*
	2	* Device Tree Include file for Freescale Layerscape-1012A family SoC.
	3	*
	4	* Copyright 2016, Freescale Semiconductor
	5	*
	6	* This file is dual-licensed: you can use it either under the terms
	7	* of the GPLv2 or the X11 license, at your option. Note that this dual
	8	* licensing only applies to this file, and not this project as a
	9	* whole.
	10	*
	11	* a) This library is free software; you can redistribute it and/or
	12	* modify it under the terms of the GNU General Public License as
	13	* published by the Free Software Foundation; either version 2 of the
	14	* License, or (at your option) any later version.
	15	*
	16	* This library is distributed in the hope that it will be useful,
	17	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	18	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	19	* GNU General Public License for more details.
	20	*
	21	* Or, alternatively,
	22	*
	23	* b) Permission is hereby granted, free of charge, to any person
	24	* obtaining a copy of this software and associated documentation
	25	* files (the "Software"), to deal in the Software without
	26	* restriction, including without limitation the rights to use,
	27	* copy, modify, merge, publish, distribute, sublicense, and/or
	28	* sell copies of the Software, and to permit persons to whom the
	29	* Software is furnished to do so, subject to the following
	30	* conditions:
	31	*
	32	* The above copyright notice and this permission notice shall be
	33	* included in all copies or substantial portions of the Software.
	34	*
	35	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	36	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	37	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	38	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	39	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	40	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	41	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	42	* OTHER DEALINGS IN THE SOFTWARE.
	43	*/
	44
	45	#include <dt-bindings/interrupt-controller/irq.h>
893e2aad	46	#include <dt-bindings/thermal/thermal.h>
ba321360 HR	47
	48	/ {
	49	compatible = "fsl,ls1012a";
	50	interrupt-parent = <&gic>;
	51	#address-cells = <2>;
	52	#size-cells = <2>;
	53
	54	cpus {
	55	#address-cells = <1>;
	56	#size-cells = <0>;
	57
	58	cpu0: cpu@0 {
	59	device_type = "cpu";
	60	compatible = "arm,cortex-a53";
	61	reg = <0x0>;
	62	clocks = <&clockgen 1 0>;
	63	#cooling-cells = <2>;
	64	};
	65	};
	66
	67	sysclk: sysclk {
	68	compatible = "fixed-clock";
	69	#clock-cells = <0>;
	70	clock-frequency = <100000000>;
	71	clock-output-names = "sysclk";
	72	};
	73
	74	timer {
	75	compatible = "arm,armv8-timer";
	76	interrupts = <1 13 IRQ_TYPE_LEVEL_LOW>,/* Physical Secure PPI */
	77	<1 14 IRQ_TYPE_LEVEL_LOW>,/* Physical Non-Secure PPI */
	78	<1 11 IRQ_TYPE_LEVEL_LOW>,/* Virtual PPI */
	79	<1 10 IRQ_TYPE_LEVEL_LOW>;/* Hypervisor PPI */
	80	};
	81
	82	pmu {
	83	compatible = "arm,armv8-pmuv3";
	84	interrupts = <0 106 IRQ_TYPE_LEVEL_HIGH>;
	85	};
	86
	87	gic: interrupt-controller@1400000 {
	88	compatible = "arm,gic-400";
	89	#interrupt-cells = <3>;
	90	interrupt-controller;
	91	reg = <0x0 0x1401000 0 0x1000>, /* GICD */
	92	<0x0 0x1402000 0 0x2000>, /* GICC */
	93	<0x0 0x1404000 0 0x2000>, /* GICH */
	94	<0x0 0x1406000 0 0x2000>; /* GICV */
	95	interrupts = <1 9 IRQ_TYPE_LEVEL_LOW>;
	96	};
	97
	98	reboot {
	99	compatible = "syscon-reboot";
	100	regmap = <&dcfg>;
	101	offset = <0xb0>;
	102	mask = <0x02>;
	103	};
	104
	105	soc {
	106	compatible = "simple-bus";
	107	#address-cells = <2>;
	108	#size-cells = <2>;
	109	ranges;
	110
111	scfg: scfg@1570000 {
112	compatible = "fsl,ls1012a-scfg", "syscon";
113	reg = <0x0 0x1570000 0x0 0x10000>;
114	big-endian;
115	};
116
117	dcfg: dcfg@1ee0000 {
118	compatible = "fsl,ls1012a-dcfg",
119	"syscon";
120	reg = <0x0 0x1ee0000 0x0 0x10000>;
121	big-endian;
122	};
123
124	clockgen: clocking@1ee1000 {
125	compatible = "fsl,ls1012a-clockgen";
126	reg = <0x0 0x1ee1000 0x0 0x1000>;
127	#clock-cells = <2>;
128	clocks = <&sysclk>;
129	};
130
893e2aad YT	131	tmu: tmu@1f00000 {
	132	compatible = "fsl,qoriq-tmu";
	133	reg = <0x0 0x1f00000 0x0 0x10000>;
	134	interrupts = <0 33 0x4>;
	135	fsl,tmu-range = <0xb0000 0x9002a 0x6004c 0x30062>;
	136	fsl,tmu-calibration = <0x00000000 0x00000026
	137	0x00000001 0x0000002d
	138	0x00000002 0x00000032
	139	0x00000003 0x00000039
	140	0x00000004 0x0000003f
	141	0x00000005 0x00000046
	142	0x00000006 0x0000004d
	143	0x00000007 0x00000054
	144	0x00000008 0x0000005a
	145	0x00000009 0x00000061
	146	0x0000000a 0x0000006a
	147	0x0000000b 0x00000071
	148
	149	0x00010000 0x00000025
	150	0x00010001 0x0000002c
	151	0x00010002 0x00000035
	152	0x00010003 0x0000003d
	153	0x00010004 0x00000045
	154	0x00010005 0x0000004e
	155	0x00010006 0x00000057
	156	0x00010007 0x00000061
	157	0x00010008 0x0000006b
	158	0x00010009 0x00000076
	159
	160	0x00020000 0x00000029
	161	0x00020001 0x00000033
	162	0x00020002 0x0000003d
	163	0x00020003 0x00000049
	164	0x00020004 0x00000056
	165	0x00020005 0x00000061
	166	0x00020006 0x0000006d
	167
	168	0x00030000 0x00000021
	169	0x00030001 0x0000002a
	170	0x00030002 0x0000003c
	171	0x00030003 0x0000004e>;
	172	big-endian;
	173	#thermal-sensor-cells = <1>;
	174	};
	175
	176	thermal-zones {
	177	cpu_thermal: cpu-thermal {
	178	polling-delay-passive = <1000>;
	179	polling-delay = <5000>;
	180	thermal-sensors = <&tmu 0>;
	181
	182	trips {
	183	cpu_alert: cpu-alert {
	184	temperature = <85000>;
	185	hysteresis = <2000>;
	186	type = "passive";
	187	};
	188
	189	cpu_crit: cpu-crit {
	190	temperature = <95000>;
	191	hysteresis = <2000>;
	192	type = "critical";
	193	};
	194	};
195
196	cooling-maps {
197	map0 {
198	trip = <&cpu_alert>;
199	cooling-device =
200	<&cpu0 THERMAL_NO_LIMIT
201	THERMAL_NO_LIMIT>;
202	};
203	};
204	};
205	};
206
ba321360 HR	207	i2c0: i2c@2180000 {
	208	compatible = "fsl,vf610-i2c";
	209	#address-cells = <1>;
	210	#size-cells = <0>;
	211	reg = <0x0 0x2180000 0x0 0x10000>;
	212	interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
	213	clocks = <&clockgen 4 0>;
	214	status = "disabled";
	215	};
	216
	217	i2c1: i2c@2190000 {
	218	compatible = "fsl,vf610-i2c";
	219	#address-cells = <1>;
	220	#size-cells = <0>;
	221	reg = <0x0 0x2190000 0x0 0x10000>;
	222	interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
	223	clocks = <&clockgen 4 0>;
	224	status = "disabled";
	225	};
	226
	227	duart0: serial@21c0500 {
	228	compatible = "fsl,ns16550", "ns16550a";
	229	reg = <0x00 0x21c0500 0x0 0x100>;
	230	interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
	231	clocks = <&clockgen 4 0>;
	232	status = "disabled";
	233	};
	234
	235	duart1: serial@21c0600 {
	236	compatible = "fsl,ns16550", "ns16550a";
	237	reg = <0x00 0x21c0600 0x0 0x100>;
	238	interrupts = <0 54 IRQ_TYPE_LEVEL_HIGH>;
	239	clocks = <&clockgen 4 0>;
	240	status = "disabled";
	241	};
	242
	243	gpio0: gpio@2300000 {
	244	compatible = "fsl,qoriq-gpio";
	245	reg = <0x0 0x2300000 0x0 0x10000>;
	246	interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>;
	247	gpio-controller;
	248	#gpio-cells = <2>;
	249	interrupt-controller;
	250	#interrupt-cells = <2>;
	251	};
	252
	253	gpio1: gpio@2310000 {
	254	compatible = "fsl,qoriq-gpio";
	255	reg = <0x0 0x2310000 0x0 0x10000>;
	256	interrupts = <0 67 IRQ_TYPE_LEVEL_HIGH>;
	257	gpio-controller;
	258	#gpio-cells = <2>;
	259	interrupt-controller;
	260	#interrupt-cells = <2>;
	261	};
	262
	263	wdog0: wdog@2ad0000 {
	264	compatible = "fsl,ls1012a-wdt",
	265	"fsl,imx21-wdt";
	266	reg = <0x0 0x2ad0000 0x0 0x10000>;
	267	interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
	268	clocks = <&clockgen 4 0>;
	269	big-endian;
	270	};
271
272	sai1: sai@2b50000 {
273	#sound-dai-cells = <0>;
274	compatible = "fsl,vf610-sai";
275	reg = <0x0 0x2b50000 0x0 0x10000>;
276	interrupts = <0 148 IRQ_TYPE_LEVEL_HIGH>;
277	clocks = <&clockgen 4 3>, <&clockgen 4 3>,
278	<&clockgen 4 3>, <&clockgen 4 3>;
279	clock-names = "bus", "mclk1", "mclk2", "mclk3";
280	dma-names = "tx", "rx";
281	dmas = <&edma0 1 47>,
282	<&edma0 1 46>;
283	status = "disabled";
284	};
285
286	sai2: sai@2b60000 {
287	#sound-dai-cells = <0>;
288	compatible = "fsl,vf610-sai";
289	reg = <0x0 0x2b60000 0x0 0x10000>;
290	interrupts = <0 149 IRQ_TYPE_LEVEL_HIGH>;
291	clocks = <&clockgen 4 3>, <&clockgen 4 3>,
292	<&clockgen 4 3>, <&clockgen 4 3>;
293	clock-names = "bus", "mclk1", "mclk2", "mclk3";
294	dma-names = "tx", "rx";
295	dmas = <&edma0 1 45>,
296	<&edma0 1 44>;
297	status = "disabled";
298	};
299
300	edma0: edma@2c00000 {
301	#dma-cells = <2>;
302	compatible = "fsl,vf610-edma";
303	reg = <0x0 0x2c00000 0x0 0x10000>,
304	<0x0 0x2c10000 0x0 0x10000>,
305	<0x0 0x2c20000 0x0 0x10000>;
306	interrupts = <0 103 IRQ_TYPE_LEVEL_HIGH>,
307	<0 103 IRQ_TYPE_LEVEL_HIGH>;
308	interrupt-names = "edma-tx", "edma-err";
309	dma-channels = <32>;
310	big-endian;
311	clock-names = "dmamux0", "dmamux1";
312	clocks = <&clockgen 4 3>,
313	<&clockgen 4 3>;
314	};
315
316	sata: sata@3200000 {
317	compatible = "fsl,ls1012a-ahci", "fsl,ls1043a-ahci";
427700a7 YT	318	reg = <0x0 0x3200000 0x0 0x10000>,
	319	<0x0 0x20140520 0x0 0x4>;
	320	reg-names = "ahci", "sata-ecc";
ba321360 HR	321	interrupts = <0 69 IRQ_TYPE_LEVEL_HIGH>;
ba321360 HR	322	clocks = <&clockgen 4 0>;
427700a7	323	dma-coherent;
ba321360 HR	324	status = "disabled";
	325	};
	326	};
	327	};