[linux-2.6-block.git] / arch / arm64 / boot / dts / amlogic / meson-gxbb.dtsi

/*
 * Copyright (c) 2016 Andreas Färber
 *
 * This file is dual-licensed: you can use it either under the terms
 * of the GPL or the X11 license, at your option. Note that this dual
 * licensing only applies to this file, and not this project as a
 * whole.
 *
 *  a) This library is free software; you can redistribute it and/or
 *     modify it under the terms of the GNU General Public License as
 *     published by the Free Software Foundation; either version 2 of the
 *     License, or (at your option) any later version.
 *
 *     This library is distributed in the hope that it will be useful,
 *     but WITHOUT ANY WARRANTY; without even the implied warranty of
 *     MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
 *     GNU General Public License for more details.
 *
 * Or, alternatively,
 *
 *  b) Permission is hereby granted, free of charge, to any person
 *     obtaining a copy of this software and associated documentation
 *     files (the "Software"), to deal in the Software without
 *     restriction, including without limitation the rights to use,
 *     copy, modify, merge, publish, distribute, sublicense, and/or
 *     sell copies of the Software, and to permit persons to whom the
 *     Software is furnished to do so, subject to the following
 *     conditions:
 *
 *     The above copyright notice and this permission notice shall be
 *     included in all copies or substantial portions of the Software.
 *
 *     THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 *     EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
 *     OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 *     NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
 *     HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
 *     WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
 *     FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
 *     OTHER DEALINGS IN THE SOFTWARE.
 */

#include "meson-gx.dtsi"
#include <dt-bindings/gpio/meson-gxbb-gpio.h>
#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
#include <dt-bindings/clock/gxbb-clkc.h>
#include <dt-bindings/clock/gxbb-aoclkc.h>
#include <dt-bindings/reset/gxbb-aoclkc.h>

/ {
	compatible = "amlogic,meson-gxbb";

	soc {
		usb0_phy: phy@c0000000 {
			compatible = "amlogic,meson-gxbb-usb2-phy";
			#phy-cells = <0>;
			reg = <0x0 0xc0000000 0x0 0x20>;
			resets = <&reset RESET_USB_OTG>;
			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
			clock-names = "usb_general", "usb";
			status = "disabled";
		};

		usb1_phy: phy@c0000020 {
			compatible = "amlogic,meson-gxbb-usb2-phy";
			#phy-cells = <0>;
			reg = <0x0 0xc0000020 0x0 0x20>;
			resets = <&reset RESET_USB_OTG>;
			clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
			clock-names = "usb_general", "usb";
			status = "disabled";
		};

		usb0: usb@c9000000 {
			compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
			reg = <0x0 0xc9000000 0x0 0x40000>;
			interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
			clock-names = "otg";
			phys = <&usb0_phy>;
			phy-names = "usb2-phy";
			dr_mode = "host";
			status = "disabled";
		};

		usb1: usb@c9100000 {
			compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
			reg = <0x0 0xc9100000 0x0 0x40000>;
			interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
			clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
			clock-names = "otg";
			phys = <&usb1_phy>;
			phy-names = "usb2-phy";
			dr_mode = "host";
			status = "disabled";
		};
	};
};

&cbus {
	spifc: spi@8c80 {
		compatible = "amlogic,meson-gxbb-spifc";
		reg = <0x0 0x08c80 0x0 0x80>;
		#address-cells = <1>;
		#size-cells = <0>;
		clocks = <&clkc CLKID_SPI>;
		status = "disabled";
	};
};

&ethmac {
	clocks = <&clkc CLKID_ETH>,
		 <&clkc CLKID_FCLK_DIV2>,
		 <&clkc CLKID_MPLL2>;
	clock-names = "stmmaceth", "clkin0", "clkin1";
};

&aobus {
	pinctrl_aobus: pinctrl@14 {
		compatible = "amlogic,meson-gxbb-aobus-pinctrl";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		gpio_ao: bank@14 {
			reg = <0x0 0x00014 0x0 0x8>,
			      <0x0 0x0002c 0x0 0x4>,
			      <0x0 0x00024 0x0 0x8>;
			reg-names = "mux", "pull", "gpio";
			gpio-controller;
			#gpio-cells = <2>;
		};

		uart_ao_a_pins: uart_ao_a {
			mux {
				groups = "uart_tx_ao_a", "uart_rx_ao_a";
				function = "uart_ao";
			};
		};

		remote_input_ao_pins: remote_input_ao {
			mux {
				groups = "remote_input_ao";
				function = "remote_input_ao";
			};
		};

		i2c_ao_pins: i2c_ao {
			mux {
				groups = "i2c_sck_ao",
				       "i2c_sda_ao";
				function = "i2c_ao";
			};
		};

		pwm_ao_a_3_pins: pwm_ao_a_3 {
			mux {
				groups = "pwm_ao_a_3";
				function = "pwm_ao_a_3";
			};
		};

		pwm_ao_a_6_pins: pwm_ao_a_6 {
			mux {
				groups = "pwm_ao_a_6";
				function = "pwm_ao_a_6";
			};
		};

		pwm_ao_a_12_pins: pwm_ao_a_12 {
			mux {
				groups = "pwm_ao_a_12";
				function = "pwm_ao_a_12";
			};
		};

		pwm_ao_b_pins: pwm_ao_b {
			mux {
				groups = "pwm_ao_b";
				function = "pwm_ao_b";
			};
		};
	};

	clkc_AO: clock-controller@040 {
		compatible = "amlogic,gxbb-aoclkc";
		reg = <0x0 0x00040 0x0 0x4>;
		#clock-cells = <1>;
		#reset-cells = <1>;
	};

	pwm_ab_AO: pwm@550 {
		compatible = "amlogic,meson-gxbb-pwm";
		reg = <0x0 0x0550 0x0 0x10>;
		#pwm-cells = <3>;
		status = "disabled";
	};

	i2c_AO: i2c@500 {
		compatible = "amlogic,meson-gxbb-i2c";
		reg = <0x0 0x500 0x0 0x20>;
		interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
		clocks = <&clkc CLKID_AO_I2C>;
		#address-cells = <1>;
		#size-cells = <0>;
		status = "disabled";
	};
};

&periphs {
	pinctrl_periphs: pinctrl@4b0 {
		compatible = "amlogic,meson-gxbb-periphs-pinctrl";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		gpio: bank@4b0 {
			reg = <0x0 0x004b0 0x0 0x28>,
			      <0x0 0x004e8 0x0 0x14>,
			      <0x0 0x00120 0x0 0x14>,
			      <0x0 0x00430 0x0 0x40>;
			reg-names = "mux", "pull", "pull-enable", "gpio";
			gpio-controller;
			#gpio-cells = <2>;
		};

		emmc_pins: emmc {
			mux {
				groups = "emmc_nand_d07",
				       "emmc_cmd",
				       "emmc_clk",
				       "emmc_ds";
				function = "emmc";
			};
		};

		nor_pins: nor {
			mux {
				groups = "nor_d",
				       "nor_q",
				       "nor_c",
				       "nor_cs";
				function = "nor";
			};
		};

		sdcard_pins: sdcard {
			mux {
				groups = "sdcard_d0",
				       "sdcard_d1",
				       "sdcard_d2",
				       "sdcard_d3",
				       "sdcard_cmd",
				       "sdcard_clk";
				function = "sdcard";
			};
		};

		sdio_pins: sdio {
			mux {
				groups = "sdio_d0",
				       "sdio_d1",
				       "sdio_d2",
				       "sdio_d3",
				       "sdio_cmd",
				       "sdio_clk";
				function = "sdio";
			};
		};

		sdio_irq_pins: sdio_irq {
			mux {
				groups = "sdio_irq";
				function = "sdio";
			};
		};

		uart_a_pins: uart_a {
			mux {
				groups = "uart_tx_a",
				       "uart_rx_a";
				function = "uart_a";
			};
		};

		uart_b_pins: uart_b {
			mux {
				groups = "uart_tx_b",
				       "uart_rx_b";
				function = "uart_b";
			};
		};

		uart_c_pins: uart_c {
			mux {
				groups = "uart_tx_c",
				       "uart_rx_c";
				function = "uart_c";
			};
		};

		i2c_a_pins: i2c_a {
			mux {
				groups = "i2c_sck_a",
				       "i2c_sda_a";
				function = "i2c_a";
			};
		};

		i2c_b_pins: i2c_b {
			mux {
				groups = "i2c_sck_b",
				       "i2c_sda_b";
				function = "i2c_b";
			};
		};

		i2c_c_pins: i2c_c {
			mux {
				groups = "i2c_sck_c",
				       "i2c_sda_c";
				function = "i2c_c";
			};
		};

		eth_rgmii_pins: eth-rgmii {
			mux {
				groups = "eth_mdio",
				       "eth_mdc",
				       "eth_clk_rx_clk",
				       "eth_rx_dv",
				       "eth_rxd0",
				       "eth_rxd1",
				       "eth_rxd2",
				       "eth_rxd3",
				       "eth_rgmii_tx_clk",
				       "eth_tx_en",
				       "eth_txd0",
				       "eth_txd1",
				       "eth_txd2",
				       "eth_txd3";
				function = "eth";
			};
		};

		eth_rmii_pins: eth-rmii {
			mux {
				groups = "eth_mdio",
				       "eth_mdc",
				       "eth_clk_rx_clk",
				       "eth_rx_dv",
				       "eth_rxd0",
				       "eth_rxd1",
				       "eth_tx_en",
				       "eth_txd0",
				       "eth_txd1";
				function = "eth";
			};
		};

		pwm_a_x_pins: pwm_a_x {
			mux {
				groups = "pwm_a_x";
				function = "pwm_a_x";
			};
		};

		pwm_a_y_pins: pwm_a_y {
			mux {
				groups = "pwm_a_y";
				function = "pwm_a_y";
			};
		};

		pwm_b_pins: pwm_b {
			mux {
				groups = "pwm_b";
				function = "pwm_b";
			};
		};

		pwm_d_pins: pwm_d {
			mux {
				groups = "pwm_d";
				function = "pwm_d";
			};
		};

		pwm_e_pins: pwm_e {
			mux {
				groups = "pwm_e";
				function = "pwm_e";
			};
		};

		pwm_f_x_pins: pwm_f_x {
			mux {
				groups = "pwm_f_x";
				function = "pwm_f_x";
			};
		};

		pwm_f_y_pins: pwm_f_y {
			mux {
				groups = "pwm_f_y";
				function = "pwm_f_y";
			};
		};
	};
};

&hiubus {
	clkc: clock-controller@0 {
		compatible = "amlogic,gxbb-clkc";
		#clock-cells = <1>;
		reg = <0x0 0x0 0x0 0x3db>;
	};
};

&i2c_A {
	clocks = <&clkc CLKID_I2C>;
};

&i2c_B {
	clocks = <&clkc CLKID_I2C>;
};

&i2c_C {
	clocks = <&clkc CLKID_I2C>;
};

&sd_emmc_a {
	clocks = <&clkc CLKID_SD_EMMC_A>,
		 <&xtal>,
		 <&clkc CLKID_FCLK_DIV2>;
	clock-names = "core", "clkin0", "clkin1";
};

&sd_emmc_b {
	clocks = <&clkc CLKID_SD_EMMC_B>,
		 <&xtal>,
		 <&clkc CLKID_FCLK_DIV2>;
	clock-names = "core", "clkin0", "clkin1";
};

&sd_emmc_c {
	clocks = <&clkc CLKID_SD_EMMC_C>,
		 <&xtal>,
		 <&clkc CLKID_FCLK_DIV2>;
	clock-names = "core", "clkin0", "clkin1";
};

&vpu {
	compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
};
Commit	Line	Data
4f24eda8 AF	1	/*
	2	* Copyright (c) 2016 Andreas Färber
	3	*
	4	* This file is dual-licensed: you can use it either under the terms
	5	* of the GPL or the X11 license, at your option. Note that this dual
	6	* licensing only applies to this file, and not this project as a
	7	* whole.
	8	*
	9	* a) This library is free software; you can redistribute it and/or
	10	* modify it under the terms of the GNU General Public License as
	11	* published by the Free Software Foundation; either version 2 of the
	12	* License, or (at your option) any later version.
	13	*
	14	* This library is distributed in the hope that it will be useful,
	15	* but WITHOUT ANY WARRANTY; without even the implied warranty of
	16	* MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
	17	* GNU General Public License for more details.
	18	*
	19	* Or, alternatively,
	20	*
	21	* b) Permission is hereby granted, free of charge, to any person
	22	* obtaining a copy of this software and associated documentation
	23	* files (the "Software"), to deal in the Software without
	24	* restriction, including without limitation the rights to use,
	25	* copy, modify, merge, publish, distribute, sublicense, and/or
	26	* sell copies of the Software, and to permit persons to whom the
	27	* Software is furnished to do so, subject to the following
	28	* conditions:
	29	*
	30	* The above copyright notice and this permission notice shall be
	31	* included in all copies or substantial portions of the Software.
	32	*
	33	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
	34	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES
	35	* OF MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
	36	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT
	37	* HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY,
	38	* WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
	39	* FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
	40	* OTHER DEALINGS IN THE SOFTWARE.
	41	*/
	42
c328666d	43	#include "meson-gx.dtsi"
f40d437f	44	#include <dt-bindings/gpio/meson-gxbb-gpio.h>
6d1a5c93	45	#include <dt-bindings/reset/amlogic,meson-gxbb-reset.h>
c3929b72	46	#include <dt-bindings/clock/gxbb-clkc.h>
8d298f5b NA	47	#include <dt-bindings/clock/gxbb-aoclkc.h>
8d298f5b NA	48	#include <dt-bindings/reset/gxbb-aoclkc.h>
4f24eda8 AF	49
	50	/ {
	51	compatible = "amlogic,meson-gxbb";
4f24eda8	52
4f24eda8	53	soc {
566603e5 MB	54	usb0_phy: phy@c0000000 {
	55	compatible = "amlogic,meson-gxbb-usb2-phy";
	56	#phy-cells = <0>;
	57	reg = <0x0 0xc0000000 0x0 0x20>;
	58	resets = <&reset RESET_USB_OTG>;
	59	clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB0>;
	60	clock-names = "usb_general", "usb";
	61	status = "disabled";
	62	};
	63
	64	usb1_phy: phy@c0000020 {
	65	compatible = "amlogic,meson-gxbb-usb2-phy";
	66	#phy-cells = <0>;
	67	reg = <0x0 0xc0000020 0x0 0x20>;
a5b1ef3c	68	resets = <&reset RESET_USB_OTG>;
566603e5 MB	69	clocks = <&clkc CLKID_USB>, <&clkc CLKID_USB1>;
	70	clock-names = "usb_general", "usb";
	71	status = "disabled";
	72	};
	73
c328666d NA	74	usb0: usb@c9000000 {
	75	compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
	76	reg = <0x0 0xc9000000 0x0 0x40000>;
	77	interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
	78	clocks = <&clkc CLKID_USB0_DDR_BRIDGE>;
	79	clock-names = "otg";
	80	phys = <&usb0_phy>;
	81	phy-names = "usb2-phy";
	82	dr_mode = "host";
	83	status = "disabled";
	84	};
4f24eda8	85
c328666d NA	86	usb1: usb@c9100000 {
	87	compatible = "amlogic,meson-gxbb-usb", "snps,dwc2";
	88	reg = <0x0 0xc9100000 0x0 0x40000>;
	89	interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
	90	clocks = <&clkc CLKID_USB1_DDR_BRIDGE>;
	91	clock-names = "otg";
	92	phys = <&usb1_phy>;
	93	phy-names = "usb2-phy";
	94	dr_mode = "host";
	95	status = "disabled";
	96	};
c328666d NA	97	};
	98	};
	99
	100	&cbus {
c328666d NA	101	spifc: spi@8c80 {
	102	compatible = "amlogic,meson-gxbb-spifc";
	103	reg = <0x0 0x08c80 0x0 0x80>;
	104	#address-cells = <1>;
	105	#size-cells = <0>;
	106	clocks = <&clkc CLKID_SPI>;
	107	status = "disabled";
	108	};
998a9c8a	109	};
c328666d	110
998a9c8a NA	111	&ethmac {
	112	clocks = <&clkc CLKID_ETH>,
	113	<&clkc CLKID_FCLK_DIV2>,
	114	<&clkc CLKID_MPLL2>;
	115	clock-names = "stmmaceth", "clkin0", "clkin1";
c328666d NA	116	};
	117
	118	&aobus {
	119	pinctrl_aobus: pinctrl@14 {
	120	compatible = "amlogic,meson-gxbb-aobus-pinctrl";
	121	#address-cells = <2>;
	122	#size-cells = <2>;
	123	ranges;
8e6320dd	124
c328666d NA	125	gpio_ao: bank@14 {
	126	reg = <0x0 0x00014 0x0 0x8>,
	127	<0x0 0x0002c 0x0 0x4>,
	128	<0x0 0x00024 0x0 0x8>;
	129	reg-names = "mux", "pull", "gpio";
	130	gpio-controller;
	131	#gpio-cells = <2>;
	132	};
	133
	134	uart_ao_a_pins: uart_ao_a {
	135	mux {
	136	groups = "uart_tx_ao_a", "uart_rx_ao_a";
	137	function = "uart_ao";
8e6320dd	138	};
c328666d	139	};
8e6320dd	140
c328666d NA	141	remote_input_ao_pins: remote_input_ao {
	142	mux {
	143	groups = "remote_input_ao";
	144	function = "remote_input_ao";
8f14a893	145	};
c328666d	146	};
8f14a893	147
c328666d NA	148	i2c_ao_pins: i2c_ao {
	149	mux {
	150	groups = "i2c_sck_ao",
	151	"i2c_sda_ao";
	152	function = "i2c_ao";
8f14a893	153	};
c328666d	154	};
8f14a893	155
c328666d NA	156	pwm_ao_a_3_pins: pwm_ao_a_3 {
	157	mux {
	158	groups = "pwm_ao_a_3";
	159	function = "pwm_ao_a_3";
8f14a893	160	};
c328666d	161	};
8f14a893	162
c328666d NA	163	pwm_ao_a_6_pins: pwm_ao_a_6 {
	164	mux {
	165	groups = "pwm_ao_a_6";
	166	function = "pwm_ao_a_6";
8e6320dd	167	};
c328666d	168	};
f759b640	169
c328666d NA	170	pwm_ao_a_12_pins: pwm_ao_a_12 {
	171	mux {
	172	groups = "pwm_ao_a_12";
	173	function = "pwm_ao_a_12";
f759b640	174	};
c328666d	175	};
e9c9b651	176
c328666d NA	177	pwm_ao_b_pins: pwm_ao_b {
	178	mux {
	179	groups = "pwm_ao_b";
	180	function = "pwm_ao_b";
e9c9b651	181	};
c328666d NA	182	};
	183	};
	184
	185	clkc_AO: clock-controller@040 {
	186	compatible = "amlogic,gxbb-aoclkc";
	187	reg = <0x0 0x00040 0x0 0x4>;
	188	#clock-cells = <1>;
	189	#reset-cells = <1>;
	190	};
	191
c328666d NA	192	pwm_ab_AO: pwm@550 {
	193	compatible = "amlogic,meson-gxbb-pwm";
	194	reg = <0x0 0x0550 0x0 0x10>;
	195	#pwm-cells = <3>;
	196	status = "disabled";
	197	};
	198
	199	i2c_AO: i2c@500 {
	200	compatible = "amlogic,meson-gxbb-i2c";
	201	reg = <0x0 0x500 0x0 0x20>;
	202	interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
	203	clocks = <&clkc CLKID_AO_I2C>;
	204	#address-cells = <1>;
	205	#size-cells = <0>;
	206	status = "disabled";
	207	};
	208	};
	209
	210	&periphs {
c328666d NA	211	pinctrl_periphs: pinctrl@4b0 {
	212	compatible = "amlogic,meson-gxbb-periphs-pinctrl";
	213	#address-cells = <2>;
	214	#size-cells = <2>;
	215	ranges;
	216
	217	gpio: bank@4b0 {
	218	reg = <0x0 0x004b0 0x0 0x28>,
	219	<0x0 0x004e8 0x0 0x14>,
	220	<0x0 0x00120 0x0 0x14>,
	221	<0x0 0x00430 0x0 0x40>;
	222	reg-names = "mux", "pull", "pull-enable", "gpio";
	223	gpio-controller;
	224	#gpio-cells = <2>;
	225	};
1befc626	226
c328666d NA	227	emmc_pins: emmc {
	228	mux {
	229	groups = "emmc_nand_d07",
	230	"emmc_cmd",
ef8d2ffe KH	231	"emmc_clk",
ef8d2ffe KH	232	"emmc_ds";
c328666d	233	function = "emmc";
1befc626	234	};
c328666d	235	};
1befc626	236
c328666d NA	237	nor_pins: nor {
	238	mux {
	239	groups = "nor_d",
	240	"nor_q",
	241	"nor_c",
	242	"nor_cs";
	243	function = "nor";
1befc626	244	};
c328666d	245	};
1befc626	246
c328666d NA	247	sdcard_pins: sdcard {
	248	mux {
	249	groups = "sdcard_d0",
	250	"sdcard_d1",
	251	"sdcard_d2",
	252	"sdcard_d3",
	253	"sdcard_cmd",
	254	"sdcard_clk";
	255	function = "sdcard";
1befc626	256	};
4f24eda8 AF	257	};
4f24eda8 AF	258
c328666d NA	259	sdio_pins: sdio {
	260	mux {
	261	groups = "sdio_d0",
	262	"sdio_d1",
	263	"sdio_d2",
	264	"sdio_d3",
	265	"sdio_cmd",
	266	"sdio_clk";
	267	function = "sdio";
f40d437f	268	};
c328666d	269	};
f40d437f	270
c328666d NA	271	sdio_irq_pins: sdio_irq {
	272	mux {
	273	groups = "sdio_irq";
	274	function = "sdio";
f40d437f	275	};
c328666d	276	};
f40d437f	277
c328666d NA	278	uart_a_pins: uart_a {
	279	mux {
	280	groups = "uart_tx_a",
	281	"uart_rx_a";
	282	function = "uart_a";
4f24eda8	283	};
c328666d	284	};
c58d7785	285
c328666d NA	286	uart_b_pins: uart_b {
	287	mux {
	288	groups = "uart_tx_b",
	289	"uart_rx_b";
	290	function = "uart_b";
c58d7785	291	};
c328666d	292	};
8f14a893	293
c328666d NA	294	uart_c_pins: uart_c {
	295	mux {
	296	groups = "uart_tx_c",
	297	"uart_rx_c";
	298	function = "uart_c";
8f14a893	299	};
c328666d	300	};
1befc626	301
c328666d NA	302	i2c_a_pins: i2c_a {
	303	mux {
	304	groups = "i2c_sck_a",
	305	"i2c_sda_a";
	306	function = "i2c_a";
1befc626	307	};
4f24eda8 AF	308	};
4f24eda8 AF	309
c328666d NA	310	i2c_b_pins: i2c_b {
	311	mux {
	312	groups = "i2c_sck_b",
	313	"i2c_sda_b";
	314	function = "i2c_b";
	315	};
	316	};
f40d437f	317
c328666d NA	318	i2c_c_pins: i2c_c {
	319	mux {
	320	groups = "i2c_sck_c",
	321	"i2c_sda_c";
	322	function = "i2c_c";
4b7bed38	323	};
c328666d	324	};
4b7bed38	325
3be2d9cf	326	eth_rgmii_pins: eth-rgmii {
c328666d NA	327	mux {
	328	groups = "eth_mdio",
	329	"eth_mdc",
	330	"eth_clk_rx_clk",
	331	"eth_rx_dv",
	332	"eth_rxd0",
	333	"eth_rxd1",
	334	"eth_rxd2",
	335	"eth_rxd3",
	336	"eth_rgmii_tx_clk",
	337	"eth_tx_en",
	338	"eth_txd0",
	339	"eth_txd1",
	340	"eth_txd2",
	341	"eth_txd3";
	342	function = "eth";
f40d437f	343	};
fab6b48c CC	344	};
fab6b48c CC	345
3be2d9cf NA	346	eth_rmii_pins: eth-rmii {
	347	mux {
	348	groups = "eth_mdio",
	349	"eth_mdc",
	350	"eth_clk_rx_clk",
	351	"eth_rx_dv",
	352	"eth_rxd0",
	353	"eth_rxd1",
	354	"eth_tx_en",
	355	"eth_txd0",
	356	"eth_txd1";
	357	function = "eth";
	358	};
	359	};
	360
c328666d NA	361	pwm_a_x_pins: pwm_a_x {
	362	mux {
	363	groups = "pwm_a_x";
	364	function = "pwm_a_x";
	365	};
	366	};
ba6a6c7f	367
c328666d NA	368	pwm_a_y_pins: pwm_a_y {
	369	mux {
	370	groups = "pwm_a_y";
	371	function = "pwm_a_y";
ba6a6c7f	372	};
c328666d	373	};
7b5682c6	374
c328666d NA	375	pwm_b_pins: pwm_b {
	376	mux {
	377	groups = "pwm_b";
	378	function = "pwm_b";
7b5682c6	379	};
fab6b48c CC	380	};
fab6b48c CC	381
c328666d NA	382	pwm_d_pins: pwm_d {
	383	mux {
	384	groups = "pwm_d";
	385	function = "pwm_d";
	386	};
4f24eda8	387	};
8c5509f0	388
c328666d NA	389	pwm_e_pins: pwm_e {
	390	mux {
	391	groups = "pwm_e";
	392	function = "pwm_e";
	393	};
566603e5 MB	394	};
566603e5 MB	395
c328666d NA	396	pwm_f_x_pins: pwm_f_x {
	397	mux {
	398	groups = "pwm_f_x";
	399	function = "pwm_f_x";
	400	};
566603e5 MB	401	};
566603e5 MB	402
c328666d NA	403	pwm_f_y_pins: pwm_f_y {
	404	mux {
	405	groups = "pwm_f_y";
	406	function = "pwm_f_y";
	407	};
8c5509f0	408	};
4f24eda8 AF	409	};
4f24eda8 AF	410	};
c328666d NA	411
	412	&hiubus {
	413	clkc: clock-controller@0 {
	414	compatible = "amlogic,gxbb-clkc";
	415	#clock-cells = <1>;
	416	reg = <0x0 0x0 0x0 0x3db>;
	417	};
998a9c8a	418	};
c328666d	419
998a9c8a NA	420	&i2c_A {
	421	clocks = <&clkc CLKID_I2C>;
	422	};
	423
	424	&i2c_B {
	425	clocks = <&clkc CLKID_I2C>;
	426	};
	427
	428	&i2c_C {
	429	clocks = <&clkc CLKID_I2C>;
c328666d	430	};
ef8d2ffe KH	431
	432	&sd_emmc_a {
	433	clocks = <&clkc CLKID_SD_EMMC_A>,
	434	<&xtal>,
	435	<&clkc CLKID_FCLK_DIV2>;
	436	clock-names = "core", "clkin0", "clkin1";
	437	};
	438
	439	&sd_emmc_b {
	440	clocks = <&clkc CLKID_SD_EMMC_B>,
	441	<&xtal>,
	442	<&clkc CLKID_FCLK_DIV2>;
	443	clock-names = "core", "clkin0", "clkin1";
	444	};
	445
	446	&sd_emmc_c {
	447	clocks = <&clkc CLKID_SD_EMMC_C>,
	448	<&xtal>,
	449	<&clkc CLKID_FCLK_DIV2>;
	450	clock-names = "core", "clkin0", "clkin1";
	451	};
fafdbdf7 NA	452
	453	&vpu {
	454	compatible = "amlogic,meson-gxbb-vpu", "amlogic,meson-gx-vpu";
	455	};