[linux-2.6-block.git] / arch / arm64 / boot / dts / amlogic / meson-gx.dtsi

// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
/*
 * Copyright (c) 2016 Andreas Färber
 *
 * Copyright (c) 2016 BayLibre, SAS.
 * Author: Neil Armstrong <narmstrong@baylibre.com>
 *
 * Copyright (c) 2016 Endless Computers, Inc.
 * Author: Carlo Caione <carlo@endlessm.com>
 */

#include <dt-bindings/gpio/gpio.h>
#include <dt-bindings/interrupt-controller/irq.h>
#include <dt-bindings/interrupt-controller/arm-gic.h>

/ {
	interrupt-parent = <&gic>;
	#address-cells = <2>;
	#size-cells = <2>;

	reserved-memory {
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		/* 16 MiB reserved for Hardware ROM Firmware */
		hwrom_reserved: hwrom@0 {
			reg = <0x0 0x0 0x0 0x1000000>;
			no-map;
		};

		/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
		secmon_reserved: secmon@10000000 {
			reg = <0x0 0x10000000 0x0 0x200000>;
			no-map;
		};

		/* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
		secmon_reserved_alt: secmon@5000000 {
			reg = <0x0 0x05000000 0x0 0x300000>;
			no-map;
		};

		linux,cma {
			compatible = "shared-dma-pool";
			reusable;
			size = <0x0 0x10000000>;
			alignment = <0x0 0x400000>;
			linux,cma-default;
		};
	};

	cpus {
		#address-cells = <0x2>;
		#size-cells = <0x0>;

		cpu0: cpu@0 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x0 0x0>;
			enable-method = "psci";
			next-level-cache = <&l2>;
			clocks = <&scpi_dvfs 0>;
		};

		cpu1: cpu@1 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x0 0x1>;
			enable-method = "psci";
			next-level-cache = <&l2>;
			clocks = <&scpi_dvfs 0>;
		};

		cpu2: cpu@2 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x0 0x2>;
			enable-method = "psci";
			next-level-cache = <&l2>;
			clocks = <&scpi_dvfs 0>;
		};

		cpu3: cpu@3 {
			device_type = "cpu";
			compatible = "arm,cortex-a53", "arm,armv8";
			reg = <0x0 0x3>;
			enable-method = "psci";
			next-level-cache = <&l2>;
			clocks = <&scpi_dvfs 0>;
		};

		l2: l2-cache0 {
			compatible = "cache";
		};
	};

	arm-pmu {
		compatible = "arm,cortex-a53-pmu";
		interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
			     <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
		interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
	};

	psci {
		compatible = "arm,psci-0.2";
		method = "smc";
	};

	timer {
		compatible = "arm,armv8-timer";
		interrupts = <GIC_PPI 13
			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 14
			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 11
			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>,
			     <GIC_PPI 10
			(GIC_CPU_MASK_RAW(0xff) | IRQ_TYPE_LEVEL_LOW)>;
	};

	xtal: xtal-clk {
		compatible = "fixed-clock";
		clock-frequency = <24000000>;
		clock-output-names = "xtal";
		#clock-cells = <0>;
	};

	firmware {
		sm: secure-monitor {
			compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
		};
	};

	efuse: efuse {
		compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
		#address-cells = <1>;
		#size-cells = <1>;
		read-only;

		sn: sn@14 {
			reg = <0x14 0x10>;
		};

		eth_mac: eth_mac@34 {
			reg = <0x34 0x10>;
		};

		bid: bid@46 {
			reg = <0x46 0x30>;
		};
	};

	scpi {
		compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
		mboxes = <&mailbox 1 &mailbox 2>;
		shmem = <&cpu_scp_lpri &cpu_scp_hpri>;

		scpi_clocks: clocks {
			compatible = "arm,scpi-clocks";

			scpi_dvfs: scpi_clocks@0 {
				compatible = "arm,scpi-dvfs-clocks";
				#clock-cells = <1>;
				clock-indices = <0>;
				clock-output-names = "vcpu";
			};
		};

		scpi_sensors: sensors {
			compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
			#thermal-sensor-cells = <1>;
		};
	};

	soc {
		compatible = "simple-bus";
		#address-cells = <2>;
		#size-cells = <2>;
		ranges;

		cbus: bus@c1100000 {
			compatible = "simple-bus";
			reg = <0x0 0xc1100000 0x0 0x100000>;
			#address-cells = <2>;
			#size-cells = <2>;
			ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;

			gpio_intc: interrupt-controller@9880 {
				compatible = "amlogic,meson-gpio-intc";
				reg = <0x0 0x9880 0x0 0x10>;
				interrupt-controller;
				#interrupt-cells = <2>;
				amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
				status = "disabled";
			};

			reset: reset-controller@4404 {
				compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset";
				reg = <0x0 0x04404 0x0 0x9c>;
				#reset-cells = <1>;
			};

			uart_A: serial@84c0 {
				compatible = "amlogic,meson-gx-uart";
				reg = <0x0 0x84c0 0x0 0x18>;
				interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
				status = "disabled";
			};

			uart_B: serial@84dc {
				compatible = "amlogic,meson-gx-uart";
				reg = <0x0 0x84dc 0x0 0x18>;
				interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
				status = "disabled";
			};

			i2c_A: i2c@8500 {
				compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
				reg = <0x0 0x08500 0x0 0x20>;
				interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			pwm_ab: pwm@8550 {
				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
				reg = <0x0 0x08550 0x0 0x10>;
				#pwm-cells = <3>;
				status = "disabled";
			};

			pwm_cd: pwm@8650 {
				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
				reg = <0x0 0x08650 0x0 0x10>;
				#pwm-cells = <3>;
				status = "disabled";
			};

			saradc: adc@8680 {
				compatible = "amlogic,meson-saradc";
				reg = <0x0 0x8680 0x0 0x34>;
				#io-channel-cells = <1>;
				interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
				status = "disabled";
			};

			pwm_ef: pwm@86c0 {
				compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
				reg = <0x0 0x086c0 0x0 0x10>;
				#pwm-cells = <3>;
				status = "disabled";
			};

			uart_C: serial@8700 {
				compatible = "amlogic,meson-gx-uart";
				reg = <0x0 0x8700 0x0 0x18>;
				interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
				status = "disabled";
			};

			clock-measure@8758 {
				compatible = "amlogic,meson-gx-clk-measure";
				reg = <0x0 0x8758 0x0 0x10>;
			};

			i2c_B: i2c@87c0 {
				compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
				reg = <0x0 0x087c0 0x0 0x20>;
				interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			i2c_C: i2c@87e0 {
				compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
				reg = <0x0 0x087e0 0x0 0x20>;
				interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			spicc: spi@8d80 {
				compatible = "amlogic,meson-gx-spicc";
				reg = <0x0 0x08d80 0x0 0x80>;
				interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			spifc: spi@8c80 {
				compatible = "amlogic,meson-gx-spifc", "amlogic,meson-gxbb-spifc";
				reg = <0x0 0x08c80 0x0 0x80>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			watchdog@98d0 {
				compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt";
				reg = <0x0 0x098d0 0x0 0x10>;
				clocks = <&xtal>;
			};
		};

		gic: interrupt-controller@c4301000 {
			compatible = "arm,gic-400";
			reg = <0x0 0xc4301000 0 0x1000>,
			      <0x0 0xc4302000 0 0x2000>,
			      <0x0 0xc4304000 0 0x2000>,
			      <0x0 0xc4306000 0 0x2000>;
			interrupt-controller;
			interrupts = <GIC_PPI 9
				(GIC_CPU_MASK_SIMPLE(8) | IRQ_TYPE_LEVEL_HIGH)>;
			#interrupt-cells = <3>;
			#address-cells = <0>;
		};

		sram: sram@c8000000 {
			compatible = "amlogic,meson-gx-sram", "amlogic,meson-gxbb-sram", "mmio-sram";
			reg = <0x0 0xc8000000 0x0 0x14000>;

			#address-cells = <1>;
			#size-cells = <1>;
			ranges = <0 0x0 0xc8000000 0x14000>;

			cpu_scp_lpri: scp-shmem@0 {
				compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
				reg = <0x13000 0x400>;
			};

			cpu_scp_hpri: scp-shmem@200 {
				compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
				reg = <0x13400 0x400>;
			};
		};

		aobus: bus@c8100000 {
			compatible = "simple-bus";
			reg = <0x0 0xc8100000 0x0 0x100000>;
			#address-cells = <2>;
			#size-cells = <2>;
			ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;

			sysctrl_AO: sys-ctrl@0 {
				compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
				reg =  <0x0 0x0 0x0 0x100>;

				pwrc_vpu: power-controller-vpu {
					compatible = "amlogic,meson-gx-pwrc-vpu";
					#power-domain-cells = <0>;
					amlogic,hhi-sysctrl = <&sysctrl>;
				};

				clkc_AO: clock-controller {
					compatible = "amlogic,meson-gx-aoclkc";
					#clock-cells = <1>;
					#reset-cells = <1>;
				};
			};

			cec_AO: cec@100 {
				compatible = "amlogic,meson-gx-ao-cec";
				reg = <0x0 0x00100 0x0 0x14>;
				interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
			};

			sec_AO: ao-secure@140 {
				compatible = "amlogic,meson-gx-ao-secure", "syscon";
				reg = <0x0 0x140 0x0 0x140>;
				amlogic,has-chip-id;
			};

			uart_AO: serial@4c0 {
				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
				reg = <0x0 0x004c0 0x0 0x18>;
				interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
				status = "disabled";
			};

			uart_AO_B: serial@4e0 {
				compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
				reg = <0x0 0x004e0 0x0 0x18>;
				interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
				status = "disabled";
			};

			i2c_AO: i2c@500 {
				compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
				reg = <0x0 0x500 0x0 0x20>;
				interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
				#address-cells = <1>;
				#size-cells = <0>;
				status = "disabled";
			};

			pwm_AO_ab: pwm@550 {
				compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
				reg = <0x0 0x00550 0x0 0x10>;
				#pwm-cells = <3>;
				status = "disabled";
			};

			ir: ir@580 {
				compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
				reg = <0x0 0x00580 0x0 0x40>;
				interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
				status = "disabled";
			};
		};

		periphs: periphs@c8834000 {
			compatible = "simple-bus";
			reg = <0x0 0xc8834000 0x0 0x2000>;
			#address-cells = <2>;
			#size-cells = <2>;
			ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;

			hwrng: rng {
				compatible = "amlogic,meson-rng";
				reg = <0x0 0x0 0x0 0x4>;
			};
		};

		dmcbus: bus@c8838000 {
			compatible = "simple-bus";
			reg = <0x0 0xc8838000 0x0 0x400>;
			#address-cells = <2>;
			#size-cells = <2>;
			ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;

			canvas: video-lut@48 {
				compatible = "amlogic,canvas";
				reg = <0x0 0x48 0x0 0x14>;
			};
		};

		hiubus: bus@c883c000 {
			compatible = "simple-bus";
			reg = <0x0 0xc883c000 0x0 0x2000>;
			#address-cells = <2>;
			#size-cells = <2>;
			ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;

			sysctrl: system-controller@0 {
				compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
				reg = <0 0 0 0x400>;
			};

			mailbox: mailbox@404 {
				compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
				reg = <0 0x404 0 0x4c>;
				interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
					     <GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
					     <GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
				#mbox-cells = <1>;
			};
		};

		ethmac: ethernet@c9410000 {
			compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac";
			reg = <0x0 0xc9410000 0x0 0x10000
			       0x0 0xc8834540 0x0 0x4>;
			interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
			interrupt-names = "macirq";
			status = "disabled";
		};

		apb: apb@d0000000 {
			compatible = "simple-bus";
			reg = <0x0 0xd0000000 0x0 0x200000>;
			#address-cells = <2>;
			#size-cells = <2>;
			ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;

			sd_emmc_a: mmc@70000 {
				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
				reg = <0x0 0x70000 0x0 0x800>;
				interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
				status = "disabled";
			};

			sd_emmc_b: mmc@72000 {
				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
				reg = <0x0 0x72000 0x0 0x800>;
				interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
				status = "disabled";
			};

			sd_emmc_c: mmc@74000 {
				compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
				reg = <0x0 0x74000 0x0 0x800>;
				interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
				status = "disabled";
			};
		};

		vpu: vpu@d0100000 {
			compatible = "amlogic,meson-gx-vpu";
			reg = <0x0 0xd0100000 0x0 0x100000>,
			      <0x0 0xc883c000 0x0 0x1000>,
			      <0x0 0xc8838000 0x0 0x1000>;
			reg-names = "vpu", "hhi", "dmc";
			interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
			#address-cells = <1>;
			#size-cells = <0>;

			/* CVBS VDAC output port */
			cvbs_vdac_port: port@0 {
				reg = <0>;
			};

			/* HDMI-TX output port */
			hdmi_tx_port: port@1 {
				reg = <1>;

				hdmi_tx_out: endpoint {
					remote-endpoint = <&hdmi_tx_in>;
				};
			};
		};

		hdmi_tx: hdmi-tx@c883a000 {
			compatible = "amlogic,meson-gx-dw-hdmi";
			reg = <0x0 0xc883a000 0x0 0x1c>;
			interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
			#address-cells = <1>;
			#size-cells = <0>;
			status = "disabled";

			/* VPU VENC Input */
			hdmi_tx_venc_port: port@0 {
				reg = <0>;

				hdmi_tx_in: endpoint {
					remote-endpoint = <&hdmi_tx_out>;
				};
			};

			/* TMDS Output */
			hdmi_tx_tmds_port: port@1 {
				reg = <1>;
			};
		};
	};
};
Commit	Line	Data
114abfe1	1	// SPDX-License-Identifier: (GPL-2.0+ OR MIT)
c328666d	2	/*
0e26f26f AF	3	* Copyright (c) 2016 Andreas Färber
0e26f26f AF	4	*
c328666d NA	5	* Copyright (c) 2016 BayLibre, SAS.
	6	* Author: Neil Armstrong <narmstrong@baylibre.com>
	7	*
	8	* Copyright (c) 2016 Endless Computers, Inc.
	9	* Author: Carlo Caione <carlo@endlessm.com>
c328666d NA	10	*/
	11
	12	#include <dt-bindings/gpio/gpio.h>
	13	#include <dt-bindings/interrupt-controller/irq.h>
	14	#include <dt-bindings/interrupt-controller/arm-gic.h>
	15
	16	/ {
	17	interrupt-parent = <&gic>;
	18	#address-cells = <2>;
	19	#size-cells = <2>;
	20
bba8e3f4 NA	21	reserved-memory {
	22	#address-cells = <2>;
	23	#size-cells = <2>;
	24	ranges;
	25
	26	/* 16 MiB reserved for Hardware ROM Firmware */
	27	hwrom_reserved: hwrom@0 {
	28	reg = <0x0 0x0 0x0 0x1000000>;
	29	no-map;
	30	};
	31
	32	/* 2 MiB reserved for ARM Trusted Firmware (BL31) */
	33	secmon_reserved: secmon@10000000 {
	34	reg = <0x0 0x10000000 0x0 0x200000>;
	35	no-map;
	36	};
e9da7282	37
48e21ded KH	38	/* Alternate 3 MiB reserved for ARM Trusted Firmware (BL31) */
	39	secmon_reserved_alt: secmon@5000000 {
	40	reg = <0x0 0x05000000 0x0 0x300000>;
	41	no-map;
	42	};
	43
e9da7282 NA	44	linux,cma {
	45	compatible = "shared-dma-pool";
	46	reusable;
4cbef415	47	size = <0x0 0x10000000>;
e9da7282 NA	48	alignment = <0x0 0x400000>;
	49	linux,cma-default;
	50	};
bba8e3f4 NA	51	};
bba8e3f4 NA	52
c328666d NA	53	cpus {
	54	#address-cells = <0x2>;
	55	#size-cells = <0x0>;
	56
	57	cpu0: cpu@0 {
	58	device_type = "cpu";
	59	compatible = "arm,cortex-a53", "arm,armv8";
	60	reg = <0x0 0x0>;
	61	enable-method = "psci";
214ec523	62	next-level-cache = <&l2>;
47961f13	63	clocks = <&scpi_dvfs 0>;
c328666d NA	64	};
	65
	66	cpu1: cpu@1 {
	67	device_type = "cpu";
	68	compatible = "arm,cortex-a53", "arm,armv8";
	69	reg = <0x0 0x1>;
	70	enable-method = "psci";
214ec523	71	next-level-cache = <&l2>;
47961f13	72	clocks = <&scpi_dvfs 0>;
c328666d NA	73	};
	74
	75	cpu2: cpu@2 {
	76	device_type = "cpu";
	77	compatible = "arm,cortex-a53", "arm,armv8";
	78	reg = <0x0 0x2>;
	79	enable-method = "psci";
214ec523	80	next-level-cache = <&l2>;
47961f13	81	clocks = <&scpi_dvfs 0>;
c328666d NA	82	};
	83
	84	cpu3: cpu@3 {
	85	device_type = "cpu";
	86	compatible = "arm,cortex-a53", "arm,armv8";
	87	reg = <0x0 0x3>;
	88	enable-method = "psci";
214ec523	89	next-level-cache = <&l2>;
47961f13	90	clocks = <&scpi_dvfs 0>;
214ec523 NA	91	};
	92
	93	l2: l2-cache0 {
	94	compatible = "cache";
c328666d NA	95	};
	96	};
	97
	98	arm-pmu {
	99	compatible = "arm,cortex-a53-pmu";
	100	interrupts = <GIC_SPI 137 IRQ_TYPE_LEVEL_HIGH>,
	101	<GIC_SPI 138 IRQ_TYPE_LEVEL_HIGH>,
	102	<GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>,
	103	<GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
	104	interrupt-affinity = <&cpu0>, <&cpu1>, <&cpu2>, <&cpu3>;
	105	};
	106
	107	psci {
	108	compatible = "arm,psci-0.2";
	109	method = "smc";
	110	};
	111
	112	timer {
	113	compatible = "arm,armv8-timer";
	114	interrupts = <GIC_PPI 13
	115	(GIC_CPU_MASK_RAW(0xff) \| IRQ_TYPE_LEVEL_LOW)>,
	116	<GIC_PPI 14
	117	(GIC_CPU_MASK_RAW(0xff) \| IRQ_TYPE_LEVEL_LOW)>,
	118	<GIC_PPI 11
	119	(GIC_CPU_MASK_RAW(0xff) \| IRQ_TYPE_LEVEL_LOW)>,
	120	<GIC_PPI 10
	121	(GIC_CPU_MASK_RAW(0xff) \| IRQ_TYPE_LEVEL_LOW)>;
	122	};
	123
	124	xtal: xtal-clk {
	125	compatible = "fixed-clock";
	126	clock-frequency = <24000000>;
	127	clock-output-names = "xtal";
	128	#clock-cells = <0>;
	129	};
	130
998a9c8a NA	131	firmware {
	132	sm: secure-monitor {
	133	compatible = "amlogic,meson-gx-sm", "amlogic,meson-gxbb-sm";
	134	};
	135	};
	136
	137	efuse: efuse {
	138	compatible = "amlogic,meson-gx-efuse", "amlogic,meson-gxbb-efuse";
	139	#address-cells = <1>;
	140	#size-cells = <1>;
c339f0e2	141	read-only;
998a9c8a NA	142
	143	sn: sn@14 {
	144	reg = <0x14 0x10>;
	145	};
	146
	147	eth_mac: eth_mac@34 {
	148	reg = <0x34 0x10>;
	149	};
	150
	151	bid: bid@46 {
	152	reg = <0x46 0x30>;
	153	};
	154	};
	155
47961f13 MB	156	scpi {
	157	compatible = "amlogic,meson-gxbb-scpi", "arm,scpi-pre-1.0";
	158	mboxes = <&mailbox 1 &mailbox 2>;
	159	shmem = <&cpu_scp_lpri &cpu_scp_hpri>;
	160
	161	scpi_clocks: clocks {
	162	compatible = "arm,scpi-clocks";
	163
	164	scpi_dvfs: scpi_clocks@0 {
	165	compatible = "arm,scpi-dvfs-clocks";
	166	#clock-cells = <1>;
	167	clock-indices = <0>;
	168	clock-output-names = "vcpu";
	169	};
	170	};
	171
	172	scpi_sensors: sensors {
5f3195ec	173	compatible = "amlogic,meson-gxbb-scpi-sensors", "arm,scpi-sensors";
47961f13 MB	174	#thermal-sensor-cells = <1>;
	175	};
	176	};
	177
c328666d NA	178	soc {
	179	compatible = "simple-bus";
	180	#address-cells = <2>;
	181	#size-cells = <2>;
	182	ranges;
	183
0cb6c604	184	cbus: bus@c1100000 {
c328666d NA	185	compatible = "simple-bus";
	186	reg = <0x0 0xc1100000 0x0 0x100000>;
	187	#address-cells = <2>;
	188	#size-cells = <2>;
	189	ranges = <0x0 0x0 0x0 0xc1100000 0x0 0x100000>;
	190
9dbb56ea JB	191	gpio_intc: interrupt-controller@9880 {
	192	compatible = "amlogic,meson-gpio-intc";
	193	reg = <0x0 0x9880 0x0 0x10>;
	194	interrupt-controller;
	195	#interrupt-cells = <2>;
	196	amlogic,channel-interrupts = <64 65 66 67 68 69 70 71>;
	197	status = "disabled";
	198	};
	199
998a9c8a NA	200	reset: reset-controller@4404 {
998a9c8a NA	201	compatible = "amlogic,meson-gx-reset", "amlogic,meson-gxbb-reset";
1eb09198	202	reg = <0x0 0x04404 0x0 0x9c>;
998a9c8a NA	203	#reset-cells = <1>;
	204	};
	205
c328666d	206	uart_A: serial@84c0 {
a87f854d	207	compatible = "amlogic,meson-gx-uart";
77f5cdbd	208	reg = <0x0 0x84c0 0x0 0x18>;
c328666d	209	interrupts = <GIC_SPI 26 IRQ_TYPE_EDGE_RISING>;
c328666d NA	210	status = "disabled";
c328666d NA	211	};
998a9c8a NA	212
998a9c8a NA	213	uart_B: serial@84dc {
a87f854d	214	compatible = "amlogic,meson-gx-uart";
77f5cdbd	215	reg = <0x0 0x84dc 0x0 0x18>;
998a9c8a	216	interrupts = <GIC_SPI 75 IRQ_TYPE_EDGE_RISING>;
998a9c8a NA	217	status = "disabled";
	218	};
	219
	220	i2c_A: i2c@8500 {
e19e64aa	221	compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
998a9c8a NA	222	reg = <0x0 0x08500 0x0 0x20>;
	223	interrupts = <GIC_SPI 21 IRQ_TYPE_EDGE_RISING>;
	224	#address-cells = <1>;
	225	#size-cells = <0>;
	226	status = "disabled";
	227	};
	228
	229	pwm_ab: pwm@8550 {
	230	compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
	231	reg = <0x0 0x08550 0x0 0x10>;
	232	#pwm-cells = <3>;
	233	status = "disabled";
	234	};
	235
	236	pwm_cd: pwm@8650 {
	237	compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
	238	reg = <0x0 0x08650 0x0 0x10>;
	239	#pwm-cells = <3>;
	240	status = "disabled";
	241	};
	242
bd80ef5e MB	243	saradc: adc@8680 {
	244	compatible = "amlogic,meson-saradc";
	245	reg = <0x0 0x8680 0x0 0x34>;
	246	#io-channel-cells = <1>;
	247	interrupts = <GIC_SPI 73 IRQ_TYPE_EDGE_RISING>;
	248	status = "disabled";
	249	};
	250
998a9c8a NA	251	pwm_ef: pwm@86c0 {
	252	compatible = "amlogic,meson-gx-pwm", "amlogic,meson-gxbb-pwm";
	253	reg = <0x0 0x086c0 0x0 0x10>;
	254	#pwm-cells = <3>;
	255	status = "disabled";
	256	};
	257
	258	uart_C: serial@8700 {
a87f854d	259	compatible = "amlogic,meson-gx-uart";
77f5cdbd	260	reg = <0x0 0x8700 0x0 0x18>;
998a9c8a	261	interrupts = <GIC_SPI 93 IRQ_TYPE_EDGE_RISING>;
998a9c8a NA	262	status = "disabled";
	263	};
	264
5e339a1d NA	265	clock-measure@8758 {
	266	compatible = "amlogic,meson-gx-clk-measure";
	267	reg = <0x0 0x8758 0x0 0x10>;
	268	};
	269
998a9c8a	270	i2c_B: i2c@87c0 {
e19e64aa	271	compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
998a9c8a NA	272	reg = <0x0 0x087c0 0x0 0x20>;
	273	interrupts = <GIC_SPI 214 IRQ_TYPE_EDGE_RISING>;
	274	#address-cells = <1>;
	275	#size-cells = <0>;
	276	status = "disabled";
	277	};
	278
	279	i2c_C: i2c@87e0 {
e19e64aa	280	compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
998a9c8a NA	281	reg = <0x0 0x087e0 0x0 0x20>;
	282	interrupts = <GIC_SPI 215 IRQ_TYPE_EDGE_RISING>;
	283	#address-cells = <1>;
	284	#size-cells = <0>;
	285	status = "disabled";
	286	};
	287
fa808631 NA	288	spicc: spi@8d80 {
	289	compatible = "amlogic,meson-gx-spicc";
	290	reg = <0x0 0x08d80 0x0 0x80>;
	291	interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
	292	#address-cells = <1>;
	293	#size-cells = <0>;
	294	status = "disabled";
	295	};
	296
04b36df4	297	spifc: spi@8c80 {
e19e64aa	298	compatible = "amlogic,meson-gx-spifc", "amlogic,meson-gxbb-spifc";
04b36df4 NA	299	reg = <0x0 0x08c80 0x0 0x80>;
	300	#address-cells = <1>;
	301	#size-cells = <0>;
	302	status = "disabled";
	303	};
	304
998a9c8a NA	305	watchdog@98d0 {
	306	compatible = "amlogic,meson-gx-wdt", "amlogic,meson-gxbb-wdt";
	307	reg = <0x0 0x098d0 0x0 0x10>;
	308	clocks = <&xtal>;
	309	};
c328666d NA	310	};
	311
	312	gic: interrupt-controller@c4301000 {
	313	compatible = "arm,gic-400";
	314	reg = <0x0 0xc4301000 0 0x1000>,
	315	<0x0 0xc4302000 0 0x2000>,
	316	<0x0 0xc4304000 0 0x2000>,
	317	<0x0 0xc4306000 0 0x2000>;
	318	interrupt-controller;
	319	interrupts = <GIC_PPI 9
	320	(GIC_CPU_MASK_SIMPLE(8) \| IRQ_TYPE_LEVEL_HIGH)>;
	321	#interrupt-cells = <3>;
	322	#address-cells = <0>;
	323	};
	324
47961f13	325	sram: sram@c8000000 {
e19e64aa	326	compatible = "amlogic,meson-gx-sram", "amlogic,meson-gxbb-sram", "mmio-sram";
47961f13 MB	327	reg = <0x0 0xc8000000 0x0 0x14000>;
	328
	329	#address-cells = <1>;
	330	#size-cells = <1>;
	331	ranges = <0 0x0 0xc8000000 0x14000>;
	332
	333	cpu_scp_lpri: scp-shmem@0 {
e19e64aa	334	compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
47961f13 MB	335	reg = <0x13000 0x400>;
	336	};
	337
	338	cpu_scp_hpri: scp-shmem@200 {
e19e64aa	339	compatible = "amlogic,meson-gx-scp-shmem", "amlogic,meson-gxbb-scp-shmem";
47961f13 MB	340	reg = <0x13400 0x400>;
	341	};
	342	};
	343
0cb6c604	344	aobus: bus@c8100000 {
c328666d NA	345	compatible = "simple-bus";
	346	reg = <0x0 0xc8100000 0x0 0x100000>;
	347	#address-cells = <2>;
	348	#size-cells = <2>;
	349	ranges = <0x0 0x0 0x0 0xc8100000 0x0 0x100000>;
	350
7fd2c355	351	sysctrl_AO: sys-ctrl@0 {
445f2bda	352	compatible = "amlogic,meson-gx-ao-sysctrl", "simple-mfd", "syscon";
7fd2c355 NA	353	reg = <0x0 0x0 0x0 0x100>;
7fd2c355 NA	354
74d1c6e9 NA	355	pwrc_vpu: power-controller-vpu {
	356	compatible = "amlogic,meson-gx-pwrc-vpu";
	357	#power-domain-cells = <0>;
	358	amlogic,hhi-sysctrl = <&sysctrl>;
	359	};
	360
7fd2c355 NA	361	clkc_AO: clock-controller {
	362	compatible = "amlogic,meson-gx-aoclkc";
	363	#clock-cells = <1>;
	364	#reset-cells = <1>;
	365	};
04b36df4 NA	366	};
04b36df4 NA	367
b16c71c9 NA	368	cec_AO: cec@100 {
	369	compatible = "amlogic,meson-gx-ao-cec";
	370	reg = <0x0 0x00100 0x0 0x14>;
	371	interrupts = <GIC_SPI 199 IRQ_TYPE_EDGE_RISING>;
	372	};
	373
c9fe1cfe NA	374	sec_AO: ao-secure@140 {
	375	compatible = "amlogic,meson-gx-ao-secure", "syscon";
	376	reg = <0x0 0x140 0x0 0x140>;
	377	amlogic,has-chip-id;
	378	};
	379
c328666d	380	uart_AO: serial@4c0 {
a87f854d	381	compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
77f5cdbd	382	reg = <0x0 0x004c0 0x0 0x18>;
c328666d	383	interrupts = <GIC_SPI 193 IRQ_TYPE_EDGE_RISING>;
c328666d NA	384	status = "disabled";
c328666d NA	385	};
998a9c8a	386
890a96a2	387	uart_AO_B: serial@4e0 {
a87f854d	388	compatible = "amlogic,meson-gx-uart", "amlogic,meson-ao-uart";
77f5cdbd	389	reg = <0x0 0x004e0 0x0 0x18>;
890a96a2	390	interrupts = <GIC_SPI 197 IRQ_TYPE_EDGE_RISING>;
890a96a2 MB	391	status = "disabled";
	392	};
	393
04b36df4 NA	394	i2c_AO: i2c@500 {
	395	compatible = "amlogic,meson-gx-i2c", "amlogic,meson-gxbb-i2c";
	396	reg = <0x0 0x500 0x0 0x20>;
	397	interrupts = <GIC_SPI 195 IRQ_TYPE_EDGE_RISING>;
	398	#address-cells = <1>;
	399	#size-cells = <0>;
	400	status = "disabled";
	401	};
	402
e4851224	403	pwm_AO_ab: pwm@550 {
6620f146	404	compatible = "amlogic,meson-gx-ao-pwm", "amlogic,meson-gxbb-ao-pwm";
e4851224 MB	405	reg = <0x0 0x00550 0x0 0x10>;
	406	#pwm-cells = <3>;
	407	status = "disabled";
	408	};
	409
998a9c8a	410	ir: ir@580 {
e19e64aa	411	compatible = "amlogic,meson-gx-ir", "amlogic,meson-gxbb-ir";
998a9c8a NA	412	reg = <0x0 0x00580 0x0 0x40>;
	413	interrupts = <GIC_SPI 196 IRQ_TYPE_EDGE_RISING>;
	414	status = "disabled";
	415	};
c328666d NA	416	};
	417
	418	periphs: periphs@c8834000 {
	419	compatible = "simple-bus";
	420	reg = <0x0 0xc8834000 0x0 0x2000>;
	421	#address-cells = <2>;
	422	#size-cells = <2>;
	423	ranges = <0x0 0x0 0x0 0xc8834000 0x0 0x2000>;
998a9c8a	424
1b3f6d14	425	hwrng: rng {
998a9c8a NA	426	compatible = "amlogic,meson-rng";
	427	reg = <0x0 0x0 0x0 0x4>;
	428	};
c328666d NA	429	};
c328666d NA	430
f1726043 MJ	431	dmcbus: bus@c8838000 {
	432	compatible = "simple-bus";
	433	reg = <0x0 0xc8838000 0x0 0x400>;
	434	#address-cells = <2>;
	435	#size-cells = <2>;
	436	ranges = <0x0 0x0 0x0 0xc8838000 0x0 0x400>;
	437
	438	canvas: video-lut@48 {
	439	compatible = "amlogic,canvas";
	440	reg = <0x0 0x48 0x0 0x14>;
	441	};
	442	};
	443
0cb6c604	444	hiubus: bus@c883c000 {
c328666d NA	445	compatible = "simple-bus";
	446	reg = <0x0 0xc883c000 0x0 0x2000>;
	447	#address-cells = <2>;
	448	#size-cells = <2>;
	449	ranges = <0x0 0x0 0x0 0xc883c000 0x0 0x2000>;
998a9c8a	450
74d1c6e9	451	sysctrl: system-controller@0 {
445f2bda	452	compatible = "amlogic,meson-gx-hhi-sysctrl", "simple-mfd", "syscon";
74d1c6e9 NA	453	reg = <0 0 0 0x400>;
	454	};
	455
998a9c8a NA	456	mailbox: mailbox@404 {
	457	compatible = "amlogic,meson-gx-mhu", "amlogic,meson-gxbb-mhu";
	458	reg = <0 0x404 0 0x4c>;
5e3465f6 MB	459	interrupts = <GIC_SPI 208 IRQ_TYPE_EDGE_RISING>,
	460	<GIC_SPI 209 IRQ_TYPE_EDGE_RISING>,
	461	<GIC_SPI 210 IRQ_TYPE_EDGE_RISING>;
998a9c8a NA	462	#mbox-cells = <1>;
	463	};
	464	};
	465
	466	ethmac: ethernet@c9410000 {
	467	compatible = "amlogic,meson-gx-dwmac", "amlogic,meson-gxbb-dwmac", "snps,dwmac";
	468	reg = <0x0 0xc9410000 0x0 0x10000
	469	0x0 0xc8834540 0x0 0x4>;
8b3e6f89	470	interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
998a9c8a	471	interrupt-names = "macirq";
998a9c8a	472	status = "disabled";
c328666d NA	473	};
	474
	475	apb: apb@d0000000 {
	476	compatible = "simple-bus";
	477	reg = <0x0 0xd0000000 0x0 0x200000>;
	478	#address-cells = <2>;
	479	#size-cells = <2>;
	480	ranges = <0x0 0x0 0x0 0xd0000000 0x0 0x200000>;
ef8d2ffe KH	481
	482	sd_emmc_a: mmc@70000 {
	483	compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
e490520c	484	reg = <0x0 0x70000 0x0 0x800>;
ef8d2ffe KH	485	interrupts = <GIC_SPI 216 IRQ_TYPE_EDGE_RISING>;
	486	status = "disabled";
	487	};
	488
	489	sd_emmc_b: mmc@72000 {
	490	compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
e490520c	491	reg = <0x0 0x72000 0x0 0x800>;
ef8d2ffe KH	492	interrupts = <GIC_SPI 217 IRQ_TYPE_EDGE_RISING>;
	493	status = "disabled";
	494	};
	495
	496	sd_emmc_c: mmc@74000 {
	497	compatible = "amlogic,meson-gx-mmc", "amlogic,meson-gxbb-mmc";
e490520c	498	reg = <0x0 0x74000 0x0 0x800>;
ef8d2ffe KH	499	interrupts = <GIC_SPI 218 IRQ_TYPE_EDGE_RISING>;
	500	status = "disabled";
	501	};
c328666d	502	};
fafdbdf7 NA	503
	504	vpu: vpu@d0100000 {
	505	compatible = "amlogic,meson-gx-vpu";
	506	reg = <0x0 0xd0100000 0x0 0x100000>,
	507	<0x0 0xc883c000 0x0 0x1000>,
	508	<0x0 0xc8838000 0x0 0x1000>;
	509	reg-names = "vpu", "hhi", "dmc";
	510	interrupts = <GIC_SPI 3 IRQ_TYPE_EDGE_RISING>;
	511	#address-cells = <1>;
	512	#size-cells = <0>;
	513
	514	/* CVBS VDAC output port */
	515	cvbs_vdac_port: port@0 {
	516	reg = <0>;
	517	};
6939db7e NA	518
	519	/* HDMI-TX output port */
	520	hdmi_tx_port: port@1 {
	521	reg = <1>;
	522
	523	hdmi_tx_out: endpoint {
	524	remote-endpoint = <&hdmi_tx_in>;
	525	};
	526	};
	527	};
	528
	529	hdmi_tx: hdmi-tx@c883a000 {
	530	compatible = "amlogic,meson-gx-dw-hdmi";
	531	reg = <0x0 0xc883a000 0x0 0x1c>;
	532	interrupts = <GIC_SPI 57 IRQ_TYPE_EDGE_RISING>;
	533	#address-cells = <1>;
	534	#size-cells = <0>;
	535	status = "disabled";
	536
	537	/* VPU VENC Input */
	538	hdmi_tx_venc_port: port@0 {
	539	reg = <0>;
	540
	541	hdmi_tx_in: endpoint {
	542	remote-endpoint = <&hdmi_tx_out>;
	543	};
	544	};
	545
	546	/* TMDS Output */
	547	hdmi_tx_tmds_port: port@1 {
	548	reg = <1>;
	549	};
fafdbdf7	550	};
c328666d NA	551	};
c328666d NA	552	};