Commit | Line | Data |
---|---|---|
eed6b3eb OJ |
1 | menu "Platform selection" |
2 | ||
c88cc3ee AF |
3 | config ARCH_ACTIONS |
4 | bool "Actions Semi Platforms" | |
5 | select OWL_TIMER | |
e0c27a10 | 6 | select PINCTRL |
c88cc3ee AF |
7 | help |
8 | This enables support for the Actions Semiconductor S900 SoC family. | |
9 | ||
ce3dd55b AP |
10 | config ARCH_SUNXI |
11 | bool "Allwinner sunxi 64-bit SoC Family" | |
900a9020 | 12 | select ARCH_HAS_RESET_CONTROLLER |
23485482 | 13 | select GENERIC_IRQ_CHIP |
d229d205 | 14 | select PINCTRL |
900a9020 | 15 | select RESET_CONTROLLER |
ce3dd55b AP |
16 | help |
17 | This enables support for Allwinner sunxi based SoCs like the A64. | |
18 | ||
e2f0abaf AT |
19 | config ARCH_ALPINE |
20 | bool "Annapurna Labs Alpine platform" | |
5a3f75a4 | 21 | select ALPINE_MSI if PCI |
e2f0abaf AT |
22 | help |
23 | This enables support for the Annapurna Labs Alpine | |
24 | Soc family. | |
25 | ||
628d30d1 EA |
26 | config ARCH_BCM2835 |
27 | bool "Broadcom BCM2835 family" | |
bb0eb050 | 28 | select TIMER_OF |
da9a1c67 | 29 | select GPIOLIB |
628d30d1 EA |
30 | select PINCTRL |
31 | select PINCTRL_BCM2835 | |
32 | select ARM_AMBA | |
33 | select ARM_TIMER_SP804 | |
34 | select HAVE_ARM_ARCH_TIMER | |
35 | help | |
36 | This enables support for the Broadcom BCM2837 SoC. | |
37 | This SoC is used in the Raspberry Pi 3 device. | |
38 | ||
36b7c583 RJ |
39 | config ARCH_BCM_IPROC |
40 | bool "Broadcom iProc SoC Family" | |
382618bb | 41 | select COMMON_CLK_IPROC |
da9a1c67 | 42 | select GPIOLIB |
382618bb | 43 | select PINCTRL |
36b7c583 RJ |
44 | help |
45 | This enables support for Broadcom iProc based SoCs | |
46 | ||
dd40fd92 JZ |
47 | config ARCH_BERLIN |
48 | bool "Marvell Berlin SoC Family" | |
49 | select DW_APB_ICTL | |
da9a1c67 | 50 | select GPIOLIB |
75d8e1ba | 51 | select PINCTRL |
dd40fd92 JZ |
52 | help |
53 | This enables support for Marvell Berlin SoC Family | |
54 | ||
37eb56dc FF |
55 | config ARCH_BRCMSTB |
56 | bool "Broadcom Set-Top-Box SoCs" | |
57 | select BRCMSTB_L2_IRQ | |
58 | select GENERIC_IRQ_CHIP | |
59 | help | |
60 | This enables support for Broadcom's ARMv8 Set Top Box SoCs | |
61 | ||
eed6b3eb | 62 | config ARCH_EXYNOS |
c87b3e97 | 63 | bool "ARMv8 based Samsung Exynos SoC family" |
eed6b3eb | 64 | select COMMON_CLK_SAMSUNG |
caab3df9 KK |
65 | select EXYNOS_PM_DOMAINS if PM_GENERIC_DOMAINS |
66 | select EXYNOS_PMU | |
eed6b3eb OJ |
67 | select HAVE_S3C2410_WATCHDOG if WATCHDOG |
68 | select HAVE_S3C_RTC if RTC_CLASS | |
69 | select PINCTRL | |
70 | select PINCTRL_EXYNOS | |
5220a73a | 71 | select PM_GENERIC_DOMAINS if PM |
3b3428e3 | 72 | select SOC_SAMSUNG |
eed6b3eb | 73 | help |
c87b3e97 | 74 | This enables support for ARMv8 based Samsung Exynos SoC family. |
eed6b3eb | 75 | |
c7724572 NM |
76 | config ARCH_K3 |
77 | bool "Texas Instruments Inc. K3 multicore SoC architecture" | |
78 | select PM_GENERIC_DOMAINS if PM | |
79 | help | |
80 | This enables support for Texas Instruments' K3 multicore SoC | |
81 | architecture. | |
82 | ||
53a5fde0 BS |
83 | config ARCH_LAYERSCAPE |
84 | bool "ARMv8 based Freescale Layerscape SoC family" | |
eeb3d68b | 85 | select EDAC_SUPPORT |
eed6b3eb | 86 | help |
53a5fde0 | 87 | This enables support for the Freescale Layerscape SoC family. |
eed6b3eb | 88 | |
198ed962 CM |
89 | config ARCH_LG1K |
90 | bool "LG Electronics LG1K SoC Family" | |
91 | help | |
92 | This enables support for LG Electronics LG1K SoC Family | |
93 | ||
eed6b3eb OJ |
94 | config ARCH_HISI |
95 | bool "Hisilicon SoC Family" | |
2b905d3a | 96 | select ARM_TIMER_SP804 |
f9db43bc | 97 | select HISILICON_IRQ_MBIGEN if PCI |
21adc4d7 | 98 | select PINCTRL |
eed6b3eb OJ |
99 | help |
100 | This enables support for Hisilicon ARMv8 SoC family | |
101 | ||
102 | config ARCH_MEDIATEK | |
598f9b2e | 103 | bool "MediaTek SoC Family" |
eed6b3eb OJ |
104 | select ARM_GIC |
105 | select PINCTRL | |
c050b45d | 106 | select MTK_TIMER |
eed6b3eb | 107 | help |
598f9b2e SW |
108 | This enables support for MediaTek MT27xx, MT65xx, MT76xx |
109 | & MT81xx ARMv8 SoCs | |
eed6b3eb | 110 | |
451e9e54 AF |
111 | config ARCH_MESON |
112 | bool "Amlogic Platforms" | |
bf56c776 CC |
113 | select PINCTRL |
114 | select PINCTRL_MESON | |
59bdefe9 MT |
115 | select COMMON_CLK_AMLOGIC |
116 | select COMMON_CLK_GXBB | |
78b4af31 | 117 | select COMMON_CLK_AXG |
f2c2122a | 118 | select MESON_IRQ_GPIO |
451e9e54 AF |
119 | help |
120 | This enables support for the Amlogic S905 SoCs. | |
121 | ||
b4f596b1 GC |
122 | config ARCH_MVEBU |
123 | bool "Marvell EBU SoC Family" | |
ad87c0f6 TP |
124 | select ARMADA_AP806_SYSCON |
125 | select ARMADA_CP110_SYSCON | |
ff60d834 | 126 | select ARMADA_37XX_CLK |
d2718d13 GC |
127 | select GPIOLIB |
128 | select GPIOLIB_IRQCHIP | |
29ad6bd9 TP |
129 | select MVEBU_GICP |
130 | select MVEBU_ICU | |
b3920b2b | 131 | select MVEBU_ODMI |
04208a24 | 132 | select MVEBU_PIC |
228197c5 | 133 | select MVEBU_SEI |
d2718d13 GC |
134 | select OF_GPIO |
135 | select PINCTRL | |
136 | select PINCTRL_ARMADA_37XX | |
c4c14365 GC |
137 | select PINCTRL_ARMADA_AP806 |
138 | select PINCTRL_ARMADA_CP110 | |
b4f596b1 | 139 | help |
b3920b2b TP |
140 | This enables support for Marvell EBU familly, including: |
141 | - Armada 3700 SoC Family | |
142 | - Armada 7K SoC Family | |
143 | - Armada 8K SoC Family | |
b4f596b1 | 144 | |
eed6b3eb OJ |
145 | config ARCH_QCOM |
146 | bool "Qualcomm Platforms" | |
e19811a8 | 147 | select GPIOLIB |
eed6b3eb OJ |
148 | select PINCTRL |
149 | help | |
150 | This enables support for the ARMv8 based Qualcomm chipsets. | |
151 | ||
1b0d665e AF |
152 | config ARCH_REALTEK |
153 | bool "Realtek Platforms" | |
154 | help | |
155 | This enables support for the ARMv8 based Realtek chipsets, | |
156 | like the RTD1295. | |
157 | ||
26a7e06d SH |
158 | config ARCH_RENESAS |
159 | bool "Renesas SoC Platforms" | |
26a7e06d | 160 | select PINCTRL |
2ee98234 GU |
161 | select PM |
162 | select PM_GENERIC_DOMAINS | |
f7e02051 | 163 | select RENESAS_IRQC |
8d6799a9 | 164 | select SOC_BUS |
c1801ad0 SS |
165 | select SYS_SUPPORTS_SH_CMT |
166 | select SYS_SUPPORTS_SH_TMU | |
26a7e06d SH |
167 | help |
168 | This enables support for the ARMv8 based Renesas SoCs. | |
169 | ||
5afa6779 BD |
170 | config ARCH_R8A774A1 |
171 | bool "Renesas RZ/G2M SoC Platform" | |
172 | depends on ARCH_RENESAS | |
173 | help | |
174 | This enables support for the Renesas RZ/G2M SoC. | |
175 | ||
692dce77 FC |
176 | config ARCH_R8A774C0 |
177 | bool "Renesas RZ/G2E SoC Platform" | |
178 | depends on ARCH_RENESAS | |
179 | help | |
180 | This enables support for the Renesas RZ/G2E SoC. | |
181 | ||
26a7e06d SH |
182 | config ARCH_R8A7795 |
183 | bool "Renesas R-Car H3 SoC Platform" | |
184 | depends on ARCH_RENESAS | |
185 | help | |
186 | This enables support for the Renesas R-Car H3 SoC. | |
187 | ||
1561f207 SH |
188 | config ARCH_R8A7796 |
189 | bool "Renesas R-Car M3-W SoC Platform" | |
190 | depends on ARCH_RENESAS | |
191 | help | |
192 | This enables support for the Renesas R-Car M3-W SoC. | |
193 | ||
fd60ea31 JM |
194 | config ARCH_R8A77965 |
195 | bool "Renesas R-Car M3-N SoC Platform" | |
196 | depends on ARCH_RENESAS | |
197 | help | |
198 | This enables support for the Renesas R-Car M3-N SoC. | |
199 | ||
a6d21c09 GU |
200 | config ARCH_R8A77970 |
201 | bool "Renesas R-Car V3M SoC Platform" | |
202 | depends on ARCH_RENESAS | |
203 | help | |
204 | This enables support for the Renesas R-Car V3M SoC. | |
205 | ||
b85e1f77 SS |
206 | config ARCH_R8A77980 |
207 | bool "Renesas R-Car V3H SoC Platform" | |
208 | depends on ARCH_RENESAS | |
209 | help | |
210 | This enables support for the Renesas R-Car V3H SoC. | |
211 | ||
c4e96f74 YS |
212 | config ARCH_R8A77990 |
213 | bool "Renesas R-Car E3 SoC Platform" | |
214 | depends on ARCH_RENESAS | |
215 | help | |
216 | This enables support for the Renesas R-Car E3 SoC. | |
217 | ||
a4b68d28 GU |
218 | config ARCH_R8A77995 |
219 | bool "Renesas R-Car D3 SoC Platform" | |
220 | depends on ARCH_RENESAS | |
221 | help | |
222 | This enables support for the Renesas R-Car D3 SoC. | |
223 | ||
0964d660 GU |
224 | config ARCH_ROCKCHIP |
225 | bool "Rockchip Platforms" | |
226 | select ARCH_HAS_RESET_CONTROLLER | |
227 | select GPIOLIB | |
228 | select PINCTRL | |
229 | select PINCTRL_ROCKCHIP | |
230 | select PM | |
231 | select ROCKCHIP_TIMER | |
232 | help | |
233 | This enables support for the ARMv8 based Rockchip chipsets, | |
234 | like the RK3368. | |
235 | ||
236 | config ARCH_SEATTLE | |
237 | bool "AMD Seattle SoC Family" | |
238 | help | |
239 | This enables support for AMD Seattle SOC Family | |
240 | ||
78cd6a9d DN |
241 | config ARCH_STRATIX10 |
242 | bool "Altera's Stratix 10 SoCFPGA Family" | |
243 | help | |
244 | This enables support for Altera's Stratix 10 SoCFPGA Family. | |
245 | ||
0964d660 GU |
246 | config ARCH_SYNQUACER |
247 | bool "Socionext SynQuacer SoC Family" | |
248 | ||
eed6b3eb OJ |
249 | config ARCH_TEGRA |
250 | bool "NVIDIA Tegra SoC Family" | |
251 | select ARCH_HAS_RESET_CONTROLLER | |
eed6b3eb OJ |
252 | select CLKDEV_LOOKUP |
253 | select CLKSRC_MMIO | |
bb0eb050 | 254 | select TIMER_OF |
eed6b3eb | 255 | select GENERIC_CLOCKEVENTS |
da9a1c67 | 256 | select GPIOLIB |
eed6b3eb | 257 | select PINCTRL |
98823241 JH |
258 | select PM |
259 | select PM_GENERIC_DOMAINS | |
eed6b3eb OJ |
260 | select RESET_CONTROLLER |
261 | help | |
262 | This enables support for the NVIDIA Tegra SoC family. | |
263 | ||
eed6b3eb OJ |
264 | config ARCH_SPRD |
265 | bool "Spreadtrum SoC platform" | |
266 | help | |
267 | Support for Spreadtrum ARM based SoCs | |
268 | ||
269 | config ARCH_THUNDER | |
270 | bool "Cavium Inc. Thunder SoC Family" | |
271 | help | |
272 | This enables support for Cavium's Thunder Family of SoCs. | |
273 | ||
03b6fd5d J |
274 | config ARCH_THUNDER2 |
275 | bool "Cavium ThunderX2 Server Processors" | |
276 | select GPIOLIB | |
277 | help | |
278 | This enables support for Cavium's ThunderX2 CN99XX family of | |
279 | server processors. | |
280 | ||
56aaafb6 MY |
281 | config ARCH_UNIPHIER |
282 | bool "Socionext UniPhier SoC Family" | |
75924903 | 283 | select ARCH_HAS_RESET_CONTROLLER |
56aaafb6 | 284 | select PINCTRL |
ab6ab445 | 285 | select RESET_CONTROLLER |
56aaafb6 MY |
286 | help |
287 | This enables support for Socionext UniPhier SoC family. | |
288 | ||
eed6b3eb OJ |
289 | config ARCH_VEXPRESS |
290 | bool "ARMv8 software model (Versatile Express)" | |
eed6b3eb | 291 | select COMMON_CLK_VERSATILE |
da9a1c67 | 292 | select GPIOLIB |
8da7cc08 SH |
293 | select PM |
294 | select PM_GENERIC_DOMAINS | |
eed6b3eb OJ |
295 | select POWER_RESET_VEXPRESS |
296 | select VEXPRESS_CONFIG | |
297 | help | |
298 | This enables support for the ARMv8 software model (Versatile | |
299 | Express). | |
300 | ||
5bfb3889 | 301 | config ARCH_VULCAN |
a314520d | 302 | def_bool n |
5bfb3889 | 303 | |
eed6b3eb OJ |
304 | config ARCH_XGENE |
305 | bool "AppliedMicro X-Gene SOC Family" | |
306 | help | |
307 | This enables support for AppliedMicro X-Gene SOC Family | |
308 | ||
12496aea JN |
309 | config ARCH_ZX |
310 | bool "ZTE ZX SoC Family" | |
03d95c26 | 311 | select PINCTRL |
12496aea JN |
312 | help |
313 | This enables support for ZTE ZX SoC Family | |
314 | ||
eed6b3eb OJ |
315 | config ARCH_ZYNQMP |
316 | bool "Xilinx ZynqMP Family" | |
76582671 | 317 | select ZYNQMP_FIRMWARE |
eed6b3eb OJ |
318 | help |
319 | This enables support for Xilinx ZynqMP Family | |
320 | ||
321 | endmenu |