projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| eed6b3eb OJ |
1 | menu "Platform selection" |
| 2 | ||
| 36b7c583 RJ |
3 | config ARCH_BCM_IPROC |
| 4 | bool "Broadcom iProc SoC Family" | |
| 5 | help | |
| 6 | This enables support for Broadcom iProc based SoCs | |
| 7 | ||
| dd40fd92 JZ |
8 | config ARCH_BERLIN |
| 9 | bool "Marvell Berlin SoC Family" | |
| c582fbfb | 10 | select ARCH_REQUIRE_GPIOLIB |
| dd40fd92 | 11 | select DW_APB_ICTL |
| 75d8e1ba | 12 | select PINCTRL |
| dd40fd92 JZ |
13 | help |
| 14 | This enables support for Marvell Berlin SoC Family | |
| 15 | ||
| eed6b3eb OJ |
16 | config ARCH_EXYNOS |
| 17 | bool | |
| 18 | help | |
| 19 | This enables support for Samsung Exynos SoC family | |
| 20 | ||
| 21 | config ARCH_EXYNOS7 | |
| 22 | bool "ARMv8 based Samsung Exynos7" | |
| 23 | select ARCH_EXYNOS | |
| 24 | select COMMON_CLK_SAMSUNG | |
| 25 | select HAVE_S3C2410_WATCHDOG if WATCHDOG | |
| 26 | select HAVE_S3C_RTC if RTC_CLASS | |
| 27 | select PINCTRL | |
| 28 | select PINCTRL_EXYNOS | |
| 29 | ||
| 30 | help | |
| 31 | This enables support for Samsung Exynos7 SoC family | |
| 32 | ||
| 53a5fde0 BS |
33 | config ARCH_LAYERSCAPE |
| 34 | bool "ARMv8 based Freescale Layerscape SoC family" | |
| eed6b3eb | 35 | help |
| 53a5fde0 | 36 | This enables support for the Freescale Layerscape SoC family. |
| eed6b3eb OJ |
37 | |
| 38 | config ARCH_HISI | |
| 39 | bool "Hisilicon SoC Family" | |
| 40 | help | |
| 41 | This enables support for Hisilicon ARMv8 SoC family | |
| 42 | ||
| 43 | config ARCH_MEDIATEK | |
| 44 | bool "Mediatek MT65xx & MT81xx ARMv8 SoC" | |
| 45 | select ARM_GIC | |
| 46 | select PINCTRL | |
| c050b45d | 47 | select MTK_TIMER |
| eed6b3eb OJ |
48 | help |
| 49 | Support for Mediatek MT65xx & MT81xx ARMv8 SoCs | |
| 50 | ||
| 51 | config ARCH_QCOM | |
| 52 | bool "Qualcomm Platforms" | |
| 53 | select PINCTRL | |
| 54 | help | |
| 55 | This enables support for the ARMv8 based Qualcomm chipsets. | |
| 56 | ||
| fbac1c81 HS |
57 | config ARCH_ROCKCHIP |
| 58 | bool "Rockchip Platforms" | |
| 59 | select ARCH_HAS_RESET_CONTROLLER | |
| 60 | select ARCH_REQUIRE_GPIOLIB | |
| 61 | select PINCTRL | |
| 62 | select PINCTRL_ROCKCHIP | |
| 63 | help | |
| 64 | This enables support for the ARMv8 based Rockchip chipsets, | |
| 65 | like the RK3368. | |
| 66 | ||
| eed6b3eb OJ |
67 | config ARCH_SEATTLE |
| 68 | bool "AMD Seattle SoC Family" | |
| 69 | help | |
| 70 | This enables support for AMD Seattle SOC Family | |
| 71 | ||
| 26a7e06d SH |
72 | config ARCH_SHMOBILE |
| 73 | bool | |
| 74 | ||
| 75 | config ARCH_RENESAS | |
| 76 | bool "Renesas SoC Platforms" | |
| 77 | select ARCH_SHMOBILE | |
| 78 | select PINCTRL | |
| 79 | select PM_GENERIC_DOMAINS if PM | |
| 80 | help | |
| 81 | This enables support for the ARMv8 based Renesas SoCs. | |
| 82 | ||
| 83 | config ARCH_R8A7795 | |
| 84 | bool "Renesas R-Car H3 SoC Platform" | |
| 85 | depends on ARCH_RENESAS | |
| 86 | help | |
| 87 | This enables support for the Renesas R-Car H3 SoC. | |
| 88 | ||
| 78cd6a9d DN |
89 | config ARCH_STRATIX10 |
| 90 | bool "Altera's Stratix 10 SoCFPGA Family" | |
| 91 | help | |
| 92 | This enables support for Altera's Stratix 10 SoCFPGA Family. | |
| 93 | ||
| eed6b3eb OJ |
94 | config ARCH_TEGRA |
| 95 | bool "NVIDIA Tegra SoC Family" | |
| 96 | select ARCH_HAS_RESET_CONTROLLER | |
| 97 | select ARCH_REQUIRE_GPIOLIB | |
| 98 | select CLKDEV_LOOKUP | |
| 99 | select CLKSRC_MMIO | |
| 100 | select CLKSRC_OF | |
| 101 | select GENERIC_CLOCKEVENTS | |
| 102 | select HAVE_CLK | |
| 103 | select PINCTRL | |
| 104 | select RESET_CONTROLLER | |
| 105 | help | |
| 106 | This enables support for the NVIDIA Tegra SoC family. | |
| 107 | ||
| 108 | config ARCH_TEGRA_132_SOC | |
| 109 | bool "NVIDIA Tegra132 SoC" | |
| 110 | depends on ARCH_TEGRA | |
| 111 | select PINCTRL_TEGRA124 | |
| 112 | select USB_ULPI if USB_PHY | |
| 113 | select USB_ULPI_VIEWPORT if USB_PHY | |
| 114 | help | |
| 115 | Enable support for NVIDIA Tegra132 SoC, based on the Denver | |
| 116 | ARMv8 CPU. The Tegra132 SoC is similar to the Tegra124 SoC, | |
| 117 | but contains an NVIDIA Denver CPU complex in place of | |
| 118 | Tegra124's "4+1" Cortex-A15 CPU complex. | |
| 119 | ||
| 120 | config ARCH_SPRD | |
| 121 | bool "Spreadtrum SoC platform" | |
| 122 | help | |
| 123 | Support for Spreadtrum ARM based SoCs | |
| 124 | ||
| 125 | config ARCH_THUNDER | |
| 126 | bool "Cavium Inc. Thunder SoC Family" | |
| 127 | help | |
| 128 | This enables support for Cavium's Thunder Family of SoCs. | |
| 129 | ||
| 56aaafb6 MY |
130 | config ARCH_UNIPHIER |
| 131 | bool "Socionext UniPhier SoC Family" | |
| 132 | select PINCTRL | |
| 133 | help | |
| 134 | This enables support for Socionext UniPhier SoC family. | |
| 135 | ||
| eed6b3eb OJ |
136 | config ARCH_VEXPRESS |
| 137 | bool "ARMv8 software model (Versatile Express)" | |
| 138 | select ARCH_REQUIRE_GPIOLIB | |
| 139 | select COMMON_CLK_VERSATILE | |
| 140 | select POWER_RESET_VEXPRESS | |
| 141 | select VEXPRESS_CONFIG | |
| 142 | help | |
| 143 | This enables support for the ARMv8 software model (Versatile | |
| 144 | Express). | |
| 145 | ||
| 146 | config ARCH_XGENE | |
| 147 | bool "AppliedMicro X-Gene SOC Family" | |
| 148 | help | |
| 149 | This enables support for AppliedMicro X-Gene SOC Family | |
| 150 | ||
| 151 | config ARCH_ZYNQMP | |
| 152 | bool "Xilinx ZynqMP Family" | |
| 153 | help | |
| 154 | This enables support for Xilinx ZynqMP Family | |
| 155 | ||
| 156 | endmenu |