arm64: add seccomp support
[linux-2.6-block.git] / arch / arm64 / Kconfig
CommitLineData
8c2c3df3
CM
1config ARM64
2 def_bool y
92980405 3 select ARCH_BINFMT_ELF_RANDOMIZE_PIE
8c2c3df3 4 select ARCH_HAS_ATOMIC64_DEC_IF_POSITIVE
308c09f1 5 select ARCH_HAS_SG_CHAIN
1f85008e 6 select ARCH_HAS_TICK_BROADCAST if GENERIC_CLOCKEVENTS_BROADCAST
c63c8700 7 select ARCH_USE_CMPXCHG_LOCKREF
4badad35 8 select ARCH_SUPPORTS_ATOMIC_RMW
9170100e 9 select ARCH_WANT_OPTIONAL_GPIOLIB
6212a512 10 select ARCH_WANT_COMPAT_IPC_PARSE_VERSION
b6f35981 11 select ARCH_WANT_FRAME_POINTERS
25c92a37 12 select ARM_AMBA
1aee5d7a 13 select ARM_ARCH_TIMER
c4188edc 14 select ARM_GIC
875cbf3e 15 select AUDIT_ARCH_COMPAT_GENERIC
021f6537 16 select ARM_GIC_V3
adace895 17 select BUILDTIME_EXTABLE_SORT
db2789b5 18 select CLONE_BACKWARDS
7ca2ef33 19 select COMMON_CLK
166936ba 20 select CPU_PM if (SUSPEND || CPU_IDLE)
7bc13fd3 21 select DCACHE_WORD_ACCESS
d4932f9e 22 select GENERIC_ALLOCATOR
8c2c3df3 23 select GENERIC_CLOCKEVENTS
1f85008e 24 select GENERIC_CLOCKEVENTS_BROADCAST if SMP
3be1a5c4 25 select GENERIC_CPU_AUTOPROBE
bf4b558e 26 select GENERIC_EARLY_IOREMAP
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27 select GENERIC_IOMAP
28 select GENERIC_IRQ_PROBE
29 select GENERIC_IRQ_SHOW
65cd4f6c 30 select GENERIC_SCHED_CLOCK
8c2c3df3 31 select GENERIC_SMP_IDLE_THREAD
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32 select GENERIC_STRNCPY_FROM_USER
33 select GENERIC_STRNLEN_USER
8c2c3df3 34 select GENERIC_TIME_VSYSCALL
a1ddc74a 35 select HANDLE_DOMAIN_IRQ
8c2c3df3 36 select HARDIRQS_SW_RESEND
5284e1b4 37 select HAVE_ALIGNED_STRUCT_PAGE if SLUB
875cbf3e 38 select HAVE_ARCH_AUDITSYSCALL
9732cafd 39 select HAVE_ARCH_JUMP_LABEL
9529247d 40 select HAVE_ARCH_KGDB
a1ae65b2 41 select HAVE_ARCH_SECCOMP_FILTER
8c2c3df3 42 select HAVE_ARCH_TRACEHOOK
e54bcde3 43 select HAVE_BPF_JIT
af64d2aa 44 select HAVE_C_RECORDMCOUNT
c0c264ae 45 select HAVE_CC_STACKPROTECTOR
5284e1b4 46 select HAVE_CMPXCHG_DOUBLE
9b2a60c4 47 select HAVE_DEBUG_BUGVERBOSE
b69ec42b 48 select HAVE_DEBUG_KMEMLEAK
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49 select HAVE_DMA_API_DEBUG
50 select HAVE_DMA_ATTRS
6ac2104d 51 select HAVE_DMA_CONTIGUOUS
bd7d38db 52 select HAVE_DYNAMIC_FTRACE
50afc33a 53 select HAVE_EFFICIENT_UNALIGNED_ACCESS
af64d2aa 54 select HAVE_FTRACE_MCOUNT_RECORD
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55 select HAVE_FUNCTION_TRACER
56 select HAVE_FUNCTION_GRAPH_TRACER
8c2c3df3 57 select HAVE_GENERIC_DMA_COHERENT
8c2c3df3 58 select HAVE_HW_BREAKPOINT if PERF_EVENTS
8c2c3df3 59 select HAVE_MEMBLOCK
55834a77 60 select HAVE_PATA_PLATFORM
8c2c3df3 61 select HAVE_PERF_EVENTS
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62 select HAVE_PERF_REGS
63 select HAVE_PERF_USER_STACK_DUMP
5e5f6dc1 64 select HAVE_RCU_TABLE_FREE
055b1212 65 select HAVE_SYSCALL_TRACEPOINTS
8c2c3df3 66 select IRQ_DOMAIN
fea2acaa 67 select MODULES_USE_ELF_RELA
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68 select NO_BOOTMEM
69 select OF
70 select OF_EARLY_FLATTREE
9bf14b7c 71 select OF_RESERVED_MEM
8c2c3df3 72 select PERF_USE_VMALLOC
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73 select POWER_RESET
74 select POWER_SUPPLY
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75 select RTC_LIB
76 select SPARSE_IRQ
7ac57a89 77 select SYSCTL_EXCEPTION_TRACE
6c81fe79 78 select HAVE_CONTEXT_TRACKING
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79 help
80 ARM 64-bit (AArch64) Linux support.
81
82config 64BIT
83 def_bool y
84
85config ARCH_PHYS_ADDR_T_64BIT
86 def_bool y
87
88config MMU
89 def_bool y
90
ce816fa8 91config NO_IOPORT_MAP
d1e6dc91 92 def_bool y if !PCI
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93
94config STACKTRACE_SUPPORT
95 def_bool y
96
97config LOCKDEP_SUPPORT
98 def_bool y
99
100config TRACE_IRQFLAGS_SUPPORT
101 def_bool y
102
c209f799 103config RWSEM_XCHGADD_ALGORITHM
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104 def_bool y
105
106config GENERIC_HWEIGHT
107 def_bool y
108
109config GENERIC_CSUM
110 def_bool y
111
112config GENERIC_CALIBRATE_DELAY
113 def_bool y
114
19e7640d 115config ZONE_DMA
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116 def_bool y
117
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118config HAVE_GENERIC_RCU_GUP
119 def_bool y
120
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121config ARCH_DMA_ADDR_T_64BIT
122 def_bool y
123
124config NEED_DMA_MAP_STATE
125 def_bool y
126
127config NEED_SG_DMA_LENGTH
128 def_bool y
129
130config SWIOTLB
131 def_bool y
132
133config IOMMU_HELPER
134 def_bool SWIOTLB
135
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136config KERNEL_MODE_NEON
137 def_bool y
138
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139config FIX_EARLYCON_MEM
140 def_bool y
141
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142source "init/Kconfig"
143
144source "kernel/Kconfig.freezer"
145
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146menu "Platform selection"
147
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148config ARCH_THUNDER
149 bool "Cavium Inc. Thunder SoC Family"
150 help
151 This enables support for Cavium's Thunder Family of SoCs.
152
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153config ARCH_VEXPRESS
154 bool "ARMv8 software model (Versatile Express)"
155 select ARCH_REQUIRE_GPIOLIB
156 select COMMON_CLK_VERSATILE
aa1e8ec1 157 select POWER_RESET_VEXPRESS
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158 select VEXPRESS_CONFIG
159 help
160 This enables support for the ARMv8 software model (Versatile
161 Express).
8c2c3df3 162
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163config ARCH_XGENE
164 bool "AppliedMicro X-Gene SOC Family"
165 help
166 This enables support for AppliedMicro X-Gene SOC Family
167
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168endmenu
169
170menu "Bus support"
171
172config ARM_AMBA
173 bool
174
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175config PCI
176 bool "PCI support"
177 help
178 This feature enables support for PCI bus system. If you say Y
179 here, the kernel will include drivers and infrastructure code
180 to support PCI bus devices.
181
182config PCI_DOMAINS
183 def_bool PCI
184
185config PCI_DOMAINS_GENERIC
186 def_bool PCI
187
188config PCI_SYSCALL
189 def_bool PCI
190
191source "drivers/pci/Kconfig"
192source "drivers/pci/pcie/Kconfig"
193source "drivers/pci/hotplug/Kconfig"
194
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195endmenu
196
197menu "Kernel Features"
198
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199menu "ARM errata workarounds via the alternatives framework"
200
201config ARM64_ERRATUM_826319
202 bool "Cortex-A53: 826319: System might deadlock if a write cannot complete until read data is accepted"
203 default y
204 help
205 This option adds an alternative code sequence to work around ARM
206 erratum 826319 on Cortex-A53 parts up to r0p2 with an AMBA 4 ACE or
207 AXI master interface and an L2 cache.
208
209 If a Cortex-A53 uses an AMBA AXI4 ACE interface to other processors
210 and is unable to accept a certain write via this interface, it will
211 not progress on read data presented on the read data channel and the
212 system can deadlock.
213
214 The workaround promotes data cache clean instructions to
215 data cache clean-and-invalidate.
216 Please note that this does not necessarily enable the workaround,
217 as it depends on the alternative framework, which will only patch
218 the kernel if an affected CPU is detected.
219
220 If unsure, say Y.
221
222config ARM64_ERRATUM_827319
223 bool "Cortex-A53: 827319: Data cache clean instructions might cause overlapping transactions to the interconnect"
224 default y
225 help
226 This option adds an alternative code sequence to work around ARM
227 erratum 827319 on Cortex-A53 parts up to r0p2 with an AMBA 5 CHI
228 master interface and an L2 cache.
229
230 Under certain conditions this erratum can cause a clean line eviction
231 to occur at the same time as another transaction to the same address
232 on the AMBA 5 CHI interface, which can cause data corruption if the
233 interconnect reorders the two transactions.
234
235 The workaround promotes data cache clean instructions to
236 data cache clean-and-invalidate.
237 Please note that this does not necessarily enable the workaround,
238 as it depends on the alternative framework, which will only patch
239 the kernel if an affected CPU is detected.
240
241 If unsure, say Y.
242
243config ARM64_ERRATUM_824069
244 bool "Cortex-A53: 824069: Cache line might not be marked as clean after a CleanShared snoop"
245 default y
246 help
247 This option adds an alternative code sequence to work around ARM
248 erratum 824069 on Cortex-A53 parts up to r0p2 when it is connected
249 to a coherent interconnect.
250
251 If a Cortex-A53 processor is executing a store or prefetch for
252 write instruction at the same time as a processor in another
253 cluster is executing a cache maintenance operation to the same
254 address, then this erratum might cause a clean cache line to be
255 incorrectly marked as dirty.
256
257 The workaround promotes data cache clean instructions to
258 data cache clean-and-invalidate.
259 Please note that this option does not necessarily enable the
260 workaround, as it depends on the alternative framework, which will
261 only patch the kernel if an affected CPU is detected.
262
263 If unsure, say Y.
264
265config ARM64_ERRATUM_819472
266 bool "Cortex-A53: 819472: Store exclusive instructions might cause data corruption"
267 default y
268 help
269 This option adds an alternative code sequence to work around ARM
270 erratum 819472 on Cortex-A53 parts up to r0p1 with an L2 cache
271 present when it is connected to a coherent interconnect.
272
273 If the processor is executing a load and store exclusive sequence at
274 the same time as a processor in another cluster is executing a cache
275 maintenance operation to the same address, then this erratum might
276 cause data corruption.
277
278 The workaround promotes data cache clean instructions to
279 data cache clean-and-invalidate.
280 Please note that this does not necessarily enable the workaround,
281 as it depends on the alternative framework, which will only patch
282 the kernel if an affected CPU is detected.
283
284 If unsure, say Y.
285
286config ARM64_ERRATUM_832075
287 bool "Cortex-A57: 832075: possible deadlock on mixing exclusive memory accesses with device loads"
288 default y
289 help
290 This option adds an alternative code sequence to work around ARM
291 erratum 832075 on Cortex-A57 parts up to r1p2.
292
293 Affected Cortex-A57 parts might deadlock when exclusive load/store
294 instructions to Write-Back memory are mixed with Device loads.
295
296 The workaround is to promote device loads to use Load-Acquire
297 semantics.
298 Please note that this does not necessarily enable the workaround,
299 as it depends on the alternative framework, which will only patch
300 the kernel if an affected CPU is detected.
301
302 If unsure, say Y.
303
304endmenu
305
306
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307choice
308 prompt "Page size"
309 default ARM64_4K_PAGES
310 help
311 Page size (translation granule) configuration.
312
313config ARM64_4K_PAGES
314 bool "4KB"
315 help
316 This feature enables 4KB pages support.
317
8c2c3df3 318config ARM64_64K_PAGES
e41ceed0 319 bool "64KB"
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320 help
321 This feature enables 64KB pages support (4KB by default)
322 allowing only two levels of page tables and faster TLB
323 look-up. AArch32 emulation is not available when this feature
324 is enabled.
325
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326endchoice
327
328choice
329 prompt "Virtual address space size"
330 default ARM64_VA_BITS_39 if ARM64_4K_PAGES
331 default ARM64_VA_BITS_42 if ARM64_64K_PAGES
332 help
333 Allows choosing one of multiple possible virtual address
334 space sizes. The level of translation table is determined by
335 a combination of page size and virtual address space size.
336
337config ARM64_VA_BITS_39
338 bool "39-bit"
339 depends on ARM64_4K_PAGES
340
341config ARM64_VA_BITS_42
342 bool "42-bit"
343 depends on ARM64_64K_PAGES
344
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345config ARM64_VA_BITS_48
346 bool "48-bit"
04f905a9 347 depends on !ARM_SMMU
c79b954b 348
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349endchoice
350
351config ARM64_VA_BITS
352 int
353 default 39 if ARM64_VA_BITS_39
354 default 42 if ARM64_VA_BITS_42
c79b954b 355 default 48 if ARM64_VA_BITS_48
e41ceed0 356
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357config ARM64_PGTABLE_LEVELS
358 int
359 default 2 if ARM64_64K_PAGES && ARM64_VA_BITS_42
383c2799 360 default 3 if ARM64_64K_PAGES && ARM64_VA_BITS_48
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361 default 3 if ARM64_4K_PAGES && ARM64_VA_BITS_39
362 default 4 if ARM64_4K_PAGES && ARM64_VA_BITS_48
c79b954b 363
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364config CPU_BIG_ENDIAN
365 bool "Build big-endian kernel"
366 help
367 Say Y if you plan on running a kernel in big-endian mode.
368
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369config SMP
370 bool "Symmetric Multi-Processing"
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371 help
372 This enables support for systems with more than one CPU. If
373 you say N here, the kernel will run on single and
374 multiprocessor machines, but will use only one CPU of a
375 multiprocessor machine. If you say Y here, the kernel will run
376 on many, but not all, single processor machines. On a single
377 processor machine, the kernel will run faster if you say N
378 here.
379
380 If you don't know what to do here, say N.
381
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382config SCHED_MC
383 bool "Multi-core scheduler support"
384 depends on SMP
385 help
386 Multi-core scheduler support improves the CPU scheduler's decision
387 making when dealing with multi-core CPU chips at a cost of slightly
388 increased overhead in some places. If unsure say N here.
389
390config SCHED_SMT
391 bool "SMT scheduler support"
392 depends on SMP
393 help
394 Improves the CPU scheduler's decision making when dealing with
395 MultiThreading at a cost of slightly increased overhead in some
396 places. If unsure say N here.
397
8c2c3df3 398config NR_CPUS
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399 int "Maximum number of CPUs (2-64)"
400 range 2 64
8c2c3df3 401 depends on SMP
15942853 402 # These have to remain sorted largest to smallest
e3672649 403 default "64"
8c2c3df3 404
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405config HOTPLUG_CPU
406 bool "Support for hot-pluggable CPUs"
407 depends on SMP
408 help
409 Say Y here to experiment with turning CPUs off and on. CPUs
410 can be controlled through /sys/devices/system/cpu.
411
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412source kernel/Kconfig.preempt
413
414config HZ
415 int
416 default 100
417
418config ARCH_HAS_HOLES_MEMORYMODEL
419 def_bool y if SPARSEMEM
420
421config ARCH_SPARSEMEM_ENABLE
422 def_bool y
423 select SPARSEMEM_VMEMMAP_ENABLE
424
425config ARCH_SPARSEMEM_DEFAULT
426 def_bool ARCH_SPARSEMEM_ENABLE
427
428config ARCH_SELECT_MEMORY_MODEL
429 def_bool ARCH_SPARSEMEM_ENABLE
430
431config HAVE_ARCH_PFN_VALID
432 def_bool ARCH_HAS_HOLES_MEMORYMODEL || !SPARSEMEM
433
434config HW_PERF_EVENTS
435 bool "Enable hardware performance counter support for perf events"
436 depends on PERF_EVENTS
437 default y
438 help
439 Enable hardware performance counter support for perf events. If
440 disabled, perf events will use software events only.
441
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442config SYS_SUPPORTS_HUGETLBFS
443 def_bool y
444
445config ARCH_WANT_GENERAL_HUGETLB
446 def_bool y
447
448config ARCH_WANT_HUGE_PMD_SHARE
449 def_bool y if !ARM64_64K_PAGES
450
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451config HAVE_ARCH_TRANSPARENT_HUGEPAGE
452 def_bool y
453
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454config ARCH_HAS_CACHE_LINE_SIZE
455 def_bool y
456
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457source "mm/Kconfig"
458
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459config SECCOMP
460 bool "Enable seccomp to safely compute untrusted bytecode"
461 ---help---
462 This kernel feature is useful for number crunching applications
463 that may need to compute untrusted bytecode during their
464 execution. By using pipes or other transports made available to
465 the process as file descriptors supporting the read/write
466 syscalls, it's possible to isolate those applications in
467 their own address space using seccomp. Once seccomp is
468 enabled via prctl(PR_SET_SECCOMP), it cannot be disabled
469 and the task is only allowed to execute a few safe syscalls
470 defined by each seccomp mode.
471
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472config XEN_DOM0
473 def_bool y
474 depends on XEN
475
476config XEN
c2ba1f7d 477 bool "Xen guest support on ARM64"
aa42aa13 478 depends on ARM64 && OF
83862ccf 479 select SWIOTLB_XEN
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480 help
481 Say Y if you want to run Linux in a Virtual Machine on Xen on ARM64.
482
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483config FORCE_MAX_ZONEORDER
484 int
485 default "14" if (ARM64_64K_PAGES && TRANSPARENT_HUGEPAGE)
486 default "11"
487
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488menuconfig ARMV8_DEPRECATED
489 bool "Emulate deprecated/obsolete ARMv8 instructions"
490 depends on COMPAT
491 help
492 Legacy software support may require certain instructions
493 that have been deprecated or obsoleted in the architecture.
494
495 Enable this config to enable selective emulation of these
496 features.
497
498 If unsure, say Y
499
500if ARMV8_DEPRECATED
501
502config SWP_EMULATION
503 bool "Emulate SWP/SWPB instructions"
504 help
505 ARMv8 obsoletes the use of A32 SWP/SWPB instructions such that
506 they are always undefined. Say Y here to enable software
507 emulation of these instructions for userspace using LDXR/STXR.
508
509 In some older versions of glibc [<=2.8] SWP is used during futex
510 trylock() operations with the assumption that the code will not
511 be preempted. This invalid assumption may be more likely to fail
512 with SWP emulation enabled, leading to deadlock of the user
513 application.
514
515 NOTE: when accessing uncached shared regions, LDXR/STXR rely
516 on an external transaction monitoring block called a global
517 monitor to maintain update atomicity. If your system does not
518 implement a global monitor, this option can cause programs that
519 perform SWP operations to uncached memory to deadlock.
520
521 If unsure, say Y
522
523config CP15_BARRIER_EMULATION
524 bool "Emulate CP15 Barrier instructions"
525 help
526 The CP15 barrier instructions - CP15ISB, CP15DSB, and
527 CP15DMB - are deprecated in ARMv8 (and ARMv7). It is
528 strongly recommended to use the ISB, DSB, and DMB
529 instructions instead.
530
531 Say Y here to enable software emulation of these
532 instructions for AArch32 userspace code. When this option is
533 enabled, CP15 barrier usage is traced which can help
534 identify software that needs updating.
535
536 If unsure, say Y
537
538endif
539
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540endmenu
541
542menu "Boot options"
543
544config CMDLINE
545 string "Default kernel command string"
546 default ""
547 help
548 Provide a set of default command-line options at build time by
549 entering them here. As a minimum, you should specify the the
550 root device (e.g. root=/dev/nfs).
551
552config CMDLINE_FORCE
553 bool "Always use the default kernel command string"
554 help
555 Always use the default kernel command string, even if the boot
556 loader passes other arguments to the kernel.
557 This is useful if you cannot or don't want to change the
558 command-line options your boot loader passes to the kernel.
559
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560config EFI_STUB
561 bool
562
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563config EFI
564 bool "UEFI runtime support"
565 depends on OF && !CPU_BIG_ENDIAN
566 select LIBFDT
567 select UCS2_STRING
568 select EFI_PARAMS_FROM_FDT
e15dd494 569 select EFI_RUNTIME_WRAPPERS
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570 select EFI_STUB
571 select EFI_ARMSTUB
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572 default y
573 help
574 This option provides support for runtime services provided
575 by UEFI firmware (such as non-volatile variables, realtime
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576 clock, and platform reset). A UEFI stub is also provided to
577 allow the kernel to be booted as an EFI application. This
578 is only useful on systems that have UEFI firmware.
f84d0275 579
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580config DMI
581 bool "Enable support for SMBIOS (DMI) tables"
582 depends on EFI
583 default y
584 help
585 This enables SMBIOS/DMI feature for systems.
586
587 This option is only useful on systems that have UEFI firmware.
588 However, even with this option, the resultant kernel should
589 continue to boot on existing non-UEFI platforms.
590
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591endmenu
592
593menu "Userspace binary formats"
594
595source "fs/Kconfig.binfmt"
596
597config COMPAT
598 bool "Kernel support for 32-bit EL0"
599 depends on !ARM64_64K_PAGES
600 select COMPAT_BINFMT_ELF
af1839eb 601 select HAVE_UID16
84b9e9b4 602 select OLD_SIGSUSPEND3
51682036 603 select COMPAT_OLD_SIGACTION
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604 help
605 This option enables support for a 32-bit EL0 running under a 64-bit
606 kernel at EL1. AArch32-specific components such as system calls,
607 the user helper functions, VFP support and the ptrace interface are
608 handled appropriately by the kernel.
609
610 If you want to execute 32-bit userspace applications, say Y.
611
612config SYSVIPC_COMPAT
613 def_bool y
614 depends on COMPAT && SYSVIPC
615
616endmenu
617
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618menu "Power management options"
619
620source "kernel/power/Kconfig"
621
622config ARCH_SUSPEND_POSSIBLE
623 def_bool y
624
625config ARM64_CPU_SUSPEND
626 def_bool PM_SLEEP
627
628endmenu
629
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630menu "CPU Power Management"
631
632source "drivers/cpuidle/Kconfig"
633
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634source "drivers/cpufreq/Kconfig"
635
636endmenu
637
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638source "net/Kconfig"
639
640source "drivers/Kconfig"
641
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642source "drivers/firmware/Kconfig"
643
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644source "fs/Kconfig"
645
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646source "arch/arm64/kvm/Kconfig"
647
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648source "arch/arm64/Kconfig.debug"
649
650source "security/Kconfig"
651
652source "crypto/Kconfig"
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653if CRYPTO
654source "arch/arm64/crypto/Kconfig"
655endif
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656
657source "lib/Kconfig"