Commit | Line | Data |
---|---|---|
1da177e4 LT |
1 | /* |
2 | * linux/arch/arm26/kernel/ptrace.c | |
3 | * | |
4 | * By Ross Biro 1/23/92 | |
5 | * edited by Linus Torvalds | |
6 | * ARM modifications Copyright (C) 2000 Russell King | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
1da177e4 LT |
12 | #include <linux/kernel.h> |
13 | #include <linux/sched.h> | |
14 | #include <linux/mm.h> | |
15 | #include <linux/smp.h> | |
1da177e4 LT |
16 | #include <linux/ptrace.h> |
17 | #include <linux/user.h> | |
18 | #include <linux/security.h> | |
7ed20e1a | 19 | #include <linux/signal.h> |
1da177e4 LT |
20 | |
21 | #include <asm/uaccess.h> | |
22 | #include <asm/pgtable.h> | |
23 | #include <asm/system.h> | |
24 | //#include <asm/processor.h> | |
25 | ||
26 | #include "ptrace.h" | |
27 | ||
28 | #define REG_PC 15 | |
29 | #define REG_PSR 15 | |
30 | /* | |
31 | * does not yet catch signals sent when the child dies. | |
32 | * in exit.c or in signal.c. | |
33 | */ | |
34 | ||
35 | /* | |
36 | * Breakpoint SWI instruction: SWI &9F0001 | |
37 | */ | |
38 | #define BREAKINST_ARM 0xef9f0001 | |
39 | ||
1da177e4 LT |
40 | /* |
41 | * this routine will get a word off of the processes privileged stack. | |
42 | * the offset is how far from the base addr as stored in the THREAD. | |
43 | * this routine assumes that all the privileged stacks are in our | |
44 | * data space. | |
45 | */ | |
46 | static inline long get_user_reg(struct task_struct *task, int offset) | |
47 | { | |
02ef691f | 48 | return task_pt_regs(task)->uregs[offset]; |
1da177e4 LT |
49 | } |
50 | ||
51 | /* | |
52 | * this routine will put a word on the processes privileged stack. | |
53 | * the offset is how far from the base addr as stored in the THREAD. | |
54 | * this routine assumes that all the privileged stacks are in our | |
55 | * data space. | |
56 | */ | |
57 | static inline int | |
58 | put_user_reg(struct task_struct *task, int offset, long data) | |
59 | { | |
02ef691f | 60 | struct pt_regs newregs, *regs = task_pt_regs(task); |
1da177e4 LT |
61 | int ret = -EINVAL; |
62 | ||
63 | newregs = *regs; | |
64 | newregs.uregs[offset] = data; | |
65 | ||
66 | if (valid_user_regs(&newregs)) { | |
67 | regs->uregs[offset] = data; | |
68 | ret = 0; | |
69 | } | |
70 | ||
71 | return ret; | |
72 | } | |
73 | ||
74 | static inline int | |
75 | read_u32(struct task_struct *task, unsigned long addr, u32 *res) | |
76 | { | |
77 | int ret; | |
78 | ||
79 | ret = access_process_vm(task, addr, res, sizeof(*res), 0); | |
80 | ||
81 | return ret == sizeof(*res) ? 0 : -EIO; | |
82 | } | |
83 | ||
84 | static inline int | |
85 | read_instr(struct task_struct *task, unsigned long addr, u32 *res) | |
86 | { | |
87 | int ret; | |
88 | u32 val; | |
89 | ret = access_process_vm(task, addr & ~3, &val, sizeof(val), 0); | |
90 | ret = ret == sizeof(val) ? 0 : -EIO; | |
91 | *res = val; | |
92 | return ret; | |
93 | } | |
94 | ||
95 | /* | |
96 | * Get value of register `rn' (in the instruction) | |
97 | */ | |
98 | static unsigned long | |
99 | ptrace_getrn(struct task_struct *child, unsigned long insn) | |
100 | { | |
101 | unsigned int reg = (insn >> 16) & 15; | |
102 | unsigned long val; | |
103 | ||
104 | val = get_user_reg(child, reg); | |
105 | if (reg == 15) | |
106 | val = pc_pointer(val + 8); //FIXME - correct for arm26? | |
107 | ||
108 | return val; | |
109 | } | |
110 | ||
111 | /* | |
112 | * Get value of operand 2 (in an ALU instruction) | |
113 | */ | |
114 | static unsigned long | |
115 | ptrace_getaluop2(struct task_struct *child, unsigned long insn) | |
116 | { | |
117 | unsigned long val; | |
118 | int shift; | |
119 | int type; | |
120 | ||
121 | if (insn & 1 << 25) { | |
122 | val = insn & 255; | |
123 | shift = (insn >> 8) & 15; | |
124 | type = 3; | |
125 | } else { | |
126 | val = get_user_reg (child, insn & 15); | |
127 | ||
128 | if (insn & (1 << 4)) | |
129 | shift = (int)get_user_reg (child, (insn >> 8) & 15); | |
130 | else | |
131 | shift = (insn >> 7) & 31; | |
132 | ||
133 | type = (insn >> 5) & 3; | |
134 | } | |
135 | ||
136 | switch (type) { | |
137 | case 0: val <<= shift; break; | |
138 | case 1: val >>= shift; break; | |
139 | case 2: | |
140 | val = (((signed long)val) >> shift); | |
141 | break; | |
142 | case 3: | |
143 | val = (val >> shift) | (val << (32 - shift)); | |
144 | break; | |
145 | } | |
146 | return val; | |
147 | } | |
148 | ||
149 | /* | |
150 | * Get value of operand 2 (in a LDR instruction) | |
151 | */ | |
152 | static unsigned long | |
153 | ptrace_getldrop2(struct task_struct *child, unsigned long insn) | |
154 | { | |
155 | unsigned long val; | |
156 | int shift; | |
157 | int type; | |
158 | ||
159 | val = get_user_reg(child, insn & 15); | |
160 | shift = (insn >> 7) & 31; | |
161 | type = (insn >> 5) & 3; | |
162 | ||
163 | switch (type) { | |
164 | case 0: val <<= shift; break; | |
165 | case 1: val >>= shift; break; | |
166 | case 2: | |
167 | val = (((signed long)val) >> shift); | |
168 | break; | |
169 | case 3: | |
170 | val = (val >> shift) | (val << (32 - shift)); | |
171 | break; | |
172 | } | |
173 | return val; | |
174 | } | |
175 | ||
176 | #define OP_MASK 0x01e00000 | |
177 | #define OP_AND 0x00000000 | |
178 | #define OP_EOR 0x00200000 | |
179 | #define OP_SUB 0x00400000 | |
180 | #define OP_RSB 0x00600000 | |
181 | #define OP_ADD 0x00800000 | |
182 | #define OP_ADC 0x00a00000 | |
183 | #define OP_SBC 0x00c00000 | |
184 | #define OP_RSC 0x00e00000 | |
185 | #define OP_ORR 0x01800000 | |
186 | #define OP_MOV 0x01a00000 | |
187 | #define OP_BIC 0x01c00000 | |
188 | #define OP_MVN 0x01e00000 | |
189 | ||
190 | static unsigned long | |
191 | get_branch_address(struct task_struct *child, unsigned long pc, unsigned long insn) | |
192 | { | |
193 | u32 alt = 0; | |
194 | ||
195 | switch (insn & 0x0e000000) { | |
196 | case 0x00000000: | |
197 | case 0x02000000: { | |
198 | /* | |
199 | * data processing | |
200 | */ | |
201 | long aluop1, aluop2, ccbit; | |
202 | ||
203 | if ((insn & 0xf000) != 0xf000) | |
204 | break; | |
205 | ||
206 | aluop1 = ptrace_getrn(child, insn); | |
207 | aluop2 = ptrace_getaluop2(child, insn); | |
208 | ccbit = get_user_reg(child, REG_PSR) & PSR_C_BIT ? 1 : 0; | |
209 | ||
210 | switch (insn & OP_MASK) { | |
211 | case OP_AND: alt = aluop1 & aluop2; break; | |
212 | case OP_EOR: alt = aluop1 ^ aluop2; break; | |
213 | case OP_SUB: alt = aluop1 - aluop2; break; | |
214 | case OP_RSB: alt = aluop2 - aluop1; break; | |
215 | case OP_ADD: alt = aluop1 + aluop2; break; | |
216 | case OP_ADC: alt = aluop1 + aluop2 + ccbit; break; | |
217 | case OP_SBC: alt = aluop1 - aluop2 + ccbit; break; | |
218 | case OP_RSC: alt = aluop2 - aluop1 + ccbit; break; | |
219 | case OP_ORR: alt = aluop1 | aluop2; break; | |
220 | case OP_MOV: alt = aluop2; break; | |
221 | case OP_BIC: alt = aluop1 & ~aluop2; break; | |
222 | case OP_MVN: alt = ~aluop2; break; | |
223 | } | |
224 | break; | |
225 | } | |
226 | ||
227 | case 0x04000000: | |
228 | case 0x06000000: | |
229 | /* | |
230 | * ldr | |
231 | */ | |
232 | if ((insn & 0x0010f000) == 0x0010f000) { | |
233 | unsigned long base; | |
234 | ||
235 | base = ptrace_getrn(child, insn); | |
236 | if (insn & 1 << 24) { | |
237 | long aluop2; | |
238 | ||
239 | if (insn & 0x02000000) | |
240 | aluop2 = ptrace_getldrop2(child, insn); | |
241 | else | |
242 | aluop2 = insn & 0xfff; | |
243 | ||
244 | if (insn & 1 << 23) | |
245 | base += aluop2; | |
246 | else | |
247 | base -= aluop2; | |
248 | } | |
249 | if (read_u32(child, base, &alt) == 0) | |
250 | alt = pc_pointer(alt); | |
251 | } | |
252 | break; | |
253 | ||
254 | case 0x08000000: | |
255 | /* | |
256 | * ldm | |
257 | */ | |
258 | if ((insn & 0x00108000) == 0x00108000) { | |
259 | unsigned long base; | |
260 | unsigned int nr_regs; | |
261 | ||
262 | if (insn & (1 << 23)) { | |
263 | nr_regs = hweight16(insn & 65535) << 2; | |
264 | ||
265 | if (!(insn & (1 << 24))) | |
266 | nr_regs -= 4; | |
267 | } else { | |
268 | if (insn & (1 << 24)) | |
269 | nr_regs = -4; | |
270 | else | |
271 | nr_regs = 0; | |
272 | } | |
273 | ||
274 | base = ptrace_getrn(child, insn); | |
275 | ||
276 | if (read_u32(child, base + nr_regs, &alt) == 0) | |
277 | alt = pc_pointer(alt); | |
278 | break; | |
279 | } | |
280 | break; | |
281 | ||
282 | case 0x0a000000: { | |
283 | /* | |
284 | * bl or b | |
285 | */ | |
286 | signed long displ; | |
287 | /* It's a branch/branch link: instead of trying to | |
288 | * figure out whether the branch will be taken or not, | |
289 | * we'll put a breakpoint at both locations. This is | |
290 | * simpler, more reliable, and probably not a whole lot | |
291 | * slower than the alternative approach of emulating the | |
292 | * branch. | |
293 | */ | |
294 | displ = (insn & 0x00ffffff) << 8; | |
295 | displ = (displ >> 6) + 8; | |
296 | if (displ != 0 && displ != 4) | |
297 | alt = pc + displ; | |
298 | } | |
299 | break; | |
300 | } | |
301 | ||
302 | return alt; | |
303 | } | |
304 | ||
305 | static int | |
306 | swap_insn(struct task_struct *task, unsigned long addr, | |
307 | void *old_insn, void *new_insn, int size) | |
308 | { | |
309 | int ret; | |
310 | ||
311 | ret = access_process_vm(task, addr, old_insn, size, 0); | |
312 | if (ret == size) | |
313 | ret = access_process_vm(task, addr, new_insn, size, 1); | |
314 | return ret; | |
315 | } | |
316 | ||
317 | static void | |
318 | add_breakpoint(struct task_struct *task, struct debug_info *dbg, unsigned long addr) | |
319 | { | |
320 | int nr = dbg->nsaved; | |
321 | ||
322 | if (nr < 2) { | |
323 | u32 new_insn = BREAKINST_ARM; | |
324 | int res; | |
325 | ||
326 | res = swap_insn(task, addr, &dbg->bp[nr].insn, &new_insn, 4); | |
327 | ||
328 | if (res == 4) { | |
329 | dbg->bp[nr].address = addr; | |
330 | dbg->nsaved += 1; | |
331 | } | |
332 | } else | |
333 | printk(KERN_ERR "ptrace: too many breakpoints\n"); | |
334 | } | |
335 | ||
336 | /* | |
337 | * Clear one breakpoint in the user program. We copy what the hardware | |
338 | * does and use bit 0 of the address to indicate whether this is a Thumb | |
339 | * breakpoint or an ARM breakpoint. | |
340 | */ | |
341 | static void clear_breakpoint(struct task_struct *task, struct debug_entry *bp) | |
342 | { | |
343 | unsigned long addr = bp->address; | |
344 | u32 old_insn; | |
345 | int ret; | |
346 | ||
347 | ret = swap_insn(task, addr & ~3, &old_insn, | |
348 | &bp->insn, 4); | |
349 | ||
350 | if (ret != 4 || old_insn != BREAKINST_ARM) | |
351 | printk(KERN_ERR "%s:%d: corrupted ARM breakpoint at " | |
352 | "0x%08lx (0x%08x)\n", task->comm, task->pid, | |
353 | addr, old_insn); | |
354 | } | |
355 | ||
356 | void ptrace_set_bpt(struct task_struct *child) | |
357 | { | |
358 | struct pt_regs *regs; | |
359 | unsigned long pc; | |
360 | u32 insn; | |
361 | int res; | |
362 | ||
02ef691f | 363 | regs = task_pt_regs(child); |
1da177e4 LT |
364 | pc = instruction_pointer(regs); |
365 | ||
366 | res = read_instr(child, pc, &insn); | |
367 | if (!res) { | |
368 | struct debug_info *dbg = &child->thread.debug; | |
369 | unsigned long alt; | |
370 | ||
371 | dbg->nsaved = 0; | |
372 | ||
373 | alt = get_branch_address(child, pc, insn); | |
374 | if (alt) | |
375 | add_breakpoint(child, dbg, alt); | |
376 | ||
377 | /* | |
378 | * Note that we ignore the result of setting the above | |
379 | * breakpoint since it may fail. When it does, this is | |
380 | * not so much an error, but a forewarning that we may | |
381 | * be receiving a prefetch abort shortly. | |
382 | * | |
383 | * If we don't set this breakpoint here, then we can | |
384 | * lose control of the thread during single stepping. | |
385 | */ | |
386 | if (!alt || predicate(insn) != PREDICATE_ALWAYS) | |
387 | add_breakpoint(child, dbg, pc + 4); | |
388 | } | |
389 | } | |
390 | ||
391 | /* | |
392 | * Ensure no single-step breakpoint is pending. Returns non-zero | |
393 | * value if child was being single-stepped. | |
394 | */ | |
395 | void ptrace_cancel_bpt(struct task_struct *child) | |
396 | { | |
397 | int i, nsaved = child->thread.debug.nsaved; | |
398 | ||
399 | child->thread.debug.nsaved = 0; | |
400 | ||
401 | if (nsaved > 2) { | |
402 | printk("ptrace_cancel_bpt: bogus nsaved: %d!\n", nsaved); | |
403 | nsaved = 2; | |
404 | } | |
405 | ||
406 | for (i = 0; i < nsaved; i++) | |
407 | clear_breakpoint(child, &child->thread.debug.bp[i]); | |
408 | } | |
409 | ||
410 | /* | |
411 | * Called by kernel/ptrace.c when detaching.. | |
412 | * | |
413 | * Make sure the single step bit is not set. | |
414 | */ | |
415 | void ptrace_disable(struct task_struct *child) | |
416 | { | |
417 | child->ptrace &= ~PT_SINGLESTEP; | |
418 | ptrace_cancel_bpt(child); | |
419 | } | |
420 | ||
421 | /* | |
422 | * Handle hitting a breakpoint. | |
423 | */ | |
424 | void ptrace_break(struct task_struct *tsk, struct pt_regs *regs) | |
425 | { | |
426 | siginfo_t info; | |
427 | ||
428 | /* | |
429 | * The PC is always left pointing at the next instruction. Fix this. | |
430 | */ | |
431 | regs->ARM_pc -= 4; | |
432 | ||
433 | if (tsk->thread.debug.nsaved == 0) | |
434 | printk(KERN_ERR "ptrace: bogus breakpoint trap\n"); | |
435 | ||
436 | ptrace_cancel_bpt(tsk); | |
437 | ||
438 | info.si_signo = SIGTRAP; | |
439 | info.si_errno = 0; | |
440 | info.si_code = TRAP_BRKPT; | |
441 | info.si_addr = (void *)instruction_pointer(regs) - 4; | |
442 | ||
443 | force_sig_info(SIGTRAP, &info, tsk); | |
444 | } | |
445 | ||
446 | /* | |
447 | * Read the word at offset "off" into the "struct user". We | |
448 | * actually access the pt_regs stored on the kernel stack. | |
449 | */ | |
450 | static int ptrace_read_user(struct task_struct *tsk, unsigned long off, | |
451 | unsigned long *ret) | |
452 | { | |
453 | unsigned long tmp; | |
454 | ||
455 | if (off & 3 || off >= sizeof(struct user)) | |
456 | return -EIO; | |
457 | ||
458 | tmp = 0; | |
459 | if (off < sizeof(struct pt_regs)) | |
460 | tmp = get_user_reg(tsk, off >> 2); | |
461 | ||
462 | return put_user(tmp, ret); | |
463 | } | |
464 | ||
465 | /* | |
466 | * Write the word at offset "off" into "struct user". We | |
467 | * actually access the pt_regs stored on the kernel stack. | |
468 | */ | |
469 | static int ptrace_write_user(struct task_struct *tsk, unsigned long off, | |
470 | unsigned long val) | |
471 | { | |
472 | if (off & 3 || off >= sizeof(struct user)) | |
473 | return -EIO; | |
474 | ||
475 | if (off >= sizeof(struct pt_regs)) | |
476 | return 0; | |
477 | ||
478 | return put_user_reg(tsk, off >> 2, val); | |
479 | } | |
480 | ||
481 | /* | |
482 | * Get all user integer registers. | |
483 | */ | |
484 | static int ptrace_getregs(struct task_struct *tsk, void *uregs) | |
485 | { | |
02ef691f | 486 | struct pt_regs *regs = task_pt_regs(tsk); |
1da177e4 LT |
487 | |
488 | return copy_to_user(uregs, regs, sizeof(struct pt_regs)) ? -EFAULT : 0; | |
489 | } | |
490 | ||
491 | /* | |
492 | * Set all user integer registers. | |
493 | */ | |
494 | static int ptrace_setregs(struct task_struct *tsk, void *uregs) | |
495 | { | |
496 | struct pt_regs newregs; | |
497 | int ret; | |
498 | ||
499 | ret = -EFAULT; | |
500 | if (copy_from_user(&newregs, uregs, sizeof(struct pt_regs)) == 0) { | |
02ef691f | 501 | struct pt_regs *regs = task_pt_regs(tsk); |
1da177e4 LT |
502 | |
503 | ret = -EINVAL; | |
504 | if (valid_user_regs(&newregs)) { | |
505 | *regs = newregs; | |
506 | ret = 0; | |
507 | } | |
508 | } | |
509 | ||
510 | return ret; | |
511 | } | |
512 | ||
513 | /* | |
514 | * Get the child FPU state. | |
515 | */ | |
516 | static int ptrace_getfpregs(struct task_struct *tsk, void *ufp) | |
517 | { | |
697102cd | 518 | return copy_to_user(ufp, &task_thread_info(tsk)->fpstate, |
1da177e4 LT |
519 | sizeof(struct user_fp)) ? -EFAULT : 0; |
520 | } | |
521 | ||
522 | /* | |
523 | * Set the child FPU state. | |
524 | */ | |
525 | static int ptrace_setfpregs(struct task_struct *tsk, void *ufp) | |
526 | { | |
527 | set_stopped_child_used_math(tsk); | |
f63776d0 | 528 | return copy_from_user(&task_thread_info(tsk)->fpstate, ufp, |
1da177e4 LT |
529 | sizeof(struct user_fp)) ? -EFAULT : 0; |
530 | } | |
531 | ||
481bed45 | 532 | long arch_ptrace(struct task_struct *child, long request, long addr, long data) |
1da177e4 | 533 | { |
1da177e4 LT |
534 | int ret; |
535 | ||
536 | switch (request) { | |
537 | /* | |
538 | * read word at location "addr" in the child process. | |
539 | */ | |
540 | case PTRACE_PEEKTEXT: | |
541 | case PTRACE_PEEKDATA: | |
76647323 | 542 | ret = generic_ptrace_peekdata(child, addr, data); |
1da177e4 LT |
543 | break; |
544 | ||
545 | case PTRACE_PEEKUSR: | |
546 | ret = ptrace_read_user(child, addr, (unsigned long *)data); | |
547 | break; | |
548 | ||
549 | /* | |
550 | * write the word at location addr. | |
551 | */ | |
552 | case PTRACE_POKETEXT: | |
553 | case PTRACE_POKEDATA: | |
f284ce72 | 554 | ret = generic_ptrace_pokedata(child, addr, data); |
1da177e4 LT |
555 | break; |
556 | ||
557 | case PTRACE_POKEUSR: | |
558 | ret = ptrace_write_user(child, addr, data); | |
559 | break; | |
560 | ||
561 | /* | |
562 | * continue/restart and stop at next (return from) syscall | |
563 | */ | |
564 | case PTRACE_SYSCALL: | |
565 | case PTRACE_CONT: | |
566 | ret = -EIO; | |
7ed20e1a | 567 | if (!valid_signal(data)) |
1da177e4 LT |
568 | break; |
569 | if (request == PTRACE_SYSCALL) | |
570 | set_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
571 | else | |
572 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
573 | child->exit_code = data; | |
574 | /* make sure single-step breakpoint is gone. */ | |
575 | child->ptrace &= ~PT_SINGLESTEP; | |
576 | ptrace_cancel_bpt(child); | |
577 | wake_up_process(child); | |
578 | ret = 0; | |
579 | break; | |
580 | ||
581 | /* | |
582 | * make the child exit. Best I can do is send it a sigkill. | |
583 | * perhaps it should be put in the status that it wants to | |
584 | * exit. | |
585 | */ | |
586 | case PTRACE_KILL: | |
587 | /* make sure single-step breakpoint is gone. */ | |
588 | child->ptrace &= ~PT_SINGLESTEP; | |
589 | ptrace_cancel_bpt(child); | |
590 | if (child->exit_state != EXIT_ZOMBIE) { | |
591 | child->exit_code = SIGKILL; | |
592 | wake_up_process(child); | |
593 | } | |
594 | ret = 0; | |
595 | break; | |
596 | ||
597 | /* | |
598 | * execute single instruction. | |
599 | */ | |
600 | case PTRACE_SINGLESTEP: | |
601 | ret = -EIO; | |
7ed20e1a | 602 | if (!valid_signal(data)) |
1da177e4 LT |
603 | break; |
604 | child->ptrace |= PT_SINGLESTEP; | |
605 | clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE); | |
606 | child->exit_code = data; | |
607 | /* give it a chance to run. */ | |
608 | wake_up_process(child); | |
609 | ret = 0; | |
610 | break; | |
611 | ||
612 | case PTRACE_DETACH: | |
613 | ret = ptrace_detach(child, data); | |
614 | break; | |
615 | ||
616 | case PTRACE_GETREGS: | |
617 | ret = ptrace_getregs(child, (void *)data); | |
618 | break; | |
619 | ||
620 | case PTRACE_SETREGS: | |
621 | ret = ptrace_setregs(child, (void *)data); | |
622 | break; | |
623 | ||
624 | case PTRACE_GETFPREGS: | |
625 | ret = ptrace_getfpregs(child, (void *)data); | |
626 | break; | |
627 | ||
628 | case PTRACE_SETFPREGS: | |
629 | ret = ptrace_setfpregs(child, (void *)data); | |
630 | break; | |
631 | ||
632 | default: | |
633 | ret = ptrace_request(child, request, addr, data); | |
634 | break; | |
635 | } | |
636 | ||
637 | return ret; | |
638 | } | |
639 | ||
1da177e4 LT |
640 | asmlinkage void syscall_trace(int why, struct pt_regs *regs) |
641 | { | |
642 | unsigned long ip; | |
643 | ||
644 | if (!test_thread_flag(TIF_SYSCALL_TRACE)) | |
645 | return; | |
646 | if (!(current->ptrace & PT_PTRACED)) | |
647 | return; | |
648 | ||
649 | /* | |
650 | * Save IP. IP is used to denote syscall entry/exit: | |
651 | * IP = 0 -> entry, = 1 -> exit | |
652 | */ | |
653 | ip = regs->ARM_ip; | |
654 | regs->ARM_ip = why; | |
655 | ||
656 | /* the 0x80 provides a way for the tracing parent to distinguish | |
657 | between a syscall stop and SIGTRAP delivery */ | |
658 | ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD) | |
659 | ? 0x80 : 0)); | |
660 | /* | |
661 | * this isn't the same as continuing with a signal, but it will do | |
662 | * for normal use. strace only continues with a signal if the | |
663 | * stopping signal is not SIGTRAP. -brl | |
664 | */ | |
665 | if (current->exit_code) { | |
666 | send_sig(current->exit_code, current, 1); | |
667 | current->exit_code = 0; | |
668 | } | |
669 | regs->ARM_ip = ip; | |
670 | } |