[linux-2.6-block.git] / arch / arm / plat-samsung / pm.c

/* linux/arch/arm/plat-s3c/pm.c
 *
 * Copyright 2008 Openmoko, Inc.
 * Copyright 2004-2008 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *	http://armlinux.simtec.co.uk/
 *
 * S3C common power management (suspend to ram) support.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
*/

#include <linux/init.h>
#include <linux/suspend.h>
#include <linux/errno.h>
#include <linux/delay.h>
#include <linux/serial_core.h>
#include <linux/io.h>

#include <asm/cacheflush.h>
#include <asm/suspend.h>
#include <mach/hardware.h>
#include <mach/map.h>

#include <plat/regs-serial.h>
#include <mach/regs-clock.h>
#include <mach/regs-irq.h>
#include <asm/irq.h>

#include <plat/pm.h>
#include <mach/pm-core.h>

/* for external use */

unsigned long s3c_pm_flags;

/* Debug code:
 *
 * This code supports debug output to the low level UARTs for use on
 * resume before the console layer is available.
*/

#ifdef CONFIG_SAMSUNG_PM_DEBUG
extern void printascii(const char *);

void s3c_pm_dbg(const char *fmt, ...)
{
	va_list va;
	char buff[256];

	va_start(va, fmt);
	vsnprintf(buff, sizeof(buff), fmt, va);
	va_end(va);

	printascii(buff);
}

static inline void s3c_pm_debug_init(void)
{
	/* restart uart clocks so we can use them to output */
	s3c_pm_debug_init_uart();
}

#else
#define s3c_pm_debug_init() do { } while(0)

#endif /* CONFIG_SAMSUNG_PM_DEBUG */

/* Save the UART configurations if we are configured for debug. */

unsigned char pm_uart_udivslot;

#ifdef CONFIG_SAMSUNG_PM_DEBUG

static struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];

static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
{
	void __iomem *regs = S3C_VA_UARTx(uart);

	save->ulcon = __raw_readl(regs + S3C2410_ULCON);
	save->ucon = __raw_readl(regs + S3C2410_UCON);
	save->ufcon = __raw_readl(regs + S3C2410_UFCON);
	save->umcon = __raw_readl(regs + S3C2410_UMCON);
	save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);

	if (pm_uart_udivslot)
		save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT);

	S3C_PMDBG("UART[%d]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n",
		  uart, save->ulcon, save->ucon, save->ufcon, save->ubrdiv);
}

static void s3c_pm_save_uarts(void)
{
	struct pm_uart_save *save = uart_save;
	unsigned int uart;

	for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
		s3c_pm_save_uart(uart, save);
}

static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
{
	void __iomem *regs = S3C_VA_UARTx(uart);

	s3c_pm_arch_update_uart(regs, save);

	__raw_writel(save->ulcon, regs + S3C2410_ULCON);
	__raw_writel(save->ucon,  regs + S3C2410_UCON);
	__raw_writel(save->ufcon, regs + S3C2410_UFCON);
	__raw_writel(save->umcon, regs + S3C2410_UMCON);
	__raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);

	if (pm_uart_udivslot)
		__raw_writel(save->udivslot, regs + S3C2443_DIVSLOT);
}

static void s3c_pm_restore_uarts(void)
{
	struct pm_uart_save *save = uart_save;
	unsigned int uart;

	for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
		s3c_pm_restore_uart(uart, save);
}
#else
static void s3c_pm_save_uarts(void) { }
static void s3c_pm_restore_uarts(void) { }
#endif

/* The IRQ ext-int code goes here, it is too small to currently bother
 * with its own file. */

unsigned long s3c_irqwake_intmask	= 0xffffffffL;
unsigned long s3c_irqwake_eintmask	= 0xffffffffL;

int s3c_irqext_wake(struct irq_data *data, unsigned int state)
{
	unsigned long bit = 1L << IRQ_EINT_BIT(data->irq);

	if (!(s3c_irqwake_eintallow & bit))
		return -ENOENT;

	printk(KERN_INFO "wake %s for irq %d\n",
	       state ? "enabled" : "disabled", data->irq);

	if (!state)
		s3c_irqwake_eintmask |= bit;
	else
		s3c_irqwake_eintmask &= ~bit;

	return 0;
}

/* helper functions to save and restore register state */

/**
 * s3c_pm_do_save() - save a set of registers for restoration on resume.
 * @ptr: Pointer to an array of registers.
 * @count: Size of the ptr array.
 *
 * Run through the list of registers given, saving their contents in the
 * array for later restoration when we wakeup.
 */
void s3c_pm_do_save(struct sleep_save *ptr, int count)
{
	for (; count > 0; count--, ptr++) {
		ptr->val = __raw_readl(ptr->reg);
		S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val);
	}
}

/**
 * s3c_pm_do_restore() - restore register values from the save list.
 * @ptr: Pointer to an array of registers.
 * @count: Size of the ptr array.
 *
 * Restore the register values saved from s3c_pm_do_save().
 *
 * Note, we do not use S3C_PMDBG() in here, as the system may not have
 * restore the UARTs state yet
*/

void s3c_pm_do_restore(struct sleep_save *ptr, int count)
{
	for (; count > 0; count--, ptr++) {
		printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n",
		       ptr->reg, ptr->val, __raw_readl(ptr->reg));

		__raw_writel(ptr->val, ptr->reg);
	}
}

/**
 * s3c_pm_do_restore_core() - early restore register values from save list.
 *
 * This is similar to s3c_pm_do_restore() except we try and minimise the
 * side effects of the function in case registers that hardware might need
 * to work has been restored.
 *
 * WARNING: Do not put any debug in here that may effect memory or use
 * peripherals, as things may be changing!
*/

void s3c_pm_do_restore_core(struct sleep_save *ptr, int count)
{
	for (; count > 0; count--, ptr++)
		__raw_writel(ptr->val, ptr->reg);
}

/* s3c2410_pm_show_resume_irqs
 *
 * print any IRQs asserted at resume time (ie, we woke from)
*/
static void __maybe_unused s3c_pm_show_resume_irqs(int start,
						   unsigned long which,
						   unsigned long mask)
{
	int i;

	which &= ~mask;

	for (i = 0; i <= 31; i++) {
		if (which & (1L<<i)) {
			S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
		}
	}
}


void (*pm_cpu_prep)(void);
int (*pm_cpu_sleep)(unsigned long);

#define any_allowed(mask, allow) (((mask) & (allow)) != (allow))

/* s3c_pm_enter
 *
 * central control for sleep/resume process
*/

static int s3c_pm_enter(suspend_state_t state)
{
	int ret;
	/* ensure the debug is initialised (if enabled) */

	s3c_pm_debug_init();

	S3C_PMDBG("%s(%d)\n", __func__, state);

	if (pm_cpu_prep == NULL || pm_cpu_sleep == NULL) {
		printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
		return -EINVAL;
	}

	/* check if we have anything to wake-up with... bad things seem
	 * to happen if you suspend with no wakeup (system will often
	 * require a full power-cycle)
	*/

	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	    !any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
		printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
		printk(KERN_ERR "%s: Aborting sleep\n", __func__);
		return -EINVAL;
	}

	/* save all necessary core registers not covered by the drivers */

	samsung_pm_save_gpios();
	samsung_pm_saved_gpios();
	s3c_pm_save_uarts();
	s3c_pm_save_core();

	/* set the irq configuration for wake */

	s3c_pm_configure_extint();

	S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
	    s3c_irqwake_intmask, s3c_irqwake_eintmask);

	s3c_pm_arch_prepare_irqs();

	/* call cpu specific preparation */

	pm_cpu_prep();

	/* flush cache back to ram */

	flush_cache_all();

	s3c_pm_check_store();

	/* send the cpu to sleep... */

	s3c_pm_arch_stop_clocks();

	/* this will also act as our return point from when
	 * we resume as it saves its own register state and restores it
	 * during the resume.  */

	ret = cpu_suspend(0, pm_cpu_sleep);
	if (ret)
		return ret;

	/* restore the system state */

	s3c_pm_restore_core();
	s3c_pm_restore_uarts();
	samsung_pm_restore_gpios();
	s3c_pm_restored_gpios();

	s3c_pm_debug_init();

	/* check what irq (if any) restored the system */

	s3c_pm_arch_show_resume_irqs();

	S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);

	/* LEDs should now be 1110 */
	s3c_pm_debug_smdkled(1 << 1, 0);

	s3c_pm_check_restore();

	/* ok, let's return from sleep */

	S3C_PMDBG("S3C PM Resume (post-restore)\n");
	return 0;
}

static int s3c_pm_prepare(void)
{
	/* prepare check area if configured */

	s3c_pm_check_prepare();
	return 0;
}

static void s3c_pm_finish(void)
{
	s3c_pm_check_cleanup();
}

static const struct platform_suspend_ops s3c_pm_ops = {
	.enter		= s3c_pm_enter,
	.prepare	= s3c_pm_prepare,
	.finish		= s3c_pm_finish,
	.valid		= suspend_valid_only_mem,
};

/* s3c_pm_init
 *
 * Attach the power management functions. This should be called
 * from the board specific initialisation if the board supports
 * it.
*/

int __init s3c_pm_init(void)
{
	printk("S3C Power Management, Copyright 2004 Simtec Electronics\n");

	suspend_set_ops(&s3c_pm_ops);
	return 0;
}
Commit	Line	Data
6419711a BD	1	/* linux/arch/arm/plat-s3c/pm.c
	2	*
	3	* Copyright 2008 Openmoko, Inc.
ccae941e	4	* Copyright 2004-2008 Simtec Electronics
6419711a BD	5	* Ben Dooks <ben@simtec.co.uk>
	6	* http://armlinux.simtec.co.uk/
	7	*
	8	* S3C common power management (suspend to ram) support.
	9	*
	10	* This program is free software; you can redistribute it and/or modify
	11	* it under the terms of the GNU General Public License version 2 as
	12	* published by the Free Software Foundation.
	13	*/
	14
	15	#include <linux/init.h>
	16	#include <linux/suspend.h>
	17	#include <linux/errno.h>
2261e0e6 BD	18	#include <linux/delay.h>
2261e0e6 BD	19	#include <linux/serial_core.h>
6419711a BD	20	#include <linux/io.h>
6419711a BD	21
2261e0e6	22	#include <asm/cacheflush.h>
2c74a0ce	23	#include <asm/suspend.h>
2261e0e6	24	#include <mach/hardware.h>
bd117bd1	25	#include <mach/map.h>
2261e0e6 BD	26
	27	#include <plat/regs-serial.h>
	28	#include <mach/regs-clock.h>
2261e0e6	29	#include <mach/regs-irq.h>
56b34426	30	#include <asm/irq.h>
2261e0e6	31
6419711a	32	#include <plat/pm.h>
431fb7df	33	#include <mach/pm-core.h>
6419711a BD	34
	35	/* for external use */
	36
	37	unsigned long s3c_pm_flags;
	38
2261e0e6 BD	39	/* Debug code:
	40	*
	41	* This code supports debug output to the low level UARTs for use on
	42	* resume before the console layer is available.
	43	*/
	44
8005745d	45	#ifdef CONFIG_SAMSUNG_PM_DEBUG
6419711a BD	46	extern void printascii(const char *);
	47
	48	void s3c_pm_dbg(const char *fmt, ...)
	49	{
	50	va_list va;
	51	char buff[256];
	52
	53	va_start(va, fmt);
8baaa265	54	vsnprintf(buff, sizeof(buff), fmt, va);
6419711a BD	55	va_end(va);
	56
	57	printascii(buff);
	58	}
2261e0e6 BD	59
	60	static inline void s3c_pm_debug_init(void)
	61	{
	62	/* restart uart clocks so we can use them to output */
	63	s3c_pm_debug_init_uart();
	64	}
	65
	66	#else
	67	#define s3c_pm_debug_init() do { } while(0)
	68
8005745d	69	#endif /* CONFIG_SAMSUNG_PM_DEBUG */
6419711a	70
2261e0e6 BD	71	/* Save the UART configurations if we are configured for debug. */
2261e0e6 BD	72
4b637dc2 BD	73	unsigned char pm_uart_udivslot;
4b637dc2 BD	74
8005745d	75	#ifdef CONFIG_SAMSUNG_PM_DEBUG
2261e0e6	76
c0401241	77	static struct pm_uart_save uart_save[CONFIG_SERIAL_SAMSUNG_UARTS];
d2b07fe2 BD	78
	79	static void s3c_pm_save_uart(unsigned int uart, struct pm_uart_save *save)
	80	{
	81	void __iomem *regs = S3C_VA_UARTx(uart);
	82
	83	save->ulcon = __raw_readl(regs + S3C2410_ULCON);
	84	save->ucon = __raw_readl(regs + S3C2410_UCON);
	85	save->ufcon = __raw_readl(regs + S3C2410_UFCON);
	86	save->umcon = __raw_readl(regs + S3C2410_UMCON);
	87	save->ubrdiv = __raw_readl(regs + S3C2410_UBRDIV);
57699e9a	88
4b637dc2 BD	89	if (pm_uart_udivslot)
	90	save->udivslot = __raw_readl(regs + S3C2443_DIVSLOT);
	91
57699e9a BD	92	S3C_PMDBG("UART[%d]: ULCON=%04x, UCON=%04x, UFCON=%04x, UBRDIV=%04x\n",
57699e9a BD	93	uart, save->ulcon, save->ucon, save->ufcon, save->ubrdiv);
d2b07fe2	94	}
2261e0e6	95
d2b07fe2	96	static void s3c_pm_save_uarts(void)
2261e0e6	97	{
d2b07fe2 BD	98	struct pm_uart_save *save = uart_save;
	99	unsigned int uart;
	100
	101	for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
	102	s3c_pm_save_uart(uart, save);
	103	}
	104
	105	static void s3c_pm_restore_uart(unsigned int uart, struct pm_uart_save *save)
	106	{
	107	void __iomem *regs = S3C_VA_UARTx(uart);
	108
57699e9a BD	109	s3c_pm_arch_update_uart(regs, save);
57699e9a BD	110
d2b07fe2 BD	111	__raw_writel(save->ulcon, regs + S3C2410_ULCON);
	112	__raw_writel(save->ucon, regs + S3C2410_UCON);
	113	__raw_writel(save->ufcon, regs + S3C2410_UFCON);
	114	__raw_writel(save->umcon, regs + S3C2410_UMCON);
	115	__raw_writel(save->ubrdiv, regs + S3C2410_UBRDIV);
4b637dc2 BD	116
	117	if (pm_uart_udivslot)
	118	__raw_writel(save->udivslot, regs + S3C2443_DIVSLOT);
2261e0e6 BD	119	}
2261e0e6 BD	120
d2b07fe2	121	static void s3c_pm_restore_uarts(void)
2261e0e6	122	{
d2b07fe2 BD	123	struct pm_uart_save *save = uart_save;
	124	unsigned int uart;
	125
	126	for (uart = 0; uart < CONFIG_SERIAL_SAMSUNG_UARTS; uart++, save++)
	127	s3c_pm_restore_uart(uart, save);
2261e0e6 BD	128	}
2261e0e6 BD	129	#else
d2b07fe2 BD	130	static void s3c_pm_save_uarts(void) { }
d2b07fe2 BD	131	static void s3c_pm_restore_uarts(void) { }
2261e0e6 BD	132	#endif
2261e0e6 BD	133
56b34426 BD	134	/* The IRQ ext-int code goes here, it is too small to currently bother
	135	* with its own file. */
	136
	137	unsigned long s3c_irqwake_intmask = 0xffffffffL;
	138	unsigned long s3c_irqwake_eintmask = 0xffffffffL;
	139
f5aeffb7	140	int s3c_irqext_wake(struct irq_data *data, unsigned int state)
56b34426	141	{
f5aeffb7	142	unsigned long bit = 1L << IRQ_EINT_BIT(data->irq);
56b34426 BD	143
	144	if (!(s3c_irqwake_eintallow & bit))
	145	return -ENOENT;
	146
	147	printk(KERN_INFO "wake %s for irq %d\n",
f5aeffb7	148	state ? "enabled" : "disabled", data->irq);
56b34426 BD	149
	150	if (!state)
	151	s3c_irqwake_eintmask \|= bit;
	152	else
	153	s3c_irqwake_eintmask &= ~bit;
	154
	155	return 0;
	156	}
6419711a BD	157
	158	/* helper functions to save and restore register state */
	159
	160	/**
	161	* s3c_pm_do_save() - save a set of registers for restoration on resume.
	162	* @ptr: Pointer to an array of registers.
	163	* @count: Size of the ptr array.
	164	*
	165	* Run through the list of registers given, saving their contents in the
	166	* array for later restoration when we wakeup.
	167	*/
	168	void s3c_pm_do_save(struct sleep_save *ptr, int count)
	169	{
	170	for (; count > 0; count--, ptr++) {
	171	ptr->val = __raw_readl(ptr->reg);
	172	S3C_PMDBG("saved %p value %08lx\n", ptr->reg, ptr->val);
	173	}
	174	}
	175
	176	/**
	177	* s3c_pm_do_restore() - restore register values from the save list.
	178	* @ptr: Pointer to an array of registers.
	179	* @count: Size of the ptr array.
	180	*
	181	* Restore the register values saved from s3c_pm_do_save().
	182	*
	183	* Note, we do not use S3C_PMDBG() in here, as the system may not have
	184	* restore the UARTs state yet
	185	*/
	186
	187	void s3c_pm_do_restore(struct sleep_save *ptr, int count)
	188	{
	189	for (; count > 0; count--, ptr++) {
	190	printk(KERN_DEBUG "restore %p (restore %08lx, was %08x)\n",
	191	ptr->reg, ptr->val, __raw_readl(ptr->reg));
	192
	193	__raw_writel(ptr->val, ptr->reg);
	194	}
	195	}
	196
	197	/**
	198	* s3c_pm_do_restore_core() - early restore register values from save list.
	199	*
	200	* This is similar to s3c_pm_do_restore() except we try and minimise the
	201	* side effects of the function in case registers that hardware might need
	202	* to work has been restored.
	203	*
	204	* WARNING: Do not put any debug in here that may effect memory or use
	205	* peripherals, as things may be changing!
	206	*/
	207
	208	void s3c_pm_do_restore_core(struct sleep_save *ptr, int count)
	209	{
	210	for (; count > 0; count--, ptr++)
	211	__raw_writel(ptr->val, ptr->reg);
	212	}
2261e0e6 BD	213
	214	/* s3c2410_pm_show_resume_irqs
	215	*
	216	* print any IRQs asserted at resume time (ie, we woke from)
	217	*/
baab7307 MC	218	static void __maybe_unused s3c_pm_show_resume_irqs(int start,
	219	unsigned long which,
	220	unsigned long mask)
2261e0e6 BD	221	{
	222	int i;
	223
	224	which &= ~mask;
	225
	226	for (i = 0; i <= 31; i++) {
	227	if (which & (1L<<i)) {
	228	S3C_PMDBG("IRQ %d asserted at resume\n", start+i);
	229	}
	230	}
	231	}
	232
	233
	234	void (*pm_cpu_prep)(void);
29cb3cd2	235	int (*pm_cpu_sleep)(unsigned long);
2261e0e6 BD	236
	237	#define any_allowed(mask, allow) (((mask) & (allow)) != (allow))
	238
	239	/* s3c_pm_enter
	240	*
	241	* central control for sleep/resume process
	242	*/
	243
	244	static int s3c_pm_enter(suspend_state_t state)
	245	{
d3fcacf5	246	int ret;
2261e0e6 BD	247	/* ensure the debug is initialised (if enabled) */
	248
	249	s3c_pm_debug_init();
	250
	251	S3C_PMDBG("%s(%d)\n", __func__, state);
	252
	253	if (pm_cpu_prep == NULL \|\| pm_cpu_sleep == NULL) {
	254	printk(KERN_ERR "%s: error: no cpu sleep function\n", __func__);
	255	return -EINVAL;
	256	}
	257
	258	/* check if we have anything to wake-up with... bad things seem
	259	* to happen if you suspend with no wakeup (system will often
	260	* require a full power-cycle)
	261	*/
	262
	263	if (!any_allowed(s3c_irqwake_intmask, s3c_irqwake_intallow) &&
	264	!any_allowed(s3c_irqwake_eintmask, s3c_irqwake_eintallow)) {
	265	printk(KERN_ERR "%s: No wake-up sources!\n", __func__);
	266	printk(KERN_ERR "%s: Aborting sleep\n", __func__);
	267	return -EINVAL;
	268	}
	269
2261e0e6 BD	270	/* save all necessary core registers not covered by the drivers */
2261e0e6 BD	271
782d8a3c KK	272	samsung_pm_save_gpios();
782d8a3c KK	273	samsung_pm_saved_gpios();
d2b07fe2	274	s3c_pm_save_uarts();
2261e0e6 BD	275	s3c_pm_save_core();
	276
	277	/* set the irq configuration for wake */
	278
	279	s3c_pm_configure_extint();
	280
	281	S3C_PMDBG("sleep: irq wakeup masks: %08lx,%08lx\n",
	282	s3c_irqwake_intmask, s3c_irqwake_eintmask);
	283
	284	s3c_pm_arch_prepare_irqs();
	285
	286	/* call cpu specific preparation */
	287
	288	pm_cpu_prep();
	289
	290	/* flush cache back to ram */
	291
	292	flush_cache_all();
	293
	294	s3c_pm_check_store();
	295
	296	/* send the cpu to sleep... */
	297
	298	s3c_pm_arch_stop_clocks();
	299
e7089da9	300	/* this will also act as our return point from when
fff94cd9 BD	301	* we resume as it saves its own register state and restores it
fff94cd9 BD	302	* during the resume. */
2261e0e6	303
d3fcacf5 AK	304	ret = cpu_suspend(0, pm_cpu_sleep);
	305	if (ret)
	306	return ret;
2261e0e6	307
2261e0e6 BD	308	/* restore the system state */
	309
	310	s3c_pm_restore_core();
d2b07fe2	311	s3c_pm_restore_uarts();
782d8a3c	312	samsung_pm_restore_gpios();
1bac282a	313	s3c_pm_restored_gpios();
2261e0e6 BD	314
	315	s3c_pm_debug_init();
	316
	317	/* check what irq (if any) restored the system */
	318
	319	s3c_pm_arch_show_resume_irqs();
	320
	321	S3C_PMDBG("%s: post sleep, preparing to return\n", __func__);
	322
bd117bd1 BD	323	/* LEDs should now be 1110 */
	324	s3c_pm_debug_smdkled(1 << 1, 0);
	325
2261e0e6 BD	326	s3c_pm_check_restore();
	327
	328	/* ok, let's return from sleep */
	329
	330	S3C_PMDBG("S3C PM Resume (post-restore)\n");
	331	return 0;
	332	}
	333
aa8aba69 BD	334	static int s3c_pm_prepare(void)
	335	{
	336	/* prepare check area if configured */
	337
	338	s3c_pm_check_prepare();
	339	return 0;
	340	}
	341
	342	static void s3c_pm_finish(void)
	343	{
	344	s3c_pm_check_cleanup();
	345	}
	346
2f55ac07	347	static const struct platform_suspend_ops s3c_pm_ops = {
2261e0e6	348	.enter = s3c_pm_enter,
aa8aba69 BD	349	.prepare = s3c_pm_prepare,
aa8aba69 BD	350	.finish = s3c_pm_finish,
2261e0e6 BD	351	.valid = suspend_valid_only_mem,
	352	};
	353
4e59c25d	354	/* s3c_pm_init
2261e0e6 BD	355	*
	356	* Attach the power management functions. This should be called
	357	* from the board specific initialisation if the board supports
	358	* it.
	359	*/
	360
4e59c25d	361	int __init s3c_pm_init(void)
2261e0e6 BD	362	{
	363	printk("S3C Power Management, Copyright 2004 Simtec Electronics\n");
	364
	365	suspend_set_ops(&s3c_pm_ops);
	366	return 0;
	367	}