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e90a0f3c | 1 | /* linux/arch/arm/plat-samsung/include/plat/sysmmu.h |
b34f003f KC |
2 | * |
3 | * Copyright (c) 2010-2011 Samsung Electronics Co., Ltd. | |
4 | * http://www.samsung.com | |
5 | * | |
6 | * Samsung System MMU driver for S5P platform | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
e90a0f3c KK |
13 | #ifndef __PLAT_SAMSUNG_SYSMMU_H |
14 | #define __PLAT_SAMSUNG_SYSMMU_H __FILE__ | |
b34f003f KC |
15 | |
16 | enum S5P_SYSMMU_INTERRUPT_TYPE { | |
17 | SYSMMU_PAGEFAULT, | |
18 | SYSMMU_AR_MULTIHIT, | |
19 | SYSMMU_AW_MULTIHIT, | |
20 | SYSMMU_BUSERROR, | |
21 | SYSMMU_AR_SECURITY, | |
22 | SYSMMU_AR_ACCESS, | |
23 | SYSMMU_AW_SECURITY, | |
24 | SYSMMU_AW_PROTECTION, /* 7 */ | |
25 | SYSMMU_FAULTS_NUM | |
26 | }; | |
27 | ||
28 | #ifdef CONFIG_S5P_SYSTEM_MMU | |
29 | ||
30 | #include <mach/sysmmu.h> | |
31 | ||
32 | /** | |
33 | * s5p_sysmmu_enable() - enable system mmu of ip | |
34 | * @ips: The ip connected system mmu. | |
35 | * #pgd: Base physical address of the 1st level page table | |
36 | * | |
37 | * This function enable system mmu to transfer address | |
38 | * from virtual address to physical address | |
39 | */ | |
40 | void s5p_sysmmu_enable(sysmmu_ips ips, unsigned long pgd); | |
41 | ||
42 | /** | |
43 | * s5p_sysmmu_disable() - disable sysmmu mmu of ip | |
44 | * @ips: The ip connected system mmu. | |
45 | * | |
46 | * This function disable system mmu to transfer address | |
47 | * from virtual address to physical address | |
48 | */ | |
49 | void s5p_sysmmu_disable(sysmmu_ips ips); | |
50 | ||
51 | /** | |
52 | * s5p_sysmmu_set_tablebase_pgd() - set page table base address to refer page table | |
53 | * @ips: The ip connected system mmu. | |
54 | * @pgd: The page table base address. | |
55 | * | |
56 | * This function set page table base address | |
57 | * When system mmu transfer address from virtaul address to physical address, | |
58 | * system mmu refer address information from page table | |
59 | */ | |
60 | void s5p_sysmmu_set_tablebase_pgd(sysmmu_ips ips, unsigned long pgd); | |
61 | ||
62 | /** | |
63 | * s5p_sysmmu_tlb_invalidate() - flush all TLB entry in system mmu | |
64 | * @ips: The ip connected system mmu. | |
65 | * | |
66 | * This function flush all TLB entry in system mmu | |
67 | */ | |
68 | void s5p_sysmmu_tlb_invalidate(sysmmu_ips ips); | |
69 | ||
70 | /** s5p_sysmmu_set_fault_handler() - Fault handler for System MMUs | |
71 | * @itype: type of fault. | |
72 | * @pgtable_base: the physical address of page table base. This is 0 if @ips is | |
73 | * SYSMMU_BUSERROR. | |
74 | * @fault_addr: the device (virtual) address that the System MMU tried to | |
75 | * translated. This is 0 if @ips is SYSMMU_BUSERROR. | |
76 | * Called when interrupt occurred by the System MMUs | |
77 | * The device drivers of peripheral devices that has a System MMU can implement | |
78 | * a fault handler to resolve address translation fault by System MMU. | |
79 | * The meanings of return value and parameters are described below. | |
80 | ||
81 | * return value: non-zero if the fault is correctly resolved. | |
82 | * zero if the fault is not handled. | |
83 | */ | |
84 | void s5p_sysmmu_set_fault_handler(sysmmu_ips ips, | |
85 | int (*handler)(enum S5P_SYSMMU_INTERRUPT_TYPE itype, | |
86 | unsigned long pgtable_base, | |
87 | unsigned long fault_addr)); | |
88 | #else | |
89 | #define s5p_sysmmu_enable(ips, pgd) do { } while (0) | |
90 | #define s5p_sysmmu_disable(ips) do { } while (0) | |
91 | #define s5p_sysmmu_set_tablebase_pgd(ips, pgd) do { } while (0) | |
92 | #define s5p_sysmmu_tlb_invalidate(ips) do { } while (0) | |
93 | #define s5p_sysmmu_set_fault_handler(ips, handler) do { } while (0) | |
94 | #endif | |
95 | #endif /* __ASM_PLAT_SYSMMU_H */ |