ARM: SAMSUNG: move clock part for common s5p into plat-samsung
[linux-2.6-block.git] / arch / arm / plat-samsung / Kconfig
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1# arch/arm/plat-samsung/Kconfig
2#
3# Copyright 2009 Simtec Electronics
4#
5# Licensed under GPLv2
6
7config PLAT_SAMSUNG
8 bool
2d4a3b76 9 depends on PLAT_S3C24XX || ARCH_S3C64XX || PLAT_S5P
ae5fa355 10 select NO_IOPORT
878ccdc1 11 select GENERIC_IRQ_CHIP
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12 default y
13 help
14 Base platform code for all Samsung SoC based systems
15
16if PLAT_SAMSUNG
17
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18# boot configurations
19
20comment "Boot options"
21
22config S3C_BOOT_WATCHDOG
23 bool "S3C Initialisation watchdog"
24 depends on S3C2410_WATCHDOG
25 help
26 Say y to enable the watchdog during the kernel decompression
27 stage. If the kernel fails to uncompress, then the watchdog
28 will trigger a reset and the system should restart.
29
30config S3C_BOOT_ERROR_RESET
31 bool "S3C Reboot on decompression error"
32 help
33 Say y here to use the watchdog to reset the system if the
34 kernel decompressor detects an error during decompression.
35
36config S3C_BOOT_UART_FORCE_FIFO
37 bool "Force UART FIFO on during boot process"
38 default y
39 help
40 Say Y here to force the UART FIFOs on during the kernel
41 uncompressor
42
43
44config S3C_LOWLEVEL_UART_PORT
45 int "S3C UART to use for low-level messages"
46 default 0
47 help
48 Choice of which UART port to use for the low-level messages,
49 such as the `Uncompressing...` at start time. The value of
50 this configuration should be between zero and two. The port
51 must have been initialised by the boot-loader before use.
52
53# clock options
54
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55config SAMSUNG_CLKSRC
56 bool
57 help
58 Select the clock code for the clksrc implementation
59 used by newer systems such as the S3C64XX.
cf383678 60
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61config S5P_CLOCK
62 def_bool (ARCH_S5P64X0 || ARCH_S5PC100 || ARCH_S5PV210 || ARCH_EXYNOS)
63 help
64 Support common clock part for ARCH_S5P and ARCH_EXYNOS SoCs
65
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66# options for IRQ support
67
68config SAMSUNG_IRQ_VIC_TIMER
69 bool
70 help
71 Internal configuration to build the VIC timer interrupt code.
72
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73# options for gpio configuration support
74
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75config SAMSUNG_GPIOLIB_4BIT
76 bool
77 help
78 GPIOlib file contains the 4 bit modification functions for gpio
79 configuration. GPIOlib shall be compiled only for S3C64XX and S5P
80 series of processors.
81
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82config S3C_GPIO_CFG_S3C64XX
83 bool
84 help
85 Internal configuration to enable S3C64XX style GPIO configuration
86 functions.
87
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88config S5P_GPIO_DRVSTR
89 bool
90 help
91 Internal configuration to get and set correct GPIO driver strength
92 helper
93
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94config SAMSUNG_GPIO_EXTRA
95 int "Number of additional GPIO pins"
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96 default 128 if SAMSUNG_GPIO_EXTRA128
97 default 64 if SAMSUNG_GPIO_EXTRA64
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98 default 0
99 help
100 Use additional GPIO space in addition to the GPIO's the SOC
101 provides. This allows expanding the GPIO space for use with
102 GPIO expanders.
103
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104config SAMSUNG_GPIO_EXTRA64
105 bool
106
107config SAMSUNG_GPIO_EXTRA128
108 bool
109
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110config S3C_GPIO_SPACE
111 int "Space between gpio banks"
112 default 0
113 help
114 Add a number of spare GPIO entries between each bank for debugging
115 purposes. This allows any problems where an counter overflows from
116 one bank to another to be caught, at the expense of using a little
117 more memory.
118
119config S3C_GPIO_TRACK
120 bool
121 help
122 Internal configuration option to enable the s3c specific gpio
123 chip tracking if the platform requires it.
124
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125# ADC driver
126
127config S3C_ADC
128 bool "ADC common driver support"
129 help
130 Core support for the ADC block found in the Samsung SoC systems
131 for drivers such as the touchscreen and hwmon to use to share
132 this resource.
133
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134# device definitions to compile in
135
136config S3C_DEV_HSMMC
137 bool
138 help
139 Compile in platform device definitions for HSMMC code
140
141config S3C_DEV_HSMMC1
142 bool
143 help
144 Compile in platform device definitions for HSMMC channel 1
145
146config S3C_DEV_HSMMC2
147 bool
148 help
149 Compile in platform device definitions for HSMMC channel 2
150
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151config S3C_DEV_HSMMC3
152 bool
153 help
154 Compile in platform device definitions for HSMMC channel 3
155
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156config S3C_DEV_HWMON
157 bool
158 help
159 Compile in platform device definitions for HWMON
160
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161config S3C_DEV_I2C1
162 bool
163 help
164 Compile in platform device definitions for I2C channel 1
165
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166config S3C_DEV_I2C2
167 bool
168 help
169 Compile in platform device definitions for I2C channel 2
170
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171config S3C_DEV_I2C3
172 bool
173 help
174 Compile in platform device definition for I2C controller 3
175
176config S3C_DEV_I2C4
177 bool
178 help
179 Compile in platform device definition for I2C controller 4
180
181config S3C_DEV_I2C5
182 bool
183 help
184 Compile in platform device definition for I2C controller 5
185
186config S3C_DEV_I2C6
187 bool
188 help
189 Compile in platform device definition for I2C controller 6
190
191config S3C_DEV_I2C7
192 bool
193 help
194 Compile in platform device definition for I2C controller 7
195
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196config S3C_DEV_FB
197 bool
198 help
199 Compile in platform device definition for framebuffer
200
201config S3C_DEV_USB_HOST
202 bool
203 help
204 Compile in platform device definition for USB host.
205
206config S3C_DEV_USB_HSOTG
207 bool
208 help
209 Compile in platform device definition for USB high-speed OtG
210
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211config S3C_DEV_WDT
212 bool
b130d5c2 213 default y if ARCH_S3C24XX
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214 help
215 Complie in platform device definition for Watchdog Timer
216
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217config S3C_DEV_NAND
218 bool
219 help
220 Compile in platform device definition for NAND controller
221
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222config S3C_DEV_ONENAND
223 bool
224 help
225 Compile in platform device definition for OneNAND controller
226
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227config S3C_DEV_RTC
228 bool
229 help
230 Complie in platform device definition for RTC
231
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232config SAMSUNG_DEV_ADC
233 bool
234 help
235 Compile in platform device definition for ADC controller
236
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237config SAMSUNG_DEV_IDE
238 bool
239 help
240 Compile in platform device definitions for IDE
241
875a5937 242config S3C64XX_DEV_SPI0
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243 bool
244 help
245 Compile in platform device definitions for S3C64XX's type
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246 SPI controller 0
247
248config S3C64XX_DEV_SPI1
249 bool
250 help
251 Compile in platform device definitions for S3C64XX's type
252 SPI controller 1
253
254config S3C64XX_DEV_SPI2
255 bool
256 help
257 Compile in platform device definitions for S3C64XX's type
258 SPI controller 2
4b4c6625 259
2b6c02ab 260config SAMSUNG_DEV_TS
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261 bool
262 help
2b6c02ab 263 Common in platform device definitions for touchscreen device
909de0d6 264
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265config SAMSUNG_DEV_KEYPAD
266 bool
267 help
268 Compile in platform device definitions for keypad
269
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270config SAMSUNG_DEV_PWM
271 bool
b130d5c2 272 default y if ARCH_S3C24XX
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273 help
274 Compile in platform device definition for PWM Timer
275
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276config SAMSUNG_DEV_BACKLIGHT
277 bool
278 depends on SAMSUNG_DEV_PWM
279 help
280 Compile in platform device definition LCD backlight with PWM Timer
281
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282config S3C24XX_PWM
283 bool "PWM device support"
284 select HAVE_PWM
285 help
286 Support for exporting the PWM timer blocks via the pwm device
287 system
288
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289# DMA
290
291config S3C_DMA
292 bool
293 help
294 Internal configuration for S3C DMA core
295
aa0de00e 296config SAMSUNG_DMADEV
d800edeb 297 bool
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298 select DMADEVICES
299 select PL330_DMA if (CPU_EXYNOS4210 || CPU_S5PV210 || CPU_S5PC100 || \
300 CPU_S5P6450 || CPU_S5P6440)
301 select ARM_AMBA
d800edeb 302 help
aa0de00e 303 Use DMA device engine for PL330 DMAC.
d800edeb 304
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305comment "Power management"
306
307config SAMSUNG_PM_DEBUG
308 bool "S3C2410 PM Suspend debug"
309 depends on PM
310 help
311 Say Y here if you want verbose debugging from the PM Suspend and
312 Resume code. See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
313 for more information.
314
315config S3C_PM_DEBUG_LED_SMDK
316 bool "SMDK LED suspend/resume debugging"
317 depends on PM && (MACH_SMDK6410)
318 help
319 Say Y here to enable the use of the SMDK LEDs on the baseboard
320 for debugging of the state of the suspend and resume process.
321
322 Note, this currently only works for S3C64XX based SMDK boards.
323
324config SAMSUNG_PM_CHECK
325 bool "S3C2410 PM Suspend Memory CRC"
326 depends on PM && CRC32
327 help
328 Enable the PM code's memory area checksum over sleep. This option
329 will generate CRCs of all blocks of memory, and store them before
330 going to sleep. The blocks are then checked on resume for any
331 errors.
332
333 Note, this can take several seconds depending on memory size
334 and CPU speed.
335
336 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
337
338config SAMSUNG_PM_CHECK_CHUNKSIZE
339 int "S3C2410 PM Suspend CRC Chunksize (KiB)"
340 depends on PM && SAMSUNG_PM_CHECK
341 default 64
342 help
343 Set the chunksize in Kilobytes of the CRC for checking memory
344 corruption over suspend and resume. A smaller value will mean that
345 the CRC data block will take more memory, but wil identify any
346 faults with better precision.
347
348 See <file:Documentation/arm/Samsung-S3C24XX/Suspend.txt>
349
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350config SAMSUNG_WAKEMASK
351 bool
352 depends on PM
353 help
354 Compile support for wakeup-mask controls found on the S3C6400
355 and above. This code allows a set of interrupt to wakeup-mask
356 mappings. See <plat/wakeup-mask.h>
357
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358comment "Power Domain"
359
360config SAMSUNG_PD
361 bool "Samsung Power Domain"
362 depends on PM_RUNTIME
363 help
364 Say Y here if you want to control Power Domain by Runtime PM.
365
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366config DEBUG_S3C_UART
367 depends on PLAT_SAMSUNG
368 int
369 default "0" if DEBUG_S3C_UART0
370 default "1" if DEBUG_S3C_UART1
371 default "2" if DEBUG_S3C_UART2
372
cf383678 373endif