[linux-2.6-block.git] / arch / arm / plat-s3c64xx / dev-audio.c

/* linux/arch/arm/plat-s3c/dev-audio.c
 *
 * Copyright 2009 Wolfson Microelectronics
 *      Mark Brown <broonie@opensource.wolfsonmicro.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/platform_device.h>

#include <mach/irqs.h>
#include <mach/map.h>
#include <mach/dma.h>
#include <mach/gpio.h>

#include <plat/devs.h>
#include <plat/audio.h>
#include <plat/gpio-bank-c.h>
#include <plat/gpio-bank-d.h>
#include <plat/gpio-bank-e.h>
#include <plat/gpio-bank-h.h>
#include <plat/gpio-cfg.h>

static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)
{
	switch (pdev->id) {
	case 0:
		s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK);
		s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK);
		s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK);
		s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI);
		s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0);
		break;
	case 1:
		s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK);
		s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK);
		s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK);
		s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI);
		s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0);
	default:
		printk(KERN_DEBUG "Invalid I2S Controller number!");
		return -EINVAL;
	}

	return 0;
}

static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev)
{
	s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_I2S_V40_DO0);
	s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_I2S_V40_DO1);
	s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C64XX_GPC7_I2S_V40_DO2);
	s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C64XX_GPH6_I2S_V40_BCLK);
	s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C64XX_GPH7_I2S_V40_CDCLK);
	s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C64XX_GPH8_I2S_V40_LRCLK);
	s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C64XX_GPH9_I2S_V40_DI);

	return 0;
}

static struct resource s3c64xx_iis0_resource[] = {
	[0] = {
		.start = S3C64XX_PA_IIS0,
		.end   = S3C64XX_PA_IIS0 + 0x100 - 1,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = DMACH_I2S0_OUT,
		.end   = DMACH_I2S0_OUT,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = DMACH_I2S0_IN,
		.end   = DMACH_I2S0_IN,
		.flags = IORESOURCE_DMA,
	},
};

struct s3c_audio_pdata s3c_i2s0_pdata = {
	.cfg_gpio = s3c64xx_i2sv3_cfg_gpio,
};

struct platform_device s3c64xx_device_iis0 = {
	.name		  = "s3c64xx-iis",
	.id		  = 0,
	.num_resources	  = ARRAY_SIZE(s3c64xx_iis0_resource),
	.resource	  = s3c64xx_iis0_resource,
	.dev = {
		.platform_data = &s3c_i2s0_pdata,
	},
};
EXPORT_SYMBOL(s3c64xx_device_iis0);

static struct resource s3c64xx_iis1_resource[] = {
	[0] = {
		.start = S3C64XX_PA_IIS1,
		.end   = S3C64XX_PA_IIS1 + 0x100 - 1,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = DMACH_I2S1_OUT,
		.end   = DMACH_I2S1_OUT,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = DMACH_I2S1_IN,
		.end   = DMACH_I2S1_IN,
		.flags = IORESOURCE_DMA,
	},
};

struct s3c_audio_pdata s3c_i2s1_pdata = {
	.cfg_gpio = s3c64xx_i2sv3_cfg_gpio,
};

struct platform_device s3c64xx_device_iis1 = {
	.name		  = "s3c64xx-iis",
	.id		  = 1,
	.num_resources	  = ARRAY_SIZE(s3c64xx_iis1_resource),
	.resource	  = s3c64xx_iis1_resource,
	.dev = {
		.platform_data = &s3c_i2s1_pdata,
	},
};
EXPORT_SYMBOL(s3c64xx_device_iis1);

static struct resource s3c64xx_iisv4_resource[] = {
	[0] = {
		.start = S3C64XX_PA_IISV4,
		.end   = S3C64XX_PA_IISV4 + 0x100 - 1,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = DMACH_HSI_I2SV40_TX,
		.end   = DMACH_HSI_I2SV40_TX,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = DMACH_HSI_I2SV40_RX,
		.end   = DMACH_HSI_I2SV40_RX,
		.flags = IORESOURCE_DMA,
	},
};

struct s3c_audio_pdata s3c_i2sv4_pdata = {
	.cfg_gpio = s3c64xx_i2sv4_cfg_gpio,
};

struct platform_device s3c64xx_device_iisv4 = {
	.name		  = "s3c64xx-iis-v4",
	.id		  = -1,
	.num_resources	  = ARRAY_SIZE(s3c64xx_iisv4_resource),
	.resource	  = s3c64xx_iisv4_resource,
	.dev = {
		.platform_data = &s3c_i2sv4_pdata,
	},
};
EXPORT_SYMBOL(s3c64xx_device_iisv4);


/* PCM Controller platform_devices */

static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
{
	switch (pdev->id) {
	case 0:
		s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK);
		s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK);
		s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC);
		s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN);
		s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT);
		break;
	case 1:
		s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK);
		s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK);
		s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC);
		s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN);
		s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT);
		break;
	default:
		printk(KERN_DEBUG "Invalid PCM Controller number!");
		return -EINVAL;
	}

	return 0;
}

static struct resource s3c64xx_pcm0_resource[] = {
	[0] = {
		.start = S3C64XX_PA_PCM0,
		.end   = S3C64XX_PA_PCM0 + 0x100 - 1,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = DMACH_PCM0_TX,
		.end   = DMACH_PCM0_TX,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = DMACH_PCM0_RX,
		.end   = DMACH_PCM0_RX,
		.flags = IORESOURCE_DMA,
	},
};

static struct s3c_audio_pdata s3c_pcm0_pdata = {
	.cfg_gpio = s3c64xx_pcm_cfg_gpio,
};

struct platform_device s3c64xx_device_pcm0 = {
	.name		  = "samsung-pcm",
	.id		  = 0,
	.num_resources	  = ARRAY_SIZE(s3c64xx_pcm0_resource),
	.resource	  = s3c64xx_pcm0_resource,
	.dev = {
		.platform_data = &s3c_pcm0_pdata,
	},
};
EXPORT_SYMBOL(s3c64xx_device_pcm0);

static struct resource s3c64xx_pcm1_resource[] = {
	[0] = {
		.start = S3C64XX_PA_PCM1,
		.end   = S3C64XX_PA_PCM1 + 0x100 - 1,
		.flags = IORESOURCE_MEM,
	},
	[1] = {
		.start = DMACH_PCM1_TX,
		.end   = DMACH_PCM1_TX,
		.flags = IORESOURCE_DMA,
	},
	[2] = {
		.start = DMACH_PCM1_RX,
		.end   = DMACH_PCM1_RX,
		.flags = IORESOURCE_DMA,
	},
};

static struct s3c_audio_pdata s3c_pcm1_pdata = {
	.cfg_gpio = s3c64xx_pcm_cfg_gpio,
};

struct platform_device s3c64xx_device_pcm1 = {
	.name		  = "samsung-pcm",
	.id		  = 1,
	.num_resources	  = ARRAY_SIZE(s3c64xx_pcm1_resource),
	.resource	  = s3c64xx_pcm1_resource,
	.dev = {
		.platform_data = &s3c_pcm1_pdata,
	},
};
EXPORT_SYMBOL(s3c64xx_device_pcm1);
Commit	Line	Data
52da219e MB	1	/* linux/arch/arm/plat-s3c/dev-audio.c
	2	*
	3	* Copyright 2009 Wolfson Microelectronics
	4	* Mark Brown <broonie@opensource.wolfsonmicro.com>
	5	*
52da219e MB	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10
	11	#include <linux/kernel.h>
	12	#include <linux/string.h>
	13	#include <linux/platform_device.h>
	14
	15	#include <mach/irqs.h>
	16	#include <mach/map.h>
acf1aef9 JB	17	#include <mach/dma.h>
acf1aef9 JB	18	#include <mach/gpio.h>
52da219e MB	19
52da219e MB	20	#include <plat/devs.h>
acf1aef9	21	#include <plat/audio.h>
71269364	22	#include <plat/gpio-bank-c.h>
acf1aef9 JB	23	#include <plat/gpio-bank-d.h>
acf1aef9 JB	24	#include <plat/gpio-bank-e.h>
71269364	25	#include <plat/gpio-bank-h.h>
acf1aef9	26	#include <plat/gpio-cfg.h>
52da219e	27
71269364 JB	28	static int s3c64xx_i2sv3_cfg_gpio(struct platform_device *pdev)
	29	{
	30	switch (pdev->id) {
	31	case 0:
	32	s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_I2S0_CLK);
	33	s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_I2S0_CDCLK);
	34	s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_I2S0_LRCLK);
	35	s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_I2S0_DI);
	36	s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_I2S0_D0);
	37	break;
	38	case 1:
	39	s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_I2S1_CLK);
	40	s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_I2S1_CDCLK);
	41	s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_I2S1_LRCLK);
	42	s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_I2S1_DI);
	43	s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_I2S1_D0);
	44	default:
	45	printk(KERN_DEBUG "Invalid I2S Controller number!");
	46	return -EINVAL;
	47	}
	48
	49	return 0;
	50	}
	51
	52	static int s3c64xx_i2sv4_cfg_gpio(struct platform_device *pdev)
	53	{
1c24522c MB	54	s3c_gpio_cfgpin(S3C64XX_GPC(4), S3C64XX_GPC4_I2S_V40_DO0);
	55	s3c_gpio_cfgpin(S3C64XX_GPC(5), S3C64XX_GPC5_I2S_V40_DO1);
	56	s3c_gpio_cfgpin(S3C64XX_GPC(7), S3C64XX_GPC7_I2S_V40_DO2);
71269364 JB	57	s3c_gpio_cfgpin(S3C64XX_GPH(6), S3C64XX_GPH6_I2S_V40_BCLK);
	58	s3c_gpio_cfgpin(S3C64XX_GPH(7), S3C64XX_GPH7_I2S_V40_CDCLK);
	59	s3c_gpio_cfgpin(S3C64XX_GPH(8), S3C64XX_GPH8_I2S_V40_LRCLK);
	60	s3c_gpio_cfgpin(S3C64XX_GPH(9), S3C64XX_GPH9_I2S_V40_DI);
	61
	62	return 0;
	63	}
	64
52da219e MB	65	static struct resource s3c64xx_iis0_resource[] = {
	66	[0] = {
	67	.start = S3C64XX_PA_IIS0,
	68	.end = S3C64XX_PA_IIS0 + 0x100 - 1,
	69	.flags = IORESOURCE_MEM,
	70	},
71269364 JB	71	[1] = {
	72	.start = DMACH_I2S0_OUT,
	73	.end = DMACH_I2S0_OUT,
	74	.flags = IORESOURCE_DMA,
	75	},
	76	[2] = {
	77	.start = DMACH_I2S0_IN,
	78	.end = DMACH_I2S0_IN,
	79	.flags = IORESOURCE_DMA,
	80	},
	81	};
	82
	83	struct s3c_audio_pdata s3c_i2s0_pdata = {
	84	.cfg_gpio = s3c64xx_i2sv3_cfg_gpio,
52da219e MB	85	};
	86
	87	struct platform_device s3c64xx_device_iis0 = {
	88	.name = "s3c64xx-iis",
	89	.id = 0,
	90	.num_resources = ARRAY_SIZE(s3c64xx_iis0_resource),
	91	.resource = s3c64xx_iis0_resource,
71269364 JB	92	.dev = {
	93	.platform_data = &s3c_i2s0_pdata,
	94	},
52da219e MB	95	};
	96	EXPORT_SYMBOL(s3c64xx_device_iis0);
	97
	98	static struct resource s3c64xx_iis1_resource[] = {
	99	[0] = {
	100	.start = S3C64XX_PA_IIS1,
	101	.end = S3C64XX_PA_IIS1 + 0x100 - 1,
	102	.flags = IORESOURCE_MEM,
	103	},
71269364 JB	104	[1] = {
	105	.start = DMACH_I2S1_OUT,
	106	.end = DMACH_I2S1_OUT,
	107	.flags = IORESOURCE_DMA,
	108	},
	109	[2] = {
	110	.start = DMACH_I2S1_IN,
	111	.end = DMACH_I2S1_IN,
	112	.flags = IORESOURCE_DMA,
	113	},
	114	};
	115
	116	struct s3c_audio_pdata s3c_i2s1_pdata = {
	117	.cfg_gpio = s3c64xx_i2sv3_cfg_gpio,
52da219e MB	118	};
	119
	120	struct platform_device s3c64xx_device_iis1 = {
	121	.name = "s3c64xx-iis",
	122	.id = 1,
	123	.num_resources = ARRAY_SIZE(s3c64xx_iis1_resource),
	124	.resource = s3c64xx_iis1_resource,
71269364 JB	125	.dev = {
	126	.platform_data = &s3c_i2s1_pdata,
	127	},
52da219e MB	128	};
52da219e MB	129	EXPORT_SYMBOL(s3c64xx_device_iis1);
d06a49ee MB	130
	131	static struct resource s3c64xx_iisv4_resource[] = {
	132	[0] = {
	133	.start = S3C64XX_PA_IISV4,
	134	.end = S3C64XX_PA_IISV4 + 0x100 - 1,
	135	.flags = IORESOURCE_MEM,
	136	},
71269364 JB	137	[1] = {
	138	.start = DMACH_HSI_I2SV40_TX,
	139	.end = DMACH_HSI_I2SV40_TX,
	140	.flags = IORESOURCE_DMA,
	141	},
	142	[2] = {
	143	.start = DMACH_HSI_I2SV40_RX,
	144	.end = DMACH_HSI_I2SV40_RX,
	145	.flags = IORESOURCE_DMA,
	146	},
	147	};
	148
	149	struct s3c_audio_pdata s3c_i2sv4_pdata = {
	150	.cfg_gpio = s3c64xx_i2sv4_cfg_gpio,
d06a49ee MB	151	};
	152
	153	struct platform_device s3c64xx_device_iisv4 = {
	154	.name = "s3c64xx-iis-v4",
	155	.id = -1,
	156	.num_resources = ARRAY_SIZE(s3c64xx_iisv4_resource),
	157	.resource = s3c64xx_iisv4_resource,
71269364 JB	158	.dev = {
	159	.platform_data = &s3c_i2sv4_pdata,
	160	},
d06a49ee MB	161	};
d06a49ee MB	162	EXPORT_SYMBOL(s3c64xx_device_iisv4);
acf1aef9 JB	163
	164
	165	/* PCM Controller platform_devices */
	166
	167	static int s3c64xx_pcm_cfg_gpio(struct platform_device *pdev)
	168	{
	169	switch (pdev->id) {
	170	case 0:
	171	s3c_gpio_cfgpin(S3C64XX_GPD(0), S3C64XX_GPD0_PCM0_SCLK);
	172	s3c_gpio_cfgpin(S3C64XX_GPD(1), S3C64XX_GPD1_PCM0_EXTCLK);
	173	s3c_gpio_cfgpin(S3C64XX_GPD(2), S3C64XX_GPD2_PCM0_FSYNC);
	174	s3c_gpio_cfgpin(S3C64XX_GPD(3), S3C64XX_GPD3_PCM0_SIN);
	175	s3c_gpio_cfgpin(S3C64XX_GPD(4), S3C64XX_GPD4_PCM0_SOUT);
	176	break;
	177	case 1:
	178	s3c_gpio_cfgpin(S3C64XX_GPE(0), S3C64XX_GPE0_PCM1_SCLK);
	179	s3c_gpio_cfgpin(S3C64XX_GPE(1), S3C64XX_GPE1_PCM1_EXTCLK);
	180	s3c_gpio_cfgpin(S3C64XX_GPE(2), S3C64XX_GPE2_PCM1_FSYNC);
	181	s3c_gpio_cfgpin(S3C64XX_GPE(3), S3C64XX_GPE3_PCM1_SIN);
	182	s3c_gpio_cfgpin(S3C64XX_GPE(4), S3C64XX_GPE4_PCM1_SOUT);
	183	break;
	184	default:
	185	printk(KERN_DEBUG "Invalid PCM Controller number!");
	186	return -EINVAL;
	187	}
	188
	189	return 0;
	190	}
	191
	192	static struct resource s3c64xx_pcm0_resource[] = {
	193	[0] = {
	194	.start = S3C64XX_PA_PCM0,
	195	.end = S3C64XX_PA_PCM0 + 0x100 - 1,
	196	.flags = IORESOURCE_MEM,
	197	},
	198	[1] = {
	199	.start = DMACH_PCM0_TX,
	200	.end = DMACH_PCM0_TX,
	201	.flags = IORESOURCE_DMA,
	202	},
	203	[2] = {
	204	.start = DMACH_PCM0_RX,
	205	.end = DMACH_PCM0_RX,
	206	.flags = IORESOURCE_DMA,
	207	},
	208	};
	209
43f0de8d	210	static struct s3c_audio_pdata s3c_pcm0_pdata = {
acf1aef9 JB	211	.cfg_gpio = s3c64xx_pcm_cfg_gpio,
	212	};
	213
	214	struct platform_device s3c64xx_device_pcm0 = {
	215	.name = "samsung-pcm",
	216	.id = 0,
	217	.num_resources = ARRAY_SIZE(s3c64xx_pcm0_resource),
	218	.resource = s3c64xx_pcm0_resource,
	219	.dev = {
	220	.platform_data = &s3c_pcm0_pdata,
	221	},
	222	};
	223	EXPORT_SYMBOL(s3c64xx_device_pcm0);
	224
	225	static struct resource s3c64xx_pcm1_resource[] = {
	226	[0] = {
	227	.start = S3C64XX_PA_PCM1,
	228	.end = S3C64XX_PA_PCM1 + 0x100 - 1,
	229	.flags = IORESOURCE_MEM,
	230	},
	231	[1] = {
	232	.start = DMACH_PCM1_TX,
	233	.end = DMACH_PCM1_TX,
	234	.flags = IORESOURCE_DMA,
	235	},
	236	[2] = {
	237	.start = DMACH_PCM1_RX,
	238	.end = DMACH_PCM1_RX,
	239	.flags = IORESOURCE_DMA,
	240	},
	241	};
	242
43f0de8d	243	static struct s3c_audio_pdata s3c_pcm1_pdata = {
acf1aef9 JB	244	.cfg_gpio = s3c64xx_pcm_cfg_gpio,
	245	};
	246
	247	struct platform_device s3c64xx_device_pcm1 = {
	248	.name = "samsung-pcm",
	249	.id = 1,
	250	.num_resources = ARRAY_SIZE(s3c64xx_pcm1_resource),
	251	.resource = s3c64xx_pcm1_resource,
	252	.dev = {
	253	.platform_data = &s3c_pcm1_pdata,
	254	},
	255	};
	256	EXPORT_SYMBOL(s3c64xx_device_pcm1);