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a21765a7 | 1 | /* linux/arch/arm/plat-s3c24xx/s3c244x-irq.c |
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2 | * |
3 | * Copyright (c) 2003,2004 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * This program is free software; you can redistribute it and/or modify | |
7 | * it under the terms of the GNU General Public License as published by | |
8 | * the Free Software Foundation; either version 2 of the License, or | |
9 | * (at your option) any later version. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
19 | * | |
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20 | */ |
21 | ||
22 | #include <linux/init.h> | |
23 | #include <linux/module.h> | |
24 | #include <linux/interrupt.h> | |
25 | #include <linux/ioport.h> | |
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26 | #include <linux/sysdev.h> |
27 | ||
a09e64fb | 28 | #include <mach/hardware.h> |
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29 | #include <asm/irq.h> |
30 | #include <asm/io.h> | |
31 | ||
32 | #include <asm/mach/irq.h> | |
33 | ||
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34 | #include <mach/regs-irq.h> |
35 | #include <mach/regs-gpio.h> | |
96ce2385 | 36 | |
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37 | #include <plat/cpu.h> |
38 | #include <plat/pm.h> | |
39 | #include <plat/irq.h> | |
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40 | |
41 | /* camera irq */ | |
42 | ||
43 | static void s3c_irq_demux_cam(unsigned int irq, | |
10dd5ce2 | 44 | struct irq_desc *desc) |
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45 | { |
46 | unsigned int subsrc, submsk; | |
10dd5ce2 | 47 | struct irq_desc *mydesc; |
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48 | |
49 | /* read the current pending interrupts, and the mask | |
50 | * for what it is available */ | |
51 | ||
52 | subsrc = __raw_readl(S3C2410_SUBSRCPND); | |
53 | submsk = __raw_readl(S3C2410_INTSUBMSK); | |
54 | ||
55 | subsrc &= ~submsk; | |
56 | subsrc >>= 11; | |
57 | subsrc &= 3; | |
58 | ||
59 | if (subsrc != 0) { | |
60 | if (subsrc & 1) { | |
61 | mydesc = irq_desc + IRQ_S3C2440_CAM_C; | |
0cd61b68 | 62 | desc_handle_irq(IRQ_S3C2440_CAM_C, mydesc); |
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63 | } |
64 | if (subsrc & 2) { | |
65 | mydesc = irq_desc + IRQ_S3C2440_CAM_P; | |
0cd61b68 | 66 | desc_handle_irq(IRQ_S3C2440_CAM_P, mydesc); |
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67 | } |
68 | } | |
69 | } | |
70 | ||
71 | #define INTMSK_CAM (1UL << (IRQ_CAM - IRQ_EINT0)) | |
72 | ||
73 | static void | |
74 | s3c_irq_cam_mask(unsigned int irqno) | |
75 | { | |
76 | s3c_irqsub_mask(irqno, INTMSK_CAM, 3<<11); | |
77 | } | |
78 | ||
79 | static void | |
80 | s3c_irq_cam_unmask(unsigned int irqno) | |
81 | { | |
82 | s3c_irqsub_unmask(irqno, INTMSK_CAM); | |
83 | } | |
84 | ||
85 | static void | |
86 | s3c_irq_cam_ack(unsigned int irqno) | |
87 | { | |
88 | s3c_irqsub_maskack(irqno, INTMSK_CAM, 3<<11); | |
89 | } | |
90 | ||
10dd5ce2 | 91 | static struct irq_chip s3c_irq_cam = { |
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92 | .mask = s3c_irq_cam_mask, |
93 | .unmask = s3c_irq_cam_unmask, | |
94 | .ack = s3c_irq_cam_ack, | |
95 | }; | |
96 | ||
97 | static int s3c244x_irq_add(struct sys_device *sysdev) | |
98 | { | |
99 | unsigned int irqno; | |
100 | ||
101 | set_irq_chip(IRQ_NFCON, &s3c_irq_level_chip); | |
10dd5ce2 | 102 | set_irq_handler(IRQ_NFCON, handle_level_irq); |
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103 | set_irq_flags(IRQ_NFCON, IRQF_VALID); |
104 | ||
105 | /* add chained handler for camera */ | |
106 | ||
107 | set_irq_chip(IRQ_CAM, &s3c_irq_level_chip); | |
10dd5ce2 | 108 | set_irq_handler(IRQ_CAM, handle_level_irq); |
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109 | set_irq_chained_handler(IRQ_CAM, s3c_irq_demux_cam); |
110 | ||
111 | for (irqno = IRQ_S3C2440_CAM_C; irqno <= IRQ_S3C2440_CAM_P; irqno++) { | |
112 | set_irq_chip(irqno, &s3c_irq_cam); | |
10dd5ce2 | 113 | set_irq_handler(irqno, handle_level_irq); |
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114 | set_irq_flags(irqno, IRQF_VALID); |
115 | } | |
116 | ||
117 | return 0; | |
118 | } | |
119 | ||
189e74ee | 120 | static struct sysdev_driver s3c2440_irq_driver = { |
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121 | .add = s3c244x_irq_add, |
122 | .suspend = s3c24xx_irq_suspend, | |
123 | .resume = s3c24xx_irq_resume, | |
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124 | }; |
125 | ||
126 | static int s3c2440_irq_init(void) | |
127 | { | |
189e74ee | 128 | return sysdev_driver_register(&s3c2440_sysclass, &s3c2440_irq_driver); |
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129 | } |
130 | ||
131 | arch_initcall(s3c2440_irq_init); | |
132 | ||
189e74ee | 133 | static struct sysdev_driver s3c2442_irq_driver = { |
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134 | .add = s3c244x_irq_add, |
135 | .suspend = s3c24xx_irq_suspend, | |
136 | .resume = s3c24xx_irq_resume, | |
189e74ee | 137 | }; |
96ce2385 | 138 | |
1e582fc7 | 139 | |
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140 | static int s3c2442_irq_init(void) |
141 | { | |
189e74ee | 142 | return sysdev_driver_register(&s3c2442_sysclass, &s3c2442_irq_driver); |
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143 | } |
144 | ||
145 | arch_initcall(s3c2442_irq_init); |