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6fc601e3 BD |
1 | /* arch/arm/plat-s3c24xx/pwm.c |
2 | * | |
3 | * Copyright (c) 2007 Ben Dooks | |
4 | * Copyright (c) 2008 Simtec Electronics | |
5 | * Ben Dooks <ben@simtec.co.uk>, <ben-linux@fluff.org> | |
6 | * | |
7 | * S3C24XX PWM device core | |
8 | * | |
9 | * This program is free software; you can redistribute it and/or modify | |
10 | * it under the terms of the GNU General Public License as published by | |
11 | * the Free Software Foundation; either version 2 of the License. | |
12 | */ | |
13 | ||
14 | #include <linux/module.h> | |
15 | #include <linux/kernel.h> | |
16 | #include <linux/platform_device.h> | |
17 | #include <linux/err.h> | |
18 | #include <linux/clk.h> | |
19 | #include <linux/io.h> | |
20 | #include <linux/pwm.h> | |
21 | ||
10389592 | 22 | #include <asm/plat-s3c24xx/devs.h> |
6fc601e3 BD |
23 | #include <asm/plat-s3c/regs-timer.h> |
24 | ||
25 | struct pwm_device { | |
26 | struct list_head list; | |
27 | struct platform_device *pdev; | |
28 | ||
29 | struct clk *clk_div; | |
30 | struct clk *clk; | |
31 | const char *label; | |
32 | ||
33 | unsigned int period_ns; | |
34 | unsigned int duty_ns; | |
35 | ||
36 | unsigned char tcon_base; | |
37 | unsigned char running; | |
38 | unsigned char use_count; | |
39 | unsigned char pwm_id; | |
40 | }; | |
41 | ||
42 | #define pwm_dbg(_pwm, msg...) dev_info(&(_pwm)->pdev->dev, msg) | |
43 | ||
44 | static struct clk *clk_scaler[2]; | |
45 | ||
46 | /* Standard setup for a timer block. */ | |
47 | ||
48 | #define TIMER_RESOURCE_SIZE (1) | |
49 | ||
50 | #define TIMER_RESOURCE(_tmr, _irq) \ | |
51 | (struct resource [TIMER_RESOURCE_SIZE]) { \ | |
52 | [0] = { \ | |
53 | .start = _irq, \ | |
54 | .end = _irq, \ | |
55 | .flags = IORESOURCE_IRQ \ | |
56 | } \ | |
57 | } | |
58 | ||
59 | #define DEFINE_TIMER(_tmr_no, _irq) \ | |
60 | .name = "s3c24xx-pwm", \ | |
61 | .id = _tmr_no, \ | |
62 | .num_resources = TIMER_RESOURCE_SIZE, \ | |
63 | .resource = TIMER_RESOURCE(_tmr_no, _irq), \ | |
64 | ||
65 | /* since we already have an static mapping for the timer, we do not | |
66 | * bother setting any IO resource for the base. | |
67 | */ | |
68 | ||
69 | struct platform_device s3c_device_timer[] = { | |
70 | [0] = { DEFINE_TIMER(0, IRQ_TIMER0) }, | |
71 | [1] = { DEFINE_TIMER(1, IRQ_TIMER1) }, | |
72 | [2] = { DEFINE_TIMER(2, IRQ_TIMER2) }, | |
73 | [3] = { DEFINE_TIMER(3, IRQ_TIMER3) }, | |
74 | [4] = { DEFINE_TIMER(4, IRQ_TIMER4) }, | |
75 | }; | |
76 | ||
77 | static inline int pwm_is_tdiv(struct pwm_device *pwm) | |
78 | { | |
79 | return clk_get_parent(pwm->clk) == pwm->clk_div; | |
80 | } | |
81 | ||
82 | static DEFINE_MUTEX(pwm_lock); | |
83 | static LIST_HEAD(pwm_list); | |
84 | ||
85 | struct pwm_device *pwm_request(int pwm_id, const char *label) | |
86 | { | |
87 | struct pwm_device *pwm; | |
88 | int found = 0; | |
89 | ||
90 | mutex_lock(&pwm_lock); | |
91 | ||
92 | list_for_each_entry(pwm, &pwm_list, list) { | |
93 | if (pwm->pwm_id == pwm_id) { | |
94 | found = 1; | |
95 | break; | |
96 | } | |
97 | } | |
98 | ||
99 | if (found) { | |
100 | if (pwm->use_count == 0) { | |
101 | pwm->use_count = 1; | |
102 | pwm->label = label; | |
103 | } else | |
104 | pwm = ERR_PTR(-EBUSY); | |
105 | } else | |
106 | pwm = ERR_PTR(-ENOENT); | |
107 | ||
108 | mutex_unlock(&pwm_lock); | |
109 | return pwm; | |
110 | } | |
111 | ||
112 | EXPORT_SYMBOL(pwm_request); | |
113 | ||
114 | ||
115 | void pwm_free(struct pwm_device *pwm) | |
116 | { | |
117 | mutex_lock(&pwm_lock); | |
118 | ||
119 | if (pwm->use_count) { | |
120 | pwm->use_count--; | |
121 | pwm->label = NULL; | |
122 | } else | |
123 | printk(KERN_ERR "PWM%d device already freed\n", pwm->pwm_id); | |
124 | ||
125 | mutex_unlock(&pwm_lock); | |
126 | } | |
127 | ||
128 | EXPORT_SYMBOL(pwm_free); | |
129 | ||
130 | #define pwm_tcon_start(pwm) (1 << (pwm->tcon_base + 0)) | |
131 | #define pwm_tcon_invert(pwm) (1 << (pwm->tcon_base + 2)) | |
132 | #define pwm_tcon_autoreload(pwm) (1 << (pwm->tcon_base + 3)) | |
133 | #define pwm_tcon_manulupdate(pwm) (1 << (pwm->tcon_base + 1)) | |
134 | ||
135 | int pwm_enable(struct pwm_device *pwm) | |
136 | { | |
137 | unsigned long flags; | |
138 | unsigned long tcon; | |
139 | ||
140 | local_irq_save(flags); | |
141 | ||
142 | tcon = __raw_readl(S3C2410_TCON); | |
143 | tcon |= pwm_tcon_start(pwm); | |
144 | __raw_writel(tcon, S3C2410_TCON); | |
145 | ||
146 | local_irq_restore(flags); | |
147 | ||
148 | pwm->running = 1; | |
149 | return 0; | |
150 | } | |
151 | ||
152 | EXPORT_SYMBOL(pwm_enable); | |
153 | ||
154 | void pwm_disable(struct pwm_device *pwm) | |
155 | { | |
156 | unsigned long flags; | |
157 | unsigned long tcon; | |
158 | ||
159 | local_irq_save(flags); | |
160 | ||
161 | tcon = __raw_readl(S3C2410_TCON); | |
162 | tcon &= ~pwm_tcon_start(pwm); | |
163 | __raw_writel(tcon, S3C2410_TCON); | |
164 | ||
165 | local_irq_restore(flags); | |
166 | ||
167 | pwm->running = 0; | |
168 | } | |
169 | ||
170 | EXPORT_SYMBOL(pwm_disable); | |
171 | ||
10389592 | 172 | static unsigned long pwm_calc_tin(struct pwm_device *pwm, unsigned long freq) |
6fc601e3 BD |
173 | { |
174 | unsigned long tin_parent_rate; | |
175 | unsigned int div; | |
176 | ||
177 | tin_parent_rate = clk_get_rate(clk_get_parent(pwm->clk_div)); | |
178 | pwm_dbg(pwm, "tin parent at %lu\n", tin_parent_rate); | |
179 | ||
180 | for (div = 2; div <= 16; div *= 2) { | |
181 | if ((tin_parent_rate / (div << 16)) < freq) | |
182 | return tin_parent_rate / div; | |
183 | } | |
184 | ||
185 | return tin_parent_rate / 16; | |
186 | } | |
187 | ||
188 | #define NS_IN_HZ (1000000000UL) | |
189 | ||
190 | int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns) | |
191 | { | |
192 | unsigned long tin_rate; | |
193 | unsigned long tin_ns; | |
194 | unsigned long period; | |
195 | unsigned long flags; | |
196 | unsigned long tcon; | |
197 | unsigned long tcnt; | |
198 | long tcmp; | |
199 | ||
200 | /* We currently avoid using 64bit arithmetic by using the | |
201 | * fact that anything faster than 1Hz is easily representable | |
202 | * by 32bits. */ | |
203 | ||
204 | if (period_ns > NS_IN_HZ || duty_ns > NS_IN_HZ) | |
205 | return -ERANGE; | |
206 | ||
207 | if (duty_ns > period_ns) | |
208 | return -EINVAL; | |
209 | ||
210 | if (period_ns == pwm->period_ns && | |
211 | duty_ns == pwm->duty_ns) | |
212 | return 0; | |
213 | ||
214 | /* The TCMP and TCNT can be read without a lock, they're not | |
215 | * shared between the timers. */ | |
216 | ||
217 | tcmp = __raw_readl(S3C2410_TCMPB(pwm->pwm_id)); | |
218 | tcnt = __raw_readl(S3C2410_TCNTB(pwm->pwm_id)); | |
219 | ||
220 | period = NS_IN_HZ / period_ns; | |
221 | ||
222 | pwm_dbg(pwm, "duty_ns=%d, period_ns=%d (%lu)\n", | |
223 | duty_ns, period_ns, period); | |
224 | ||
225 | /* Check to see if we are changing the clock rate of the PWM */ | |
226 | ||
227 | if (pwm->period_ns != period_ns) { | |
228 | if (pwm_is_tdiv(pwm)) { | |
229 | tin_rate = pwm_calc_tin(pwm, period); | |
230 | clk_set_rate(pwm->clk_div, tin_rate); | |
231 | } else | |
232 | tin_rate = clk_get_rate(pwm->clk); | |
233 | ||
234 | pwm->period_ns = period_ns; | |
235 | ||
236 | pwm_dbg(pwm, "tin_rate=%lu\n", tin_rate); | |
237 | ||
238 | tin_ns = NS_IN_HZ / tin_rate; | |
239 | tcnt = period_ns / tin_ns; | |
240 | } else | |
241 | tin_ns = NS_IN_HZ / clk_get_rate(pwm->clk); | |
242 | ||
243 | /* Note, counters count down */ | |
244 | ||
245 | tcmp = duty_ns / tin_ns; | |
246 | tcmp = tcnt - tcmp; | |
247 | ||
248 | pwm_dbg(pwm, "tin_ns=%lu, tcmp=%ld/%lu\n", tin_ns, tcmp, tcnt); | |
249 | ||
250 | if (tcmp < 0) | |
251 | tcmp = 0; | |
252 | ||
253 | /* Update the PWM register block. */ | |
254 | ||
255 | local_irq_save(flags); | |
256 | ||
257 | __raw_writel(tcmp, S3C2410_TCMPB(pwm->pwm_id)); | |
258 | __raw_writel(tcnt, S3C2410_TCNTB(pwm->pwm_id)); | |
259 | ||
260 | tcon = __raw_readl(S3C2410_TCON); | |
261 | tcon |= pwm_tcon_manulupdate(pwm); | |
262 | tcon |= pwm_tcon_autoreload(pwm); | |
263 | __raw_writel(tcon, S3C2410_TCON); | |
264 | ||
265 | tcon &= ~pwm_tcon_manulupdate(pwm); | |
266 | __raw_writel(tcon, S3C2410_TCON); | |
267 | ||
268 | local_irq_restore(flags); | |
269 | ||
270 | return 0; | |
271 | } | |
272 | ||
273 | EXPORT_SYMBOL(pwm_config); | |
274 | ||
275 | static int pwm_register(struct pwm_device *pwm) | |
276 | { | |
277 | pwm->duty_ns = -1; | |
278 | pwm->period_ns = -1; | |
279 | ||
280 | mutex_lock(&pwm_lock); | |
281 | list_add_tail(&pwm->list, &pwm_list); | |
282 | mutex_unlock(&pwm_lock); | |
283 | ||
284 | return 0; | |
285 | } | |
286 | ||
287 | static int s3c_pwm_probe(struct platform_device *pdev) | |
288 | { | |
289 | struct device *dev = &pdev->dev; | |
290 | struct pwm_device *pwm; | |
291 | unsigned long flags; | |
292 | unsigned long tcon; | |
293 | unsigned int id = pdev->id; | |
294 | int ret; | |
295 | ||
296 | if (id == 4) { | |
297 | dev_err(dev, "TIMER4 is currently not supported\n"); | |
298 | return -ENXIO; | |
299 | } | |
300 | ||
301 | pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL); | |
302 | if (pwm == NULL) { | |
303 | dev_err(dev, "failed to allocate pwm_device\n"); | |
304 | return -ENOMEM; | |
305 | } | |
306 | ||
307 | pwm->pdev = pdev; | |
308 | pwm->pwm_id = id; | |
309 | ||
310 | /* calculate base of control bits in TCON */ | |
311 | pwm->tcon_base = id == 0 ? 0 : (id * 4) + 4; | |
312 | ||
313 | pwm->clk = clk_get(dev, "pwm-tin"); | |
314 | if (IS_ERR(pwm->clk)) { | |
315 | dev_err(dev, "failed to get pwm tin clk\n"); | |
316 | ret = PTR_ERR(pwm->clk); | |
317 | goto err_alloc; | |
318 | } | |
319 | ||
320 | pwm->clk_div = clk_get(dev, "pwm-tdiv"); | |
321 | if (IS_ERR(pwm->clk_div)) { | |
322 | dev_err(dev, "failed to get pwm tdiv clk\n"); | |
323 | ret = PTR_ERR(pwm->clk_div); | |
324 | goto err_clk_tin; | |
325 | } | |
326 | ||
327 | local_irq_save(flags); | |
328 | ||
329 | tcon = __raw_readl(S3C2410_TCON); | |
330 | tcon |= pwm_tcon_invert(pwm); | |
331 | __raw_writel(tcon, S3C2410_TCON); | |
332 | ||
333 | local_irq_restore(flags); | |
334 | ||
335 | ||
336 | ret = pwm_register(pwm); | |
337 | if (ret) { | |
338 | dev_err(dev, "failed to register pwm\n"); | |
339 | goto err_clk_tdiv; | |
340 | } | |
341 | ||
342 | pwm_dbg(pwm, "config bits %02x\n", | |
343 | (__raw_readl(S3C2410_TCON) >> pwm->tcon_base) & 0x0f); | |
344 | ||
345 | dev_info(dev, "tin at %lu, tdiv at %lu, tin=%sclk, base %d\n", | |
346 | clk_get_rate(pwm->clk), | |
347 | clk_get_rate(pwm->clk_div), | |
348 | pwm_is_tdiv(pwm) ? "div" : "ext", pwm->tcon_base); | |
349 | ||
350 | platform_set_drvdata(pdev, pwm); | |
351 | return 0; | |
352 | ||
353 | err_clk_tdiv: | |
354 | clk_put(pwm->clk_div); | |
355 | ||
356 | err_clk_tin: | |
357 | clk_put(pwm->clk); | |
358 | ||
359 | err_alloc: | |
360 | kfree(pwm); | |
361 | return ret; | |
362 | } | |
363 | ||
364 | static int s3c_pwm_remove(struct platform_device *pdev) | |
365 | { | |
366 | struct pwm_device *pwm = platform_get_drvdata(pdev); | |
367 | ||
368 | clk_put(pwm->clk_div); | |
369 | clk_put(pwm->clk); | |
370 | kfree(pwm); | |
371 | ||
372 | return 0; | |
373 | } | |
374 | ||
375 | static struct platform_driver s3c_pwm_driver = { | |
376 | .driver = { | |
377 | .name = "s3c24xx-pwm", | |
378 | .owner = THIS_MODULE, | |
379 | }, | |
380 | .probe = s3c_pwm_probe, | |
381 | .remove = __devexit_p(s3c_pwm_remove), | |
382 | }; | |
383 | ||
384 | static int __init pwm_init(void) | |
385 | { | |
386 | int ret; | |
387 | ||
388 | clk_scaler[0] = clk_get(NULL, "pwm-scaler0"); | |
389 | clk_scaler[1] = clk_get(NULL, "pwm-scaler1"); | |
390 | ||
391 | if (IS_ERR(clk_scaler[0]) || IS_ERR(clk_scaler[1])) { | |
392 | printk(KERN_ERR "%s: failed to get scaler clocks\n", __func__); | |
393 | return -EINVAL; | |
394 | } | |
395 | ||
396 | ret = platform_driver_register(&s3c_pwm_driver); | |
397 | if (ret) | |
398 | printk(KERN_ERR "%s: failed to add pwm driver\n", __func__); | |
399 | ||
400 | return ret; | |
401 | } | |
402 | ||
403 | arch_initcall(pwm_init); |