Merge branch 'tracing/core' of git://git.kernel.org/pub/scm/linux/kernel/git/frederic...
[linux-2.6-block.git] / arch / arm / plat-pxa / pwm.c
CommitLineData
75540c1a 1/*
2 * linux/arch/arm/mach-pxa/pwm.c
3 *
4 * simple driver for PWM (Pulse Width Modulator) controller
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
9 *
10 * 2008-02-13 initial version
11 * eric miao <eric.miao@marvell.com>
12 */
13
14#include <linux/module.h>
15#include <linux/kernel.h>
16#include <linux/platform_device.h>
17#include <linux/err.h>
18#include <linux/clk.h>
19#include <linux/io.h>
20#include <linux/pwm.h>
21
22#include <asm/div64.h>
75540c1a 23
3d2a98cd 24#define HAS_SECONDARY_PWM 0x10
a757ad8b 25#define PWM_ID_BASE(d) ((d) & 0xf)
3d2a98cd
EM
26
27static const struct platform_device_id pwm_id_table[] = {
28 /* PWM has_secondary_pwm? */
29 { "pxa25x-pwm", 0 },
a757ad8b 30 { "pxa27x-pwm", 0 | HAS_SECONDARY_PWM },
a27ba768
EM
31 { "pxa168-pwm", 1 },
32 { "pxa910-pwm", 1 },
3d2a98cd
EM
33 { },
34};
35MODULE_DEVICE_TABLE(platform, pwm_id_table);
36
75540c1a 37/* PWM registers and bits definitions */
38#define PWMCR (0x00)
39#define PWMDCR (0x04)
40#define PWMPCR (0x08)
41
42#define PWMCR_SD (1 << 6)
43#define PWMDCR_FD (1 << 10)
44
45struct pwm_device {
46 struct list_head node;
3d2a98cd
EM
47 struct pwm_device *secondary;
48 struct platform_device *pdev;
75540c1a 49
50 const char *label;
51 struct clk *clk;
c860d701 52 int clk_enabled;
75540c1a 53 void __iomem *mmio_base;
54
55 unsigned int use_count;
56 unsigned int pwm_id;
57};
58
59/*
60 * period_ns = 10^9 * (PRESCALE + 1) * (PV + 1) / PWM_CLK_RATE
61 * duty_ns = 10^9 * (PRESCALE + 1) * DC / PWM_CLK_RATE
62 */
63int pwm_config(struct pwm_device *pwm, int duty_ns, int period_ns)
64{
65 unsigned long long c;
66 unsigned long period_cycles, prescale, pv, dc;
67
68 if (pwm == NULL || period_ns == 0 || duty_ns > period_ns)
69 return -EINVAL;
70
71 c = clk_get_rate(pwm->clk);
72 c = c * period_ns;
73 do_div(c, 1000000000);
74 period_cycles = c;
75
71a35d75 76 if (period_cycles < 1)
75540c1a 77 period_cycles = 1;
78 prescale = (period_cycles - 1) / 1024;
79 pv = period_cycles / (prescale + 1) - 1;
80
81 if (prescale > 63)
82 return -EINVAL;
83
84 if (duty_ns == period_ns)
85 dc = PWMDCR_FD;
86 else
87 dc = (pv + 1) * duty_ns / period_ns;
88
89 /* NOTE: the clock to PWM has to be enabled first
90 * before writing to the registers
91 */
92 clk_enable(pwm->clk);
93 __raw_writel(prescale, pwm->mmio_base + PWMCR);
94 __raw_writel(dc, pwm->mmio_base + PWMDCR);
95 __raw_writel(pv, pwm->mmio_base + PWMPCR);
96 clk_disable(pwm->clk);
97
98 return 0;
99}
100EXPORT_SYMBOL(pwm_config);
101
102int pwm_enable(struct pwm_device *pwm)
103{
c860d701
RJ
104 int rc = 0;
105
106 if (!pwm->clk_enabled) {
107 rc = clk_enable(pwm->clk);
108 if (!rc)
109 pwm->clk_enabled = 1;
110 }
111 return rc;
75540c1a 112}
113EXPORT_SYMBOL(pwm_enable);
114
115void pwm_disable(struct pwm_device *pwm)
116{
c860d701
RJ
117 if (pwm->clk_enabled) {
118 clk_disable(pwm->clk);
119 pwm->clk_enabled = 0;
120 }
75540c1a 121}
122EXPORT_SYMBOL(pwm_disable);
123
124static DEFINE_MUTEX(pwm_lock);
125static LIST_HEAD(pwm_list);
126
127struct pwm_device *pwm_request(int pwm_id, const char *label)
128{
129 struct pwm_device *pwm;
130 int found = 0;
131
132 mutex_lock(&pwm_lock);
133
134 list_for_each_entry(pwm, &pwm_list, node) {
43bda1a6 135 if (pwm->pwm_id == pwm_id) {
75540c1a 136 found = 1;
137 break;
138 }
139 }
140
43bda1a6
BD
141 if (found) {
142 if (pwm->use_count == 0) {
143 pwm->use_count++;
144 pwm->label = label;
145 } else
146 pwm = ERR_PTR(-EBUSY);
147 } else
148 pwm = ERR_PTR(-ENOENT);
75540c1a 149
43bda1a6
BD
150 mutex_unlock(&pwm_lock);
151 return pwm;
75540c1a 152}
153EXPORT_SYMBOL(pwm_request);
154
155void pwm_free(struct pwm_device *pwm)
156{
157 mutex_lock(&pwm_lock);
158
159 if (pwm->use_count) {
160 pwm->use_count--;
161 pwm->label = NULL;
162 } else
163 pr_warning("PWM device already freed\n");
164
165 mutex_unlock(&pwm_lock);
166}
167EXPORT_SYMBOL(pwm_free);
168
169static inline void __add_pwm(struct pwm_device *pwm)
170{
171 mutex_lock(&pwm_lock);
172 list_add_tail(&pwm->node, &pwm_list);
173 mutex_unlock(&pwm_lock);
174}
175
3d2a98cd 176static int __devinit pwm_probe(struct platform_device *pdev)
75540c1a 177{
3d2a98cd
EM
178 struct platform_device_id *id = platform_get_device_id(pdev);
179 struct pwm_device *pwm, *secondary = NULL;
75540c1a 180 struct resource *r;
181 int ret = 0;
182
183 pwm = kzalloc(sizeof(struct pwm_device), GFP_KERNEL);
184 if (pwm == NULL) {
185 dev_err(&pdev->dev, "failed to allocate memory\n");
3d2a98cd 186 return -ENOMEM;
75540c1a 187 }
188
e0d8b13a 189 pwm->clk = clk_get(&pdev->dev, NULL);
75540c1a 190 if (IS_ERR(pwm->clk)) {
191 ret = PTR_ERR(pwm->clk);
192 goto err_free;
193 }
c860d701 194 pwm->clk_enabled = 0;
75540c1a 195
196 pwm->use_count = 0;
a757ad8b 197 pwm->pwm_id = PWM_ID_BASE(id->driver_data) + pdev->id;
75540c1a 198 pwm->pdev = pdev;
199
75540c1a 200 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
201 if (r == NULL) {
202 dev_err(&pdev->dev, "no memory resource defined\n");
203 ret = -ENODEV;
204 goto err_free_clk;
205 }
206
1692231c 207 r = request_mem_region(r->start, resource_size(r), pdev->name);
75540c1a 208 if (r == NULL) {
209 dev_err(&pdev->dev, "failed to request memory resource\n");
210 ret = -EBUSY;
211 goto err_free_clk;
212 }
213
1692231c 214 pwm->mmio_base = ioremap(r->start, resource_size(r));
75540c1a 215 if (pwm->mmio_base == NULL) {
216 dev_err(&pdev->dev, "failed to ioremap() registers\n");
217 ret = -ENODEV;
218 goto err_free_mem;
219 }
220
3d2a98cd
EM
221 if (id->driver_data & HAS_SECONDARY_PWM) {
222 secondary = kzalloc(sizeof(struct pwm_device), GFP_KERNEL);
223 if (secondary == NULL) {
224 ret = -ENOMEM;
225 goto err_free_mem;
226 }
227
228 *secondary = *pwm;
229 pwm->secondary = secondary;
230
231 /* registers for the second PWM has offset of 0x10 */
232 secondary->mmio_base = pwm->mmio_base + 0x10;
233 secondary->pwm_id = pdev->id + 2;
234 }
235
75540c1a 236 __add_pwm(pwm);
3d2a98cd
EM
237 if (secondary)
238 __add_pwm(secondary);
239
75540c1a 240 platform_set_drvdata(pdev, pwm);
3d2a98cd 241 return 0;
75540c1a 242
243err_free_mem:
1692231c 244 release_mem_region(r->start, resource_size(r));
75540c1a 245err_free_clk:
246 clk_put(pwm->clk);
247err_free:
248 kfree(pwm);
3d2a98cd 249 return ret;
75540c1a 250}
251
252static int __devexit pwm_remove(struct platform_device *pdev)
253{
254 struct pwm_device *pwm;
255 struct resource *r;
256
257 pwm = platform_get_drvdata(pdev);
258 if (pwm == NULL)
259 return -ENODEV;
260
261 mutex_lock(&pwm_lock);
3d2a98cd
EM
262
263 if (pwm->secondary) {
264 list_del(&pwm->secondary->node);
265 kfree(pwm->secondary);
266 }
267
75540c1a 268 list_del(&pwm->node);
269 mutex_unlock(&pwm_lock);
270
271 iounmap(pwm->mmio_base);
272
273 r = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1692231c 274 release_mem_region(r->start, resource_size(r));
75540c1a 275
276 clk_put(pwm->clk);
277 kfree(pwm);
278 return 0;
279}
280
3d2a98cd 281static struct platform_driver pwm_driver = {
75540c1a 282 .driver = {
283 .name = "pxa25x-pwm",
3d2a98cd 284 .owner = THIS_MODULE,
75540c1a 285 },
3d2a98cd 286 .probe = pwm_probe,
75540c1a 287 .remove = __devexit_p(pwm_remove),
3d2a98cd 288 .id_table = pwm_id_table,
75540c1a 289};
290
291static int __init pwm_init(void)
292{
3d2a98cd 293 return platform_driver_register(&pwm_driver);
75540c1a 294}
295arch_initcall(pwm_init);
296
297static void __exit pwm_exit(void)
298{
3d2a98cd 299 platform_driver_unregister(&pwm_driver);
75540c1a 300}
301module_exit(pwm_exit);
b5f0228a
GL
302
303MODULE_LICENSE("GPL v2");