[linux-2.6-block.git] / arch / arm / plat-orion / mpp.c

/*
 * arch/arm/plat-orion/mpp.c
 *
 * MPP functions for Marvell orion SoCs
 *
 * This file is licensed under the terms of the GNU General Public
 * License version 2.  This program is licensed "as is" without any
 * warranty of any kind, whether express or implied.
 */

#include <linux/kernel.h>
#include <linux/init.h>
#include <linux/mbus.h>
#include <linux/io.h>
#include <linux/gpio.h>
#include <plat/orion-gpio.h>
#include <plat/mpp.h>

/* Address of the ith MPP control register */
static __init void __iomem *mpp_ctrl_addr(unsigned int i,
					  void __iomem *dev_bus)
{
	return dev_bus + (i) * 4;
}


void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask,
			   unsigned int mpp_max, void __iomem *dev_bus)
{
	unsigned int mpp_nr_regs = (1 + mpp_max/8);
	u32 mpp_ctrl[8];
	int i;

	printk(KERN_DEBUG "initial MPP regs:");
	if (mpp_nr_regs > ARRAY_SIZE(mpp_ctrl)) {
		printk(KERN_ERR "orion_mpp_conf: invalid mpp_max\n");
		return;
	}

	for (i = 0; i < mpp_nr_regs; i++) {
		mpp_ctrl[i] = readl(mpp_ctrl_addr(i, dev_bus));
		printk(" %08x", mpp_ctrl[i]);
	}
	printk("\n");

	for ( ; *mpp_list; mpp_list++) {
		unsigned int num = MPP_NUM(*mpp_list);
		unsigned int sel = MPP_SEL(*mpp_list);
		int shift, gpio_mode;

		if (num > mpp_max) {
			printk(KERN_ERR "orion_mpp_conf: invalid MPP "
					"number (%u)\n", num);
			continue;
		}
		if (variant_mask && !(*mpp_list & variant_mask)) {
			printk(KERN_WARNING
			       "orion_mpp_conf: requested MPP%u config "
			       "unavailable on this hardware\n", num);
			continue;
		}

		shift = (num & 7) << 2;
		mpp_ctrl[num / 8] &= ~(0xf << shift);
		mpp_ctrl[num / 8] |= sel << shift;

		gpio_mode = 0;
		if (*mpp_list & MPP_INPUT_MASK)
			gpio_mode |= GPIO_INPUT_OK;
		if (*mpp_list & MPP_OUTPUT_MASK)
			gpio_mode |= GPIO_OUTPUT_OK;

		orion_gpio_set_valid(num, gpio_mode);
	}

	printk(KERN_DEBUG "  final MPP regs:");
	for (i = 0; i < mpp_nr_regs; i++) {
		writel(mpp_ctrl[i], mpp_ctrl_addr(i, dev_bus));
		printk(" %08x", mpp_ctrl[i]);
	}
	printk("\n");
}
Commit	Line	Data
b2f427a1 AL	1	/*
	2	* arch/arm/plat-orion/mpp.c
	3	*
	4	* MPP functions for Marvell orion SoCs
	5	*
	6	* This file is licensed under the terms of the GNU General Public
	7	* License version 2. This program is licensed "as is" without any
	8	* warranty of any kind, whether express or implied.
	9	*/
	10
	11	#include <linux/kernel.h>
	12	#include <linux/init.h>
	13	#include <linux/mbus.h>
	14	#include <linux/io.h>
	15	#include <linux/gpio.h>
ce91574c	16	#include <plat/orion-gpio.h>
b2f427a1 AL	17	#include <plat/mpp.h>
	18
	19	/* Address of the ith MPP control register */
5a2f5501 TP	20	static __init void __iomem *mpp_ctrl_addr(unsigned int i,
5a2f5501 TP	21	void __iomem *dev_bus)
b2f427a1 AL	22	{
	23	return dev_bus + (i) * 4;
	24	}
	25
	26
	27	void __init orion_mpp_conf(unsigned int *mpp_list, unsigned int variant_mask,
5a2f5501	28	unsigned int mpp_max, void __iomem *dev_bus)
b2f427a1 AL	29	{
b2f427a1 AL	30	unsigned int mpp_nr_regs = (1 + mpp_max/8);
d4f79cb8	31	u32 mpp_ctrl[8];
b2f427a1 AL	32	int i;
b2f427a1 AL	33
b2f427a1	34	printk(KERN_DEBUG "initial MPP regs:");
d4f79cb8 AB	35	if (mpp_nr_regs > ARRAY_SIZE(mpp_ctrl)) {
	36	printk(KERN_ERR "orion_mpp_conf: invalid mpp_max\n");
	37	return;
	38	}
	39
b2f427a1 AL	40	for (i = 0; i < mpp_nr_regs; i++) {
	41	mpp_ctrl[i] = readl(mpp_ctrl_addr(i, dev_bus));
	42	printk(" %08x", mpp_ctrl[i]);
	43	}
	44	printk("\n");
	45
	46	for ( ; *mpp_list; mpp_list++) {
	47	unsigned int num = MPP_NUM(*mpp_list);
	48	unsigned int sel = MPP_SEL(*mpp_list);
	49	int shift, gpio_mode;
	50
	51	if (num > mpp_max) {
	52	printk(KERN_ERR "orion_mpp_conf: invalid MPP "
	53	"number (%u)\n", num);
	54	continue;
	55	}
830f8b91	56	if (variant_mask && !(*mpp_list & variant_mask)) {
b2f427a1 AL	57	printk(KERN_WARNING
	58	"orion_mpp_conf: requested MPP%u config "
	59	"unavailable on this hardware\n", num);
	60	continue;
	61	}
	62
	63	shift = (num & 7) << 2;
	64	mpp_ctrl[num / 8] &= ~(0xf << shift);
	65	mpp_ctrl[num / 8] \|= sel << shift;
	66
	67	gpio_mode = 0;
	68	if (*mpp_list & MPP_INPUT_MASK)
	69	gpio_mode \|= GPIO_INPUT_OK;
	70	if (*mpp_list & MPP_OUTPUT_MASK)
	71	gpio_mode \|= GPIO_OUTPUT_OK;
b0654037	72
b2f427a1 AL	73	orion_gpio_set_valid(num, gpio_mode);
	74	}
	75
	76	printk(KERN_DEBUG " final MPP regs:");
	77	for (i = 0; i < mpp_nr_regs; i++) {
	78	writel(mpp_ctrl[i], mpp_ctrl_addr(i, dev_bus));
	79	printk(" %08x", mpp_ctrl[i]);
	80	}
	81	printk("\n");
	82	}