Commit | Line | Data |
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28a2b450 AL |
1 | /* |
2 | * arch/arm/plat-orion/common.c | |
3 | * | |
4 | * Marvell Orion SoC common setup code used by multiple mach-/common.c | |
5 | * | |
6 | * This file is licensed under the terms of the GNU General Public | |
7 | * License version 2. This program is licensed "as is" without any | |
8 | * warranty of any kind, whether express or implied. | |
9 | */ | |
10 | ||
11 | #include <linux/kernel.h> | |
12 | #include <linux/init.h> | |
13 | #include <linux/platform_device.h> | |
7e3819d8 | 14 | #include <linux/dma-mapping.h> |
28a2b450 | 15 | #include <linux/serial_8250.h> |
9e613f8a | 16 | #include <linux/ata_platform.h> |
2f129bf4 AL |
17 | #include <linux/clk.h> |
18 | #include <linux/clkdev.h> | |
7e3819d8 | 19 | #include <linux/mv643xx_eth.h> |
aac7ffa3 | 20 | #include <linux/mv643xx_i2c.h> |
e5f02a31 | 21 | #include <linux/platform_data/dsa.h> |
c02cecb9 AB |
22 | #include <linux/platform_data/dma-mv_xor.h> |
23 | #include <linux/platform_data/usb-ehci-orion.h> | |
48fce88c | 24 | #include <plat/common.h> |
575e93f7 | 25 | #include <linux/phy.h> |
28a2b450 | 26 | |
4574b886 AL |
27 | /* Create a clkdev entry for a given device/clk */ |
28 | void __init orion_clkdev_add(const char *con_id, const char *dev_id, | |
29 | struct clk *clk) | |
30 | { | |
4dbc0230 | 31 | clkdev_create(clk, con_id, "%s", dev_id); |
4574b886 AL |
32 | } |
33 | ||
34 | /* Create clkdev entries for all orion platforms except kirkwood. | |
35 | Kirkwood has gated clocks for some of its peripherals, so creates | |
36 | its own clkdev entries. For all the other orion devices, create | |
37 | clkdev entries to the tclk. */ | |
38 | void __init orion_clkdev_init(struct clk *tclk) | |
39 | { | |
40 | orion_clkdev_add(NULL, "orion_spi.0", tclk); | |
41 | orion_clkdev_add(NULL, "orion_spi.1", tclk); | |
452503eb AL |
42 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".0", tclk); |
43 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".1", tclk); | |
44 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".2", tclk); | |
45 | orion_clkdev_add(NULL, MV643XX_ETH_NAME ".3", tclk); | |
4f04be62 | 46 | orion_clkdev_add(NULL, "orion_wdt", tclk); |
e91cac0a | 47 | orion_clkdev_add(NULL, MV64XXX_I2C_CTLR_NAME ".0", tclk); |
4574b886 AL |
48 | } |
49 | ||
28a2b450 AL |
50 | /* Fill in the resources structure and link it into the platform |
51 | device structure. There is always a memory region, and nearly | |
52 | always an interrupt.*/ | |
53 | static void fill_resources(struct platform_device *device, | |
54 | struct resource *resources, | |
55 | resource_size_t mapbase, | |
93a753bd | 56 | resource_size_t size) |
28a2b450 AL |
57 | { |
58 | device->resource = resources; | |
59 | device->num_resources = 1; | |
60 | resources[0].flags = IORESOURCE_MEM; | |
61 | resources[0].start = mapbase; | |
62 | resources[0].end = mapbase + size; | |
93a753bd | 63 | } |
28a2b450 | 64 | |
93a753bd AB |
65 | static void fill_resources_irq(struct platform_device *device, |
66 | struct resource *resources, | |
67 | resource_size_t mapbase, | |
68 | resource_size_t size, | |
69 | unsigned int irq) | |
70 | { | |
71 | fill_resources(device, resources, mapbase, size); | |
72 | ||
73 | device->num_resources++; | |
74 | resources[1].flags = IORESOURCE_IRQ; | |
75 | resources[1].start = irq; | |
76 | resources[1].end = irq; | |
28a2b450 AL |
77 | } |
78 | ||
79 | /***************************************************************************** | |
80 | * UART | |
81 | ****************************************************************************/ | |
74c33576 AL |
82 | static unsigned long __init uart_get_clk_rate(struct clk *clk) |
83 | { | |
84 | clk_prepare_enable(clk); | |
85 | return clk_get_rate(clk); | |
86 | } | |
87 | ||
28a2b450 AL |
88 | static void __init uart_complete( |
89 | struct platform_device *orion_uart, | |
90 | struct plat_serial8250_port *data, | |
91 | struct resource *resources, | |
d19beac1 | 92 | void __iomem *membase, |
28a2b450 AL |
93 | resource_size_t mapbase, |
94 | unsigned int irq, | |
74c33576 | 95 | struct clk *clk) |
28a2b450 AL |
96 | { |
97 | data->mapbase = mapbase; | |
d19beac1 | 98 | data->membase = membase; |
28a2b450 | 99 | data->irq = irq; |
74c33576 | 100 | data->uartclk = uart_get_clk_rate(clk); |
28a2b450 AL |
101 | orion_uart->dev.platform_data = data; |
102 | ||
93a753bd | 103 | fill_resources_irq(orion_uart, resources, mapbase, 0xff, irq); |
28a2b450 AL |
104 | platform_device_register(orion_uart); |
105 | } | |
106 | ||
107 | /***************************************************************************** | |
108 | * UART0 | |
109 | ****************************************************************************/ | |
110 | static struct plat_serial8250_port orion_uart0_data[] = { | |
111 | { | |
112 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
113 | .iotype = UPIO_MEM, | |
114 | .regshift = 2, | |
115 | }, { | |
116 | }, | |
117 | }; | |
118 | ||
119 | static struct resource orion_uart0_resources[2]; | |
120 | ||
121 | static struct platform_device orion_uart0 = { | |
122 | .name = "serial8250", | |
123 | .id = PLAT8250_DEV_PLATFORM, | |
124 | }; | |
125 | ||
d19beac1 | 126 | void __init orion_uart0_init(void __iomem *membase, |
28a2b450 AL |
127 | resource_size_t mapbase, |
128 | unsigned int irq, | |
74c33576 | 129 | struct clk *clk) |
28a2b450 AL |
130 | { |
131 | uart_complete(&orion_uart0, orion_uart0_data, orion_uart0_resources, | |
74c33576 | 132 | membase, mapbase, irq, clk); |
28a2b450 AL |
133 | } |
134 | ||
135 | /***************************************************************************** | |
136 | * UART1 | |
137 | ****************************************************************************/ | |
138 | static struct plat_serial8250_port orion_uart1_data[] = { | |
139 | { | |
140 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
141 | .iotype = UPIO_MEM, | |
142 | .regshift = 2, | |
143 | }, { | |
144 | }, | |
145 | }; | |
146 | ||
147 | static struct resource orion_uart1_resources[2]; | |
148 | ||
149 | static struct platform_device orion_uart1 = { | |
150 | .name = "serial8250", | |
151 | .id = PLAT8250_DEV_PLATFORM1, | |
152 | }; | |
153 | ||
d19beac1 | 154 | void __init orion_uart1_init(void __iomem *membase, |
28a2b450 AL |
155 | resource_size_t mapbase, |
156 | unsigned int irq, | |
74c33576 | 157 | struct clk *clk) |
28a2b450 AL |
158 | { |
159 | uart_complete(&orion_uart1, orion_uart1_data, orion_uart1_resources, | |
74c33576 | 160 | membase, mapbase, irq, clk); |
28a2b450 AL |
161 | } |
162 | ||
163 | /***************************************************************************** | |
164 | * UART2 | |
165 | ****************************************************************************/ | |
166 | static struct plat_serial8250_port orion_uart2_data[] = { | |
167 | { | |
168 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
169 | .iotype = UPIO_MEM, | |
170 | .regshift = 2, | |
171 | }, { | |
172 | }, | |
173 | }; | |
174 | ||
175 | static struct resource orion_uart2_resources[2]; | |
176 | ||
177 | static struct platform_device orion_uart2 = { | |
178 | .name = "serial8250", | |
179 | .id = PLAT8250_DEV_PLATFORM2, | |
180 | }; | |
181 | ||
d19beac1 | 182 | void __init orion_uart2_init(void __iomem *membase, |
28a2b450 AL |
183 | resource_size_t mapbase, |
184 | unsigned int irq, | |
74c33576 | 185 | struct clk *clk) |
28a2b450 AL |
186 | { |
187 | uart_complete(&orion_uart2, orion_uart2_data, orion_uart2_resources, | |
74c33576 | 188 | membase, mapbase, irq, clk); |
28a2b450 AL |
189 | } |
190 | ||
191 | /***************************************************************************** | |
192 | * UART3 | |
193 | ****************************************************************************/ | |
194 | static struct plat_serial8250_port orion_uart3_data[] = { | |
195 | { | |
196 | .flags = UPF_SKIP_TEST | UPF_BOOT_AUTOCONF, | |
197 | .iotype = UPIO_MEM, | |
198 | .regshift = 2, | |
199 | }, { | |
200 | }, | |
201 | }; | |
202 | ||
203 | static struct resource orion_uart3_resources[2]; | |
204 | ||
205 | static struct platform_device orion_uart3 = { | |
206 | .name = "serial8250", | |
207 | .id = 3, | |
208 | }; | |
209 | ||
d19beac1 | 210 | void __init orion_uart3_init(void __iomem *membase, |
28a2b450 AL |
211 | resource_size_t mapbase, |
212 | unsigned int irq, | |
74c33576 | 213 | struct clk *clk) |
28a2b450 AL |
214 | { |
215 | uart_complete(&orion_uart3, orion_uart3_data, orion_uart3_resources, | |
74c33576 | 216 | membase, mapbase, irq, clk); |
28a2b450 | 217 | } |
f6eaccb3 AL |
218 | |
219 | /***************************************************************************** | |
220 | * SoC RTC | |
221 | ****************************************************************************/ | |
222 | static struct resource orion_rtc_resource[2]; | |
223 | ||
224 | void __init orion_rtc_init(unsigned long mapbase, | |
225 | unsigned long irq) | |
226 | { | |
227 | orion_rtc_resource[0].start = mapbase; | |
228 | orion_rtc_resource[0].end = mapbase + SZ_32 - 1; | |
229 | orion_rtc_resource[0].flags = IORESOURCE_MEM; | |
230 | orion_rtc_resource[1].start = irq; | |
231 | orion_rtc_resource[1].end = irq; | |
232 | orion_rtc_resource[1].flags = IORESOURCE_IRQ; | |
233 | ||
234 | platform_device_register_simple("rtc-mv", -1, orion_rtc_resource, 2); | |
235 | } | |
7e3819d8 AL |
236 | |
237 | /***************************************************************************** | |
238 | * GE | |
239 | ****************************************************************************/ | |
240 | static __init void ge_complete( | |
241 | struct mv643xx_eth_shared_platform_data *orion_ge_shared_data, | |
7e3819d8 AL |
242 | struct resource *orion_ge_resource, unsigned long irq, |
243 | struct platform_device *orion_ge_shared, | |
c3a07134 | 244 | struct platform_device *orion_ge_mvmdio, |
7e3819d8 AL |
245 | struct mv643xx_eth_platform_data *eth_data, |
246 | struct platform_device *orion_ge) | |
247 | { | |
7e3819d8 AL |
248 | orion_ge_resource->start = irq; |
249 | orion_ge_resource->end = irq; | |
250 | eth_data->shared = orion_ge_shared; | |
251 | orion_ge->dev.platform_data = eth_data; | |
252 | ||
253 | platform_device_register(orion_ge_shared); | |
c3a07134 FF |
254 | if (orion_ge_mvmdio) |
255 | platform_device_register(orion_ge_mvmdio); | |
7e3819d8 AL |
256 | platform_device_register(orion_ge); |
257 | } | |
258 | ||
259 | /***************************************************************************** | |
260 | * GE00 | |
261 | ****************************************************************************/ | |
48fce88c | 262 | static struct mv643xx_eth_shared_platform_data orion_ge00_shared_data; |
7e3819d8 AL |
263 | |
264 | static struct resource orion_ge00_shared_resources[] = { | |
265 | { | |
266 | .name = "ge00 base", | |
7e3819d8 AL |
267 | }, |
268 | }; | |
269 | ||
270 | static struct platform_device orion_ge00_shared = { | |
271 | .name = MV643XX_ETH_SHARED_NAME, | |
272 | .id = 0, | |
273 | .dev = { | |
274 | .platform_data = &orion_ge00_shared_data, | |
275 | }, | |
276 | }; | |
277 | ||
c3a07134 FF |
278 | static struct resource orion_ge_mvmdio_resources[] = { |
279 | { | |
280 | .name = "ge00 mvmdio base", | |
281 | }, { | |
282 | .name = "ge00 mvmdio err irq", | |
283 | }, | |
284 | }; | |
285 | ||
286 | static struct platform_device orion_ge_mvmdio = { | |
287 | .name = "orion-mdio", | |
288 | .id = -1, | |
289 | }; | |
290 | ||
7e3819d8 AL |
291 | static struct resource orion_ge00_resources[] = { |
292 | { | |
293 | .name = "ge00 irq", | |
294 | .flags = IORESOURCE_IRQ, | |
295 | }, | |
296 | }; | |
297 | ||
298 | static struct platform_device orion_ge00 = { | |
299 | .name = MV643XX_ETH_NAME, | |
300 | .id = 0, | |
301 | .num_resources = 1, | |
302 | .resource = orion_ge00_resources, | |
303 | .dev = { | |
304 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
305 | }, | |
306 | }; | |
307 | ||
308 | void __init orion_ge00_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 AL |
309 | unsigned long mapbase, |
310 | unsigned long irq, | |
58569aee APR |
311 | unsigned long irq_err, |
312 | unsigned int tx_csum_limit) | |
7e3819d8 AL |
313 | { |
314 | fill_resources(&orion_ge00_shared, orion_ge00_shared_resources, | |
93a753bd AB |
315 | mapbase + 0x2000, SZ_16K - 1); |
316 | fill_resources_irq(&orion_ge_mvmdio, orion_ge_mvmdio_resources, | |
c3a07134 | 317 | mapbase + 0x2004, 0x84 - 1, irq_err); |
58569aee | 318 | orion_ge00_shared_data.tx_csum_limit = tx_csum_limit; |
452503eb | 319 | ge_complete(&orion_ge00_shared_data, |
7e3819d8 | 320 | orion_ge00_resources, irq, &orion_ge00_shared, |
c3a07134 | 321 | &orion_ge_mvmdio, |
7e3819d8 AL |
322 | eth_data, &orion_ge00); |
323 | } | |
324 | ||
325 | /***************************************************************************** | |
326 | * GE01 | |
327 | ****************************************************************************/ | |
48fce88c | 328 | static struct mv643xx_eth_shared_platform_data orion_ge01_shared_data; |
7e3819d8 AL |
329 | |
330 | static struct resource orion_ge01_shared_resources[] = { | |
331 | { | |
332 | .name = "ge01 base", | |
c3a07134 | 333 | } |
7e3819d8 AL |
334 | }; |
335 | ||
336 | static struct platform_device orion_ge01_shared = { | |
337 | .name = MV643XX_ETH_SHARED_NAME, | |
338 | .id = 1, | |
339 | .dev = { | |
340 | .platform_data = &orion_ge01_shared_data, | |
341 | }, | |
342 | }; | |
343 | ||
344 | static struct resource orion_ge01_resources[] = { | |
345 | { | |
346 | .name = "ge01 irq", | |
347 | .flags = IORESOURCE_IRQ, | |
348 | }, | |
349 | }; | |
350 | ||
351 | static struct platform_device orion_ge01 = { | |
352 | .name = MV643XX_ETH_NAME, | |
353 | .id = 1, | |
354 | .num_resources = 1, | |
355 | .resource = orion_ge01_resources, | |
356 | .dev = { | |
357 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
358 | }, | |
359 | }; | |
360 | ||
361 | void __init orion_ge01_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 AL |
362 | unsigned long mapbase, |
363 | unsigned long irq, | |
58569aee | 364 | unsigned int tx_csum_limit) |
7e3819d8 AL |
365 | { |
366 | fill_resources(&orion_ge01_shared, orion_ge01_shared_resources, | |
93a753bd | 367 | mapbase + 0x2000, SZ_16K - 1); |
58569aee | 368 | orion_ge01_shared_data.tx_csum_limit = tx_csum_limit; |
452503eb | 369 | ge_complete(&orion_ge01_shared_data, |
7e3819d8 | 370 | orion_ge01_resources, irq, &orion_ge01_shared, |
c3a07134 | 371 | NULL, |
7e3819d8 AL |
372 | eth_data, &orion_ge01); |
373 | } | |
374 | ||
375 | /***************************************************************************** | |
376 | * GE10 | |
377 | ****************************************************************************/ | |
48fce88c | 378 | static struct mv643xx_eth_shared_platform_data orion_ge10_shared_data; |
7e3819d8 AL |
379 | |
380 | static struct resource orion_ge10_shared_resources[] = { | |
381 | { | |
382 | .name = "ge10 base", | |
c3a07134 | 383 | } |
7e3819d8 AL |
384 | }; |
385 | ||
386 | static struct platform_device orion_ge10_shared = { | |
387 | .name = MV643XX_ETH_SHARED_NAME, | |
2b8b2797 | 388 | .id = 2, |
7e3819d8 AL |
389 | .dev = { |
390 | .platform_data = &orion_ge10_shared_data, | |
391 | }, | |
392 | }; | |
393 | ||
394 | static struct resource orion_ge10_resources[] = { | |
395 | { | |
396 | .name = "ge10 irq", | |
397 | .flags = IORESOURCE_IRQ, | |
398 | }, | |
399 | }; | |
400 | ||
401 | static struct platform_device orion_ge10 = { | |
402 | .name = MV643XX_ETH_NAME, | |
2b8b2797 GC |
403 | .id = 2, |
404 | .num_resources = 1, | |
7e3819d8 AL |
405 | .resource = orion_ge10_resources, |
406 | .dev = { | |
407 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
408 | }, | |
409 | }; | |
410 | ||
411 | void __init orion_ge10_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 | 412 | unsigned long mapbase, |
7d619d8a | 413 | unsigned long irq) |
7e3819d8 AL |
414 | { |
415 | fill_resources(&orion_ge10_shared, orion_ge10_shared_resources, | |
93a753bd | 416 | mapbase + 0x2000, SZ_16K - 1); |
452503eb | 417 | ge_complete(&orion_ge10_shared_data, |
7e3819d8 | 418 | orion_ge10_resources, irq, &orion_ge10_shared, |
c3a07134 | 419 | NULL, |
7e3819d8 AL |
420 | eth_data, &orion_ge10); |
421 | } | |
422 | ||
423 | /***************************************************************************** | |
424 | * GE11 | |
425 | ****************************************************************************/ | |
48fce88c | 426 | static struct mv643xx_eth_shared_platform_data orion_ge11_shared_data; |
7e3819d8 AL |
427 | |
428 | static struct resource orion_ge11_shared_resources[] = { | |
429 | { | |
430 | .name = "ge11 base", | |
7e3819d8 AL |
431 | }, |
432 | }; | |
433 | ||
434 | static struct platform_device orion_ge11_shared = { | |
435 | .name = MV643XX_ETH_SHARED_NAME, | |
2b8b2797 | 436 | .id = 3, |
7e3819d8 AL |
437 | .dev = { |
438 | .platform_data = &orion_ge11_shared_data, | |
439 | }, | |
440 | }; | |
441 | ||
442 | static struct resource orion_ge11_resources[] = { | |
443 | { | |
444 | .name = "ge11 irq", | |
445 | .flags = IORESOURCE_IRQ, | |
446 | }, | |
447 | }; | |
448 | ||
449 | static struct platform_device orion_ge11 = { | |
450 | .name = MV643XX_ETH_NAME, | |
2b8b2797 GC |
451 | .id = 3, |
452 | .num_resources = 1, | |
7e3819d8 AL |
453 | .resource = orion_ge11_resources, |
454 | .dev = { | |
455 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
456 | }, | |
457 | }; | |
458 | ||
459 | void __init orion_ge11_init(struct mv643xx_eth_platform_data *eth_data, | |
7e3819d8 | 460 | unsigned long mapbase, |
7d619d8a | 461 | unsigned long irq) |
7e3819d8 AL |
462 | { |
463 | fill_resources(&orion_ge11_shared, orion_ge11_shared_resources, | |
93a753bd | 464 | mapbase + 0x2000, SZ_16K - 1); |
452503eb | 465 | ge_complete(&orion_ge11_shared_data, |
7e3819d8 | 466 | orion_ge11_resources, irq, &orion_ge11_shared, |
c3a07134 | 467 | NULL, |
7e3819d8 AL |
468 | eth_data, &orion_ge11); |
469 | } | |
470 | ||
d43e85b7 | 471 | #ifdef CONFIG_ARCH_ORION5X |
7e3819d8 AL |
472 | /***************************************************************************** |
473 | * Ethernet switch | |
474 | ****************************************************************************/ | |
8337d083 AB |
475 | static __initdata struct mdio_board_info orion_ge00_switch_board_info = { |
476 | .bus_id = "orion-mii", | |
477 | .modalias = "mv88e6085", | |
478 | }; | |
575e93f7 FF |
479 | |
480 | void __init orion_ge00_switch_init(struct dsa_chip_data *d) | |
7e3819d8 | 481 | { |
575e93f7 FF |
482 | unsigned int i; |
483 | ||
d43e85b7 AB |
484 | if (!IS_BUILTIN(CONFIG_PHYLIB)) |
485 | return; | |
486 | ||
8337d083 AB |
487 | for (i = 0; i < ARRAY_SIZE(d->port_names); i++) { |
488 | if (!strcmp(d->port_names[i], "cpu")) { | |
489 | d->netdev[i] = &orion_ge00.dev; | |
575e93f7 | 490 | break; |
8337d083 AB |
491 | } |
492 | } | |
7e3819d8 | 493 | |
8337d083 AB |
494 | orion_ge00_switch_board_info.mdio_addr = d->sw_addr; |
495 | orion_ge00_switch_board_info.platform_data = d; | |
7e3819d8 | 496 | |
575e93f7 | 497 | mdiobus_register_board_info(&orion_ge00_switch_board_info, 1); |
7e3819d8 | 498 | } |
d43e85b7 | 499 | #endif |
aac7ffa3 AL |
500 | |
501 | /***************************************************************************** | |
502 | * I2C | |
503 | ****************************************************************************/ | |
504 | static struct mv64xxx_i2c_pdata orion_i2c_pdata = { | |
505 | .freq_n = 3, | |
506 | .timeout = 1000, /* Default timeout of 1 second */ | |
507 | }; | |
508 | ||
509 | static struct resource orion_i2c_resources[2]; | |
510 | ||
511 | static struct platform_device orion_i2c = { | |
512 | .name = MV64XXX_I2C_CTLR_NAME, | |
513 | .id = 0, | |
514 | .dev = { | |
515 | .platform_data = &orion_i2c_pdata, | |
516 | }, | |
517 | }; | |
518 | ||
519 | static struct mv64xxx_i2c_pdata orion_i2c_1_pdata = { | |
520 | .freq_n = 3, | |
521 | .timeout = 1000, /* Default timeout of 1 second */ | |
522 | }; | |
523 | ||
524 | static struct resource orion_i2c_1_resources[2]; | |
525 | ||
526 | static struct platform_device orion_i2c_1 = { | |
527 | .name = MV64XXX_I2C_CTLR_NAME, | |
528 | .id = 1, | |
529 | .dev = { | |
530 | .platform_data = &orion_i2c_1_pdata, | |
531 | }, | |
532 | }; | |
533 | ||
534 | void __init orion_i2c_init(unsigned long mapbase, | |
535 | unsigned long irq, | |
536 | unsigned long freq_m) | |
537 | { | |
538 | orion_i2c_pdata.freq_m = freq_m; | |
93a753bd | 539 | fill_resources_irq(&orion_i2c, orion_i2c_resources, mapbase, |
aac7ffa3 AL |
540 | SZ_32 - 1, irq); |
541 | platform_device_register(&orion_i2c); | |
542 | } | |
543 | ||
544 | void __init orion_i2c_1_init(unsigned long mapbase, | |
545 | unsigned long irq, | |
546 | unsigned long freq_m) | |
547 | { | |
548 | orion_i2c_1_pdata.freq_m = freq_m; | |
93a753bd | 549 | fill_resources_irq(&orion_i2c_1, orion_i2c_1_resources, mapbase, |
aac7ffa3 AL |
550 | SZ_32 - 1, irq); |
551 | platform_device_register(&orion_i2c_1); | |
552 | } | |
980f9f60 AL |
553 | |
554 | /***************************************************************************** | |
555 | * SPI | |
556 | ****************************************************************************/ | |
980f9f60 AL |
557 | static struct resource orion_spi_resources; |
558 | ||
559 | static struct platform_device orion_spi = { | |
560 | .name = "orion_spi", | |
561 | .id = 0, | |
980f9f60 AL |
562 | }; |
563 | ||
980f9f60 AL |
564 | static struct resource orion_spi_1_resources; |
565 | ||
566 | static struct platform_device orion_spi_1 = { | |
567 | .name = "orion_spi", | |
568 | .id = 1, | |
980f9f60 AL |
569 | }; |
570 | ||
571 | /* Note: The SPI silicon core does have interrupts. However the | |
572 | * current Linux software driver does not use interrupts. */ | |
573 | ||
4574b886 | 574 | void __init orion_spi_init(unsigned long mapbase) |
980f9f60 | 575 | { |
980f9f60 | 576 | fill_resources(&orion_spi, &orion_spi_resources, |
93a753bd | 577 | mapbase, SZ_512 - 1); |
980f9f60 AL |
578 | platform_device_register(&orion_spi); |
579 | } | |
580 | ||
4574b886 | 581 | void __init orion_spi_1_init(unsigned long mapbase) |
980f9f60 | 582 | { |
980f9f60 | 583 | fill_resources(&orion_spi_1, &orion_spi_1_resources, |
93a753bd | 584 | mapbase, SZ_512 - 1); |
980f9f60 AL |
585 | platform_device_register(&orion_spi_1); |
586 | } | |
5e00d378 | 587 | |
ee962723 AL |
588 | /***************************************************************************** |
589 | * XOR | |
590 | ****************************************************************************/ | |
ee962723 AL |
591 | static u64 orion_xor_dmamask = DMA_BIT_MASK(32); |
592 | ||
ee962723 AL |
593 | /***************************************************************************** |
594 | * XOR0 | |
595 | ****************************************************************************/ | |
596 | static struct resource orion_xor0_shared_resources[] = { | |
597 | { | |
598 | .name = "xor 0 low", | |
599 | .flags = IORESOURCE_MEM, | |
600 | }, { | |
601 | .name = "xor 0 high", | |
602 | .flags = IORESOURCE_MEM, | |
af19e148 TP |
603 | }, { |
604 | .name = "irq channel 0", | |
605 | .flags = IORESOURCE_IRQ, | |
606 | }, { | |
607 | .name = "irq channel 1", | |
608 | .flags = IORESOURCE_IRQ, | |
ee962723 AL |
609 | }, |
610 | }; | |
611 | ||
b503fa01 | 612 | static struct mv_xor_channel_data orion_xor0_channels_data[2]; |
ee962723 | 613 | |
7dde453d | 614 | static struct mv_xor_platform_data orion_xor0_pdata = { |
e39f6ec1 | 615 | .channels = orion_xor0_channels_data, |
ee962723 AL |
616 | }; |
617 | ||
af19e148 | 618 | static struct platform_device orion_xor0_shared = { |
0dddee7a | 619 | .name = MV_XOR_NAME, |
af19e148 TP |
620 | .id = 0, |
621 | .num_resources = ARRAY_SIZE(orion_xor0_shared_resources), | |
622 | .resource = orion_xor0_shared_resources, | |
623 | .dev = { | |
624 | .dma_mask = &orion_xor_dmamask, | |
cd92d74d | 625 | .coherent_dma_mask = DMA_BIT_MASK(32), |
af19e148 | 626 | .platform_data = &orion_xor0_pdata, |
ee962723 AL |
627 | }, |
628 | }; | |
629 | ||
db33f4de | 630 | void __init orion_xor0_init(unsigned long mapbase_low, |
ee962723 AL |
631 | unsigned long mapbase_high, |
632 | unsigned long irq_0, | |
633 | unsigned long irq_1) | |
634 | { | |
ee962723 AL |
635 | orion_xor0_shared_resources[0].start = mapbase_low; |
636 | orion_xor0_shared_resources[0].end = mapbase_low + 0xff; | |
637 | orion_xor0_shared_resources[1].start = mapbase_high; | |
638 | orion_xor0_shared_resources[1].end = mapbase_high + 0xff; | |
639 | ||
af19e148 TP |
640 | orion_xor0_shared_resources[2].start = irq_0; |
641 | orion_xor0_shared_resources[2].end = irq_0; | |
642 | orion_xor0_shared_resources[3].start = irq_1; | |
643 | orion_xor0_shared_resources[3].end = irq_1; | |
ee962723 | 644 | |
e39f6ec1 TP |
645 | dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[0].cap_mask); |
646 | dma_cap_set(DMA_XOR, orion_xor0_channels_data[0].cap_mask); | |
ee962723 | 647 | |
e39f6ec1 TP |
648 | dma_cap_set(DMA_MEMCPY, orion_xor0_channels_data[1].cap_mask); |
649 | dma_cap_set(DMA_XOR, orion_xor0_channels_data[1].cap_mask); | |
af19e148 TP |
650 | |
651 | platform_device_register(&orion_xor0_shared); | |
ee962723 AL |
652 | } |
653 | ||
654 | /***************************************************************************** | |
655 | * XOR1 | |
656 | ****************************************************************************/ | |
657 | static struct resource orion_xor1_shared_resources[] = { | |
658 | { | |
659 | .name = "xor 1 low", | |
660 | .flags = IORESOURCE_MEM, | |
661 | }, { | |
662 | .name = "xor 1 high", | |
663 | .flags = IORESOURCE_MEM, | |
dd2c57b8 TP |
664 | }, { |
665 | .name = "irq channel 0", | |
666 | .flags = IORESOURCE_IRQ, | |
667 | }, { | |
668 | .name = "irq channel 1", | |
669 | .flags = IORESOURCE_IRQ, | |
ee962723 AL |
670 | }, |
671 | }; | |
672 | ||
b503fa01 | 673 | static struct mv_xor_channel_data orion_xor1_channels_data[2]; |
ee962723 | 674 | |
7dde453d | 675 | static struct mv_xor_platform_data orion_xor1_pdata = { |
e39f6ec1 | 676 | .channels = orion_xor1_channels_data, |
ee962723 AL |
677 | }; |
678 | ||
dd2c57b8 | 679 | static struct platform_device orion_xor1_shared = { |
0dddee7a | 680 | .name = MV_XOR_NAME, |
dd2c57b8 TP |
681 | .id = 1, |
682 | .num_resources = ARRAY_SIZE(orion_xor1_shared_resources), | |
683 | .resource = orion_xor1_shared_resources, | |
684 | .dev = { | |
685 | .dma_mask = &orion_xor_dmamask, | |
cd92d74d | 686 | .coherent_dma_mask = DMA_BIT_MASK(32), |
dd2c57b8 | 687 | .platform_data = &orion_xor1_pdata, |
ee962723 AL |
688 | }, |
689 | }; | |
690 | ||
691 | void __init orion_xor1_init(unsigned long mapbase_low, | |
692 | unsigned long mapbase_high, | |
693 | unsigned long irq_0, | |
694 | unsigned long irq_1) | |
695 | { | |
696 | orion_xor1_shared_resources[0].start = mapbase_low; | |
697 | orion_xor1_shared_resources[0].end = mapbase_low + 0xff; | |
698 | orion_xor1_shared_resources[1].start = mapbase_high; | |
699 | orion_xor1_shared_resources[1].end = mapbase_high + 0xff; | |
700 | ||
dd2c57b8 TP |
701 | orion_xor1_shared_resources[2].start = irq_0; |
702 | orion_xor1_shared_resources[2].end = irq_0; | |
703 | orion_xor1_shared_resources[3].start = irq_1; | |
704 | orion_xor1_shared_resources[3].end = irq_1; | |
ee962723 | 705 | |
e39f6ec1 TP |
706 | dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[0].cap_mask); |
707 | dma_cap_set(DMA_XOR, orion_xor1_channels_data[0].cap_mask); | |
ee962723 | 708 | |
e39f6ec1 TP |
709 | dma_cap_set(DMA_MEMCPY, orion_xor1_channels_data[1].cap_mask); |
710 | dma_cap_set(DMA_XOR, orion_xor1_channels_data[1].cap_mask); | |
dd2c57b8 TP |
711 | |
712 | platform_device_register(&orion_xor1_shared); | |
ee962723 | 713 | } |
4fcd3f37 AL |
714 | |
715 | /***************************************************************************** | |
716 | * EHCI | |
717 | ****************************************************************************/ | |
72053353 | 718 | static struct orion_ehci_data orion_ehci_data; |
4fcd3f37 AL |
719 | static u64 ehci_dmamask = DMA_BIT_MASK(32); |
720 | ||
721 | ||
722 | /***************************************************************************** | |
723 | * EHCI0 | |
724 | ****************************************************************************/ | |
725 | static struct resource orion_ehci_resources[2]; | |
726 | ||
727 | static struct platform_device orion_ehci = { | |
728 | .name = "orion-ehci", | |
729 | .id = 0, | |
730 | .dev = { | |
731 | .dma_mask = &ehci_dmamask, | |
732 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
733 | .platform_data = &orion_ehci_data, | |
734 | }, | |
735 | }; | |
736 | ||
db33f4de | 737 | void __init orion_ehci_init(unsigned long mapbase, |
72053353 AL |
738 | unsigned long irq, |
739 | enum orion_ehci_phy_ver phy_version) | |
4fcd3f37 | 740 | { |
72053353 | 741 | orion_ehci_data.phy_version = phy_version; |
93a753bd | 742 | fill_resources_irq(&orion_ehci, orion_ehci_resources, mapbase, SZ_4K - 1, |
4fcd3f37 AL |
743 | irq); |
744 | ||
745 | platform_device_register(&orion_ehci); | |
746 | } | |
747 | ||
748 | /***************************************************************************** | |
749 | * EHCI1 | |
750 | ****************************************************************************/ | |
751 | static struct resource orion_ehci_1_resources[2]; | |
752 | ||
753 | static struct platform_device orion_ehci_1 = { | |
754 | .name = "orion-ehci", | |
755 | .id = 1, | |
756 | .dev = { | |
757 | .dma_mask = &ehci_dmamask, | |
758 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
759 | .platform_data = &orion_ehci_data, | |
760 | }, | |
761 | }; | |
762 | ||
db33f4de | 763 | void __init orion_ehci_1_init(unsigned long mapbase, |
4fcd3f37 AL |
764 | unsigned long irq) |
765 | { | |
93a753bd | 766 | fill_resources_irq(&orion_ehci_1, orion_ehci_1_resources, |
4fcd3f37 AL |
767 | mapbase, SZ_4K - 1, irq); |
768 | ||
769 | platform_device_register(&orion_ehci_1); | |
770 | } | |
771 | ||
772 | /***************************************************************************** | |
773 | * EHCI2 | |
774 | ****************************************************************************/ | |
775 | static struct resource orion_ehci_2_resources[2]; | |
776 | ||
777 | static struct platform_device orion_ehci_2 = { | |
778 | .name = "orion-ehci", | |
779 | .id = 2, | |
780 | .dev = { | |
781 | .dma_mask = &ehci_dmamask, | |
782 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
783 | .platform_data = &orion_ehci_data, | |
784 | }, | |
785 | }; | |
786 | ||
db33f4de | 787 | void __init orion_ehci_2_init(unsigned long mapbase, |
4fcd3f37 AL |
788 | unsigned long irq) |
789 | { | |
93a753bd | 790 | fill_resources_irq(&orion_ehci_2, orion_ehci_2_resources, |
4fcd3f37 AL |
791 | mapbase, SZ_4K - 1, irq); |
792 | ||
793 | platform_device_register(&orion_ehci_2); | |
794 | } | |
9e613f8a AL |
795 | |
796 | /***************************************************************************** | |
797 | * SATA | |
798 | ****************************************************************************/ | |
799 | static struct resource orion_sata_resources[2] = { | |
800 | { | |
801 | .name = "sata base", | |
802 | }, { | |
803 | .name = "sata irq", | |
804 | }, | |
805 | }; | |
806 | ||
807 | static struct platform_device orion_sata = { | |
808 | .name = "sata_mv", | |
809 | .id = 0, | |
810 | .dev = { | |
811 | .coherent_dma_mask = DMA_BIT_MASK(32), | |
812 | }, | |
813 | }; | |
814 | ||
815 | void __init orion_sata_init(struct mv_sata_platform_data *sata_data, | |
9e613f8a AL |
816 | unsigned long mapbase, |
817 | unsigned long irq) | |
818 | { | |
9e613f8a | 819 | orion_sata.dev.platform_data = sata_data; |
93a753bd | 820 | fill_resources_irq(&orion_sata, orion_sata_resources, |
9e613f8a AL |
821 | mapbase, 0x5000 - 1, irq); |
822 | ||
823 | platform_device_register(&orion_sata); | |
824 | } | |
825 | ||
44350061 AL |
826 | /***************************************************************************** |
827 | * Cryptographic Engines and Security Accelerator (CESA) | |
828 | ****************************************************************************/ | |
829 | static struct resource orion_crypto_resources[] = { | |
830 | { | |
831 | .name = "regs", | |
832 | }, { | |
833 | .name = "crypto interrupt", | |
834 | }, { | |
835 | .name = "sram", | |
836 | .flags = IORESOURCE_MEM, | |
837 | }, | |
838 | }; | |
9e613f8a | 839 | |
44350061 AL |
840 | static struct platform_device orion_crypto = { |
841 | .name = "mv_crypto", | |
842 | .id = -1, | |
843 | }; | |
844 | ||
845 | void __init orion_crypto_init(unsigned long mapbase, | |
846 | unsigned long srambase, | |
847 | unsigned long sram_size, | |
848 | unsigned long irq) | |
849 | { | |
93a753bd | 850 | fill_resources_irq(&orion_crypto, orion_crypto_resources, |
44350061 AL |
851 | mapbase, 0xffff, irq); |
852 | orion_crypto.num_resources = 3; | |
853 | orion_crypto_resources[2].start = srambase; | |
854 | orion_crypto_resources[2].end = srambase + sram_size - 1; | |
855 | ||
856 | platform_device_register(&orion_crypto); | |
857 | } |