[linux-2.6-block.git] / arch / arm / plat-omap / sram.c

/*
 * linux/arch/arm/plat-omap/sram.c
 *
 * OMAP SRAM detection and management
 *
 * Copyright (C) 2005 Nokia Corporation
 * Written by Tony Lindgren <tony@atomide.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/config.h>
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/init.h>

#include <asm/tlb.h>
#include <asm/io.h>
#include <asm/cacheflush.h>

#include <asm/mach/map.h>

#include <asm/arch/sram.h>
#include <asm/arch/board.h>

#define OMAP1_SRAM_PA		0x20000000
#define OMAP1_SRAM_VA		0xd0000000
#define OMAP2_SRAM_PA		0x40200000
#define OMAP2_SRAM_PUB_PA	0x4020f800
#define OMAP2_SRAM_VA		0xd0000000
#define OMAP2_SRAM_PUB_VA	0xd0000800

#if defined(CONFIG_ARCH_OMAP24XX)
#define SRAM_BOOTLOADER_SZ	0x00
#else
#define SRAM_BOOTLOADER_SZ	0x80
#endif

#define VA_REQINFOPERM0		IO_ADDRESS(0x68005048)
#define VA_READPERM0		IO_ADDRESS(0x68005050)
#define VA_WRITEPERM0		IO_ADDRESS(0x68005058)
#define VA_CONTROL_STAT		IO_ADDRESS(0x480002F8)
#define GP_DEVICE		0x300
#define TYPE_MASK		0x700

#define ROUND_DOWN(value,boundary)	((value) & (~((boundary)-1)))

static unsigned long omap_sram_base;
static unsigned long omap_sram_size;
static unsigned long omap_sram_ceil;

unsigned long omap_fb_sram_start;
unsigned long omap_fb_sram_size;

/* Depending on the target RAMFS firewall setup, the public usable amount of
 * SRAM varies.  The default accessable size for all device types is 2k. A GP
 * device allows ARM11 but not other initators for full size. This
 * functionality seems ok until some nice security API happens.
 */
static int is_sram_locked(void)
{
	int type = 0;

	if (cpu_is_omap242x())
		type = __raw_readl(VA_CONTROL_STAT) & TYPE_MASK;

	if (type == GP_DEVICE) {
		/* RAMFW: R/W access to all initators for all qualifier sets */
		if (cpu_is_omap242x()) {
			__raw_writel(0xFF, VA_REQINFOPERM0); /* all q-vects */
			__raw_writel(0xCFDE, VA_READPERM0);  /* all i-read */
			__raw_writel(0xCFDE, VA_WRITEPERM0); /* all i-write */
		}
		return 0;
	} else
		return 1; /* assume locked with no PPA or security driver */
}

void get_fb_sram_conf(unsigned long start_avail, unsigned size_avail,
		      unsigned long *start, unsigned long *size)
{
	const struct omap_fbmem_config *fbmem_conf;

	fbmem_conf = omap_get_config(OMAP_TAG_FBMEM, struct omap_fbmem_config);
	if (fbmem_conf != NULL) {
		*start = fbmem_conf->fb_sram_start;
		*size = fbmem_conf->fb_sram_size;
	} else {
		*size = 0;
		*start = 0;
	}

	if (*size && (
	    *start < start_avail ||
	    *start + *size > start_avail + size_avail)) {
		printk(KERN_ERR "invalid FB SRAM configuration\n");
		*start = start_avail;
		*size = size_avail;
	}

	if (*size)
		pr_info("Reserving %lu bytes SRAM for frame buffer\n", *size);
}

/*
 * The amount of SRAM depends on the core type.
 * Note that we cannot try to test for SRAM here because writes
 * to secure SRAM will hang the system. Also the SRAM is not
 * yet mapped at this point.
 */
void __init omap_detect_sram(void)
{
	unsigned long sram_start;

	if (cpu_is_omap24xx()) {
		if (is_sram_locked()) {
			omap_sram_base = OMAP2_SRAM_PUB_VA;
			sram_start = OMAP2_SRAM_PUB_PA;
			omap_sram_size = 0x800; /* 2K */
		} else {
			omap_sram_base = OMAP2_SRAM_VA;
			sram_start = OMAP2_SRAM_PA;
			if (cpu_is_omap242x())
				omap_sram_size = 0xa0000; /* 640K */
			else if (cpu_is_omap243x())
				omap_sram_size = 0x10000; /* 64K */
		}
	} else {
		omap_sram_base = OMAP1_SRAM_VA;
		sram_start = OMAP1_SRAM_PA;

		if (cpu_is_omap730())
			omap_sram_size = 0x32000;	/* 200K */
		else if (cpu_is_omap15xx())
			omap_sram_size = 0x30000;	/* 192K */
		else if (cpu_is_omap1610() || cpu_is_omap1621() ||
		     cpu_is_omap1710())
			omap_sram_size = 0x4000;	/* 16K */
		else if (cpu_is_omap1611())
			omap_sram_size = 0x3e800;	/* 250K */
		else {
			printk(KERN_ERR "Could not detect SRAM size\n");
			omap_sram_size = 0x4000;
		}
	}
	get_fb_sram_conf(sram_start + SRAM_BOOTLOADER_SZ,
			 omap_sram_size - SRAM_BOOTLOADER_SZ,
			 &omap_fb_sram_start, &omap_fb_sram_size);
	if (omap_fb_sram_size)
		omap_sram_size -= sram_start + omap_sram_size -
				  omap_fb_sram_start;
	omap_sram_ceil = omap_sram_base + omap_sram_size;
}

static struct map_desc omap_sram_io_desc[] __initdata = {
	{	/* .length gets filled in at runtime */
		.virtual	= OMAP1_SRAM_VA,
		.pfn		= __phys_to_pfn(OMAP1_SRAM_PA),
		.type		= MT_DEVICE
	}
};

/*
 * In order to use last 2kB of SRAM on 1611b, we must round the size
 * up to multiple of PAGE_SIZE. We cannot use ioremap for SRAM, as
 * clock init needs SRAM early.
 */
void __init omap_map_sram(void)
{
	unsigned long base;

	if (omap_sram_size == 0)
		return;

	if (cpu_is_omap24xx()) {
		omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;

		if (is_sram_locked())
			base = OMAP2_SRAM_PUB_PA;
		else
			base = OMAP2_SRAM_PA;
		base = ROUND_DOWN(base, PAGE_SIZE);
		omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
	}

	omap_sram_io_desc[0].length = (omap_sram_size + PAGE_SIZE-1)/PAGE_SIZE;
	omap_sram_io_desc[0].length *= PAGE_SIZE;
	iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));

	printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n",
	__pfn_to_phys(omap_sram_io_desc[0].pfn),
	omap_sram_io_desc[0].virtual,
	       omap_sram_io_desc[0].length);

	/*
	 * Normally devicemaps_init() would flush caches and tlb after
	 * mdesc->map_io(), but since we're called from map_io(), we
	 * must do it here.
	 */
	local_flush_tlb_all();
	flush_cache_all();

	/*
	 * Looks like we need to preserve some bootloader code at the
	 * beginning of SRAM for jumping to flash for reboot to work...
	 */
	memset((void *)omap_sram_base + SRAM_BOOTLOADER_SZ, 0,
	       omap_sram_size - SRAM_BOOTLOADER_SZ);
}

void * omap_sram_push(void * start, unsigned long size)
{
	if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) {
		printk(KERN_ERR "Not enough space in SRAM\n");
		return NULL;
	}

	omap_sram_ceil -= size;
	omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *));
	memcpy((void *)omap_sram_ceil, start, size);

	return (void *)omap_sram_ceil;
}

static void omap_sram_error(void)
{
	panic("Uninitialized SRAM function\n");
}

#ifdef CONFIG_ARCH_OMAP1

static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);

void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
{
	if (!_omap_sram_reprogram_clock)
		omap_sram_error();

	return _omap_sram_reprogram_clock(dpllctl, ckctl);
}

int __init omap1_sram_init(void)
{
	_omap_sram_reprogram_clock = omap_sram_push(sram_reprogram_clock,
						    sram_reprogram_clock_sz);

	return 0;
}

#else
#define omap1_sram_init()	do {} while (0)
#endif

#ifdef CONFIG_ARCH_OMAP2

static void (*_omap2_sram_ddr_init)(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
			      u32 base_cs, u32 force_unlock);

void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
		   u32 base_cs, u32 force_unlock)
{
	if (!_omap2_sram_ddr_init)
		omap_sram_error();

	return _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
				    base_cs, force_unlock);
}

static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
					  u32 mem_type);

void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
{
	if (!_omap2_sram_reprogram_sdrc)
		omap_sram_error();

	return _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
}

static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);

u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
{
	if (!_omap2_set_prcm)
		omap_sram_error();

	return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
}

int __init omap2_sram_init(void)
{
	_omap2_sram_ddr_init = omap_sram_push(sram_ddr_init, sram_ddr_init_sz);

	_omap2_sram_reprogram_sdrc = omap_sram_push(sram_reprogram_sdrc,
						    sram_reprogram_sdrc_sz);
	_omap2_set_prcm = omap_sram_push(sram_set_prcm, sram_set_prcm_sz);

	return 0;
}
#else
#define omap2_sram_init()	do {} while (0)
#endif

int __init omap_sram_init(void)
{
	omap_detect_sram();
	omap_map_sram();

	if (!cpu_is_omap24xx())
		omap1_sram_init();
	else
		omap2_sram_init();

	return 0;
}
Commit	Line	Data
92105bb7 TL	1	/*
	2	* linux/arch/arm/plat-omap/sram.c
	3	*
	4	* OMAP SRAM detection and management
	5	*
	6	* Copyright (C) 2005 Nokia Corporation
	7	* Written by Tony Lindgren <tony@atomide.com>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/config.h>
	15	#include <linux/module.h>
	16	#include <linux/kernel.h>
	17	#include <linux/init.h>
	18
53d9cc73	19	#include <asm/tlb.h>
92105bb7 TL	20	#include <asm/io.h>
	21	#include <asm/cacheflush.h>
	22
670c104a TL	23	#include <asm/mach/map.h>
670c104a TL	24
1a8bfa1e	25	#include <asm/arch/sram.h>
670c104a	26	#include <asm/arch/board.h>
1a8bfa1e TL	27
	28	#define OMAP1_SRAM_PA 0x20000000
	29	#define OMAP1_SRAM_VA 0xd0000000
	30	#define OMAP2_SRAM_PA 0x40200000
670c104a	31	#define OMAP2_SRAM_PUB_PA 0x4020f800
1a8bfa1e	32	#define OMAP2_SRAM_VA 0xd0000000
670c104a	33	#define OMAP2_SRAM_PUB_VA 0xd0000800
92105bb7	34
670c104a TL	35	#if defined(CONFIG_ARCH_OMAP24XX)
	36	#define SRAM_BOOTLOADER_SZ 0x00
	37	#else
92105bb7	38	#define SRAM_BOOTLOADER_SZ 0x80
670c104a TL	39	#endif
	40
	41	#define VA_REQINFOPERM0 IO_ADDRESS(0x68005048)
	42	#define VA_READPERM0 IO_ADDRESS(0x68005050)
	43	#define VA_WRITEPERM0 IO_ADDRESS(0x68005058)
	44	#define VA_CONTROL_STAT IO_ADDRESS(0x480002F8)
	45	#define GP_DEVICE 0x300
	46	#define TYPE_MASK 0x700
	47
	48	#define ROUND_DOWN(value,boundary) ((value) & (~((boundary)-1)))
92105bb7 TL	49
	50	static unsigned long omap_sram_base;
	51	static unsigned long omap_sram_size;
	52	static unsigned long omap_sram_ceil;
	53
670c104a TL	54	unsigned long omap_fb_sram_start;
	55	unsigned long omap_fb_sram_size;
	56
	57	/* Depending on the target RAMFS firewall setup, the public usable amount of
	58	* SRAM varies. The default accessable size for all device types is 2k. A GP
	59	* device allows ARM11 but not other initators for full size. This
	60	* functionality seems ok until some nice security API happens.
	61	*/
	62	static int is_sram_locked(void)
	63	{
	64	int type = 0;
	65
	66	if (cpu_is_omap242x())
	67	type = __raw_readl(VA_CONTROL_STAT) & TYPE_MASK;
	68
	69	if (type == GP_DEVICE) {
	70	/* RAMFW: R/W access to all initators for all qualifier sets */
	71	if (cpu_is_omap242x()) {
	72	__raw_writel(0xFF, VA_REQINFOPERM0); /* all q-vects */
	73	__raw_writel(0xCFDE, VA_READPERM0); /* all i-read */
	74	__raw_writel(0xCFDE, VA_WRITEPERM0); /* all i-write */
	75	}
	76	return 0;
	77	} else
	78	return 1; /* assume locked with no PPA or security driver */
	79	}
	80
	81	void get_fb_sram_conf(unsigned long start_avail, unsigned size_avail,
	82	unsigned long start, unsigned long size)
	83	{
	84	const struct omap_fbmem_config *fbmem_conf;
	85
	86	fbmem_conf = omap_get_config(OMAP_TAG_FBMEM, struct omap_fbmem_config);
	87	if (fbmem_conf != NULL) {
	88	*start = fbmem_conf->fb_sram_start;
	89	*size = fbmem_conf->fb_sram_size;
	90	} else {
	91	*size = 0;
	92	*start = 0;
	93	}
	94
	95	if (*size && (
	96	*start < start_avail \|\|
	97	start + size > start_avail + size_avail)) {
	98	printk(KERN_ERR "invalid FB SRAM configuration\n");
	99	*start = start_avail;
	100	*size = size_avail;
	101	}
	102
	103	if (*size)
	104	pr_info("Reserving %lu bytes SRAM for frame buffer\n", *size);
	105	}
	106
92105bb7	107	/*
1a8bfa1e	108	* The amount of SRAM depends on the core type.
92105bb7 TL	109	* Note that we cannot try to test for SRAM here because writes
	110	* to secure SRAM will hang the system. Also the SRAM is not
	111	* yet mapped at this point.
	112	*/
	113	void __init omap_detect_sram(void)
	114	{
670c104a TL	115	unsigned long sram_start;
	116
	117	if (cpu_is_omap24xx()) {
	118	if (is_sram_locked()) {
	119	omap_sram_base = OMAP2_SRAM_PUB_VA;
	120	sram_start = OMAP2_SRAM_PUB_PA;
	121	omap_sram_size = 0x800; /* 2K */
	122	} else {
	123	omap_sram_base = OMAP2_SRAM_VA;
	124	sram_start = OMAP2_SRAM_PA;
	125	if (cpu_is_omap242x())
	126	omap_sram_size = 0xa0000; /* 640K */
	127	else if (cpu_is_omap243x())
	128	omap_sram_size = 0x10000; /* 64K */
	129	}
	130	} else {
1a8bfa1e	131	omap_sram_base = OMAP1_SRAM_VA;
670c104a TL	132	sram_start = OMAP1_SRAM_PA;
	133
	134	if (cpu_is_omap730())
	135	omap_sram_size = 0x32000; /* 200K */
	136	else if (cpu_is_omap15xx())
	137	omap_sram_size = 0x30000; /* 192K */
	138	else if (cpu_is_omap1610() \|\| cpu_is_omap1621() \|\|
	139	cpu_is_omap1710())
	140	omap_sram_size = 0x4000; /* 16K */
	141	else if (cpu_is_omap1611())
	142	omap_sram_size = 0x3e800; /* 250K */
	143	else {
	144	printk(KERN_ERR "Could not detect SRAM size\n");
	145	omap_sram_size = 0x4000;
	146	}
92105bb7	147	}
670c104a TL	148	get_fb_sram_conf(sram_start + SRAM_BOOTLOADER_SZ,
	149	omap_sram_size - SRAM_BOOTLOADER_SZ,
	150	&omap_fb_sram_start, &omap_fb_sram_size);
	151	if (omap_fb_sram_size)
	152	omap_sram_size -= sram_start + omap_sram_size -
	153	omap_fb_sram_start;
92105bb7 TL	154	omap_sram_ceil = omap_sram_base + omap_sram_size;
	155	}
	156
	157	static struct map_desc omap_sram_io_desc[] __initdata = {
9fe133b1	158	{ /* .length gets filled in at runtime */
1a8bfa1e TL	159	.virtual = OMAP1_SRAM_VA,
1a8bfa1e TL	160	.pfn = __phys_to_pfn(OMAP1_SRAM_PA),
9fe133b1 DS	161	.type = MT_DEVICE
9fe133b1 DS	162	}
92105bb7 TL	163	};
	164
	165	/*
	166	* In order to use last 2kB of SRAM on 1611b, we must round the size
	167	* up to multiple of PAGE_SIZE. We cannot use ioremap for SRAM, as
	168	* clock init needs SRAM early.
	169	*/
	170	void __init omap_map_sram(void)
	171	{
670c104a TL	172	unsigned long base;
670c104a TL	173
92105bb7 TL	174	if (omap_sram_size == 0)
	175	return;
	176
1a8bfa1e TL	177	if (cpu_is_omap24xx()) {
1a8bfa1e TL	178	omap_sram_io_desc[0].virtual = OMAP2_SRAM_VA;
670c104a TL	179
	180	if (is_sram_locked())
	181	base = OMAP2_SRAM_PUB_PA;
	182	else
	183	base = OMAP2_SRAM_PA;
	184	base = ROUND_DOWN(base, PAGE_SIZE);
	185	omap_sram_io_desc[0].pfn = __phys_to_pfn(base);
1a8bfa1e TL	186	}
1a8bfa1e TL	187
92105bb7 TL	188	omap_sram_io_desc[0].length = (omap_sram_size + PAGE_SIZE-1)/PAGE_SIZE;
	189	omap_sram_io_desc[0].length *= PAGE_SIZE;
	190	iotable_init(omap_sram_io_desc, ARRAY_SIZE(omap_sram_io_desc));
	191
1a8bfa1e	192	printk(KERN_INFO "SRAM: Mapped pa 0x%08lx to va 0x%08lx size: 0x%lx\n",
670c104a TL	193	__pfn_to_phys(omap_sram_io_desc[0].pfn),
670c104a TL	194	omap_sram_io_desc[0].virtual,
1a8bfa1e TL	195	omap_sram_io_desc[0].length);
1a8bfa1e TL	196
53d9cc73 TL	197	/*
	198	* Normally devicemaps_init() would flush caches and tlb after
	199	* mdesc->map_io(), but since we're called from map_io(), we
	200	* must do it here.
	201	*/
	202	local_flush_tlb_all();
	203	flush_cache_all();
	204
92105bb7 TL	205	/*
	206	* Looks like we need to preserve some bootloader code at the
	207	* beginning of SRAM for jumping to flash for reboot to work...
	208	*/
	209	memset((void *)omap_sram_base + SRAM_BOOTLOADER_SZ, 0,
	210	omap_sram_size - SRAM_BOOTLOADER_SZ);
	211	}
	212
92105bb7 TL	213	void * omap_sram_push(void * start, unsigned long size)
	214	{
	215	if (size > (omap_sram_ceil - (omap_sram_base + SRAM_BOOTLOADER_SZ))) {
	216	printk(KERN_ERR "Not enough space in SRAM\n");
	217	return NULL;
	218	}
670c104a	219
92105bb7	220	omap_sram_ceil -= size;
670c104a	221	omap_sram_ceil = ROUND_DOWN(omap_sram_ceil, sizeof(void *));
92105bb7 TL	222	memcpy((void *)omap_sram_ceil, start, size);
	223
	224	return (void *)omap_sram_ceil;
	225	}
	226
1a8bfa1e TL	227	static void omap_sram_error(void)
	228	{
	229	panic("Uninitialized SRAM function\n");
	230	}
	231
	232	#ifdef CONFIG_ARCH_OMAP1
	233
	234	static void (*_omap_sram_reprogram_clock)(u32 dpllctl, u32 ckctl);
	235
	236	void omap_sram_reprogram_clock(u32 dpllctl, u32 ckctl)
	237	{
	238	if (!_omap_sram_reprogram_clock)
	239	omap_sram_error();
	240
	241	return _omap_sram_reprogram_clock(dpllctl, ckctl);
	242	}
	243
	244	int __init omap1_sram_init(void)
92105bb7	245	{
92105bb7 TL	246	_omap_sram_reprogram_clock = omap_sram_push(sram_reprogram_clock,
92105bb7 TL	247	sram_reprogram_clock_sz);
1a8bfa1e TL	248
	249	return 0;
	250	}
	251
	252	#else
	253	#define omap1_sram_init() do {} while (0)
	254	#endif
	255
	256	#ifdef CONFIG_ARCH_OMAP2
	257
	258	static void (_omap2_sram_ddr_init)(u32 slow_dll_ctrl, u32 fast_dll_ctrl,
	259	u32 base_cs, u32 force_unlock);
	260
	261	void omap2_sram_ddr_init(u32 *slow_dll_ctrl, u32 fast_dll_ctrl,
	262	u32 base_cs, u32 force_unlock)
	263	{
	264	if (!_omap2_sram_ddr_init)
	265	omap_sram_error();
	266
	267	return _omap2_sram_ddr_init(slow_dll_ctrl, fast_dll_ctrl,
	268	base_cs, force_unlock);
	269	}
	270
	271	static void (*_omap2_sram_reprogram_sdrc)(u32 perf_level, u32 dll_val,
	272	u32 mem_type);
	273
	274	void omap2_sram_reprogram_sdrc(u32 perf_level, u32 dll_val, u32 mem_type)
	275	{
	276	if (!_omap2_sram_reprogram_sdrc)
	277	omap_sram_error();
	278
	279	return _omap2_sram_reprogram_sdrc(perf_level, dll_val, mem_type);
	280	}
	281
	282	static u32 (*_omap2_set_prcm)(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass);
	283
	284	u32 omap2_set_prcm(u32 dpll_ctrl_val, u32 sdrc_rfr_val, int bypass)
	285	{
	286	if (!_omap2_set_prcm)
	287	omap_sram_error();
	288
	289	return _omap2_set_prcm(dpll_ctrl_val, sdrc_rfr_val, bypass);
	290	}
	291
	292	int __init omap2_sram_init(void)
	293	{
	294	_omap2_sram_ddr_init = omap_sram_push(sram_ddr_init, sram_ddr_init_sz);
	295
	296	_omap2_sram_reprogram_sdrc = omap_sram_push(sram_reprogram_sdrc,
	297	sram_reprogram_sdrc_sz);
	298	_omap2_set_prcm = omap_sram_push(sram_set_prcm, sram_set_prcm_sz);
	299
	300	return 0;
	301	}
	302	#else
	303	#define omap2_sram_init() do {} while (0)
	304	#endif
	305
	306	int __init omap_sram_init(void)
	307	{
	308	omap_detect_sram();
	309	omap_map_sram();
	310
	311	if (!cpu_is_omap24xx())
312	omap1_sram_init();
313	else
314	omap2_sram_init();
315
316	return 0;
92105bb7	317	}