Commit | Line | Data |
---|---|---|
9ad5897c | 1 | /* |
a09e64fb | 2 | * arch/arm/plat-omap/include/mach/prcm.h |
b824efae TL |
3 | * |
4 | * Access definations for use in OMAP24XX clock and power management | |
9ad5897c TL |
5 | * |
6 | * Copyright (C) 2005 Texas Instruments, Inc. | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License as published by | |
10 | * the Free Software Foundation; either version 2 of the License, or | |
11 | * (at your option) any later version. | |
12 | * | |
13 | * This program is distributed in the hope that it will be useful, | |
14 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
15 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
16 | * GNU General Public License for more details. | |
17 | * | |
18 | * You should have received a copy of the GNU General Public License | |
19 | * along with this program; if not, write to the Free Software | |
20 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | |
21 | */ | |
22 | ||
fecb494b PW |
23 | #ifndef __ASM_ARM_ARCH_OMAP_PRCM_H |
24 | #define __ASM_ARM_ARCH_OMAP_PRCM_H | |
9ad5897c | 25 | |
b824efae | 26 | u32 omap_prcm_get_reset_sources(void); |
29b9a218 | 27 | void omap_prcm_arch_reset(char mode, const char *cmd); |
419cc97d RL |
28 | int omap2_cm_wait_idlest(void __iomem *reg, u32 mask, u8 idlest, |
29 | const char *name); | |
9ad5897c | 30 | |
c171a258 RN |
31 | #define START_PADCONF_SAVE 0x2 |
32 | #define PADCONF_SAVE_DONE 0x1 | |
9ad5897c | 33 | |
c171a258 RN |
34 | void omap3_prcm_save_context(void); |
35 | void omap3_prcm_restore_context(void); | |
9ad5897c | 36 | |
55ed9694 PW |
37 | u32 prm_read_mod_reg(s16 module, u16 idx); |
38 | void prm_write_mod_reg(u32 val, s16 module, u16 idx); | |
39 | u32 prm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); | |
40 | u32 prm_read_mod_bits_shift(s16 domain, s16 idx, u32 mask); | |
16b04012 BC |
41 | u32 omap4_prm_read_bits_shift(void __iomem *reg, u32 mask); |
42 | u32 omap4_prm_rmw_reg_bits(u32 mask, u32 bits, void __iomem *reg); | |
55ed9694 PW |
43 | u32 cm_read_mod_reg(s16 module, u16 idx); |
44 | void cm_write_mod_reg(u32 val, s16 module, u16 idx); | |
45 | u32 cm_rmw_mod_reg_bits(u32 mask, u32 bits, s16 module, s16 idx); | |
46 | ||
c171a258 | 47 | #endif |
9ad5897c TL |
48 | |
49 | ||
50 |