projects / linux-block.git / blame
| Commit | Line | Data |
|---|---|---|
| b612633b G |
1 | /* |
| 2 | * Driver for OMAP-UART controller. | |
| 3 | * Based on drivers/serial/8250.c | |
| 4 | * | |
| 5 | * Copyright (C) 2010 Texas Instruments. | |
| 6 | * | |
| 7 | * Authors: | |
| 8 | * Govindraj R <govindraj.raja@ti.com> | |
| 9 | * Thara Gopinath <thara@ti.com> | |
| 10 | * | |
| 11 | * This program is free software; you can redistribute it and/or modify | |
| 12 | * it under the terms of the GNU General Public License as published by | |
| 13 | * the Free Software Foundation; either version 2 of the License, or | |
| 14 | * (at your option) any later version. | |
| 15 | */ | |
| 16 | ||
| 17 | #ifndef __OMAP_SERIAL_H__ | |
| 18 | #define __OMAP_SERIAL_H__ | |
| 19 | ||
| 20 | #include <linux/serial_core.h> | |
| 21 | #include <linux/platform_device.h> | |
| 22 | ||
| b612633b G |
23 | #include <plat/mux.h> |
| 24 | ||
| 374b8cfd | 25 | #define DRIVER_NAME "omap_uart" |
| b612633b G |
26 | |
| 27 | /* | |
| 28 | * Use tty device name as ttyO, [O -> OMAP] | |
| 29 | * in bootargs we specify as console=ttyO0 if uart1 | |
| 30 | * is used as console uart. | |
| 31 | */ | |
| 32 | #define OMAP_SERIAL_NAME "ttyO" | |
| 33 | ||
| b612633b G |
34 | #define OMAP_MODE13X_SPEED 230400 |
| 35 | ||
| b612633b G |
36 | /* WER = 0x7F |
| 37 | * Enable module level wakeup in WER reg | |
| 38 | */ | |
| 39 | #define OMAP_UART_WER_MOD_WKUP 0X7F | |
| 40 | ||
| 41 | /* Enable XON/XOFF flow control on output */ | |
| 42 | #define OMAP_UART_SW_TX 0x04 | |
| 43 | ||
| 44 | /* Enable XON/XOFF flow control on input */ | |
| 45 | #define OMAP_UART_SW_RX 0x04 | |
| 46 | ||
| 47 | #define OMAP_UART_SYSC_RESET 0X07 | |
| 48 | #define OMAP_UART_TCR_TRIG 0X0F | |
| 49 | #define OMAP_UART_SW_CLR 0XF0 | |
| 50 | #define OMAP_UART_FIFO_CLR 0X06 | |
| 51 | ||
| 52 | #define OMAP_UART_DMA_CH_FREE -1 | |
| 53 | ||
| 54 | #define RX_TIMEOUT (3 * HZ) | |
| 55 | #define OMAP_MAX_HSUART_PORTS 4 | |
| 56 | ||
| 57 | #define MSR_SAVE_FLAGS UART_MSR_ANY_DELTA | |
| 58 | ||
| 59 | struct omap_uart_port_info { | |
| 60 | bool dma_enabled; /* To specify DMA Mode */ | |
| 61 | unsigned int uartclk; /* UART clock rate */ | |
| 62 | void __iomem *membase; /* ioremap cookie or NULL */ | |
| 63 | resource_size_t mapbase; /* resource base */ | |
| 64 | unsigned long irqflags; /* request_irq flags */ | |
| 65 | upf_t flags; /* UPF_* flags */ | |
| 66 | }; | |
| 67 | ||
| 68 | struct uart_omap_dma { | |
| 69 | u8 uart_dma_tx; | |
| 70 | u8 uart_dma_rx; | |
| 71 | int rx_dma_channel; | |
| 72 | int tx_dma_channel; | |
| 73 | dma_addr_t rx_buf_dma_phys; | |
| 74 | dma_addr_t tx_buf_dma_phys; | |
| 75 | unsigned int uart_base; | |
| 76 | /* | |
| 77 | * Buffer for rx dma.It is not required for tx because the buffer | |
| 78 | * comes from port structure. | |
| 79 | */ | |
| 80 | unsigned char *rx_buf; | |
| 81 | unsigned int prev_rx_dma_pos; | |
| 82 | int tx_buf_size; | |
| 83 | int tx_dma_used; | |
| 84 | int rx_dma_used; | |
| 85 | spinlock_t tx_lock; | |
| 86 | spinlock_t rx_lock; | |
| 87 | /* timer to poll activity on rx dma */ | |
| 88 | struct timer_list rx_timer; | |
| 89 | int rx_buf_size; | |
| 90 | int rx_timeout; | |
| 91 | }; | |
| 92 | ||
| 93 | struct uart_omap_port { | |
| 94 | struct uart_port port; | |
| 95 | struct uart_omap_dma uart_dma; | |
| 96 | struct platform_device *pdev; | |
| 97 | ||
| 98 | unsigned char ier; | |
| 99 | unsigned char lcr; | |
| 100 | unsigned char mcr; | |
| 101 | unsigned char fcr; | |
| 102 | unsigned char efr; | |
| 103 | ||
| 104 | int use_dma; | |
| 105 | /* | |
| 106 | * Some bits in registers are cleared on a read, so they must | |
| 107 | * be saved whenever the register is read but the bits will not | |
| 108 | * be immediately processed. | |
| 109 | */ | |
| 110 | unsigned int lsr_break_flag; | |
| 111 | unsigned char msr_saved_flags; | |
| 112 | char name[20]; | |
| 113 | unsigned long port_activity; | |
| 114 | }; | |
| 115 | ||
| 116 | #endif /* __OMAP_SERIAL_H__ */ |