Merge branch 'drm-nouveau-pony' of git://git.kernel.org/pub/scm/linux/kernel/git...
[linux-2.6-block.git] / arch / arm / plat-omap / clock.c
CommitLineData
1da177e4 1/*
b9158556 2 * linux/arch/arm/plat-omap/clock.c
1da177e4 3 *
137b3ee2 4 * Copyright (C) 2004 - 2008 Nokia corporation
1da177e4
LT
5 * Written by Tuukka Tikkanen <tuukka.tikkanen@elektrobit.com>
6 *
1a8bfa1e
TL
7 * Modified for omap shared clock framework by Tony Lindgren <tony@atomide.com>
8 *
1da177e4
LT
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
12 */
1da177e4 13#include <linux/kernel.h>
1a8bfa1e
TL
14#include <linux/init.h>
15#include <linux/module.h>
1da177e4
LT
16#include <linux/list.h>
17#include <linux/errno.h>
18#include <linux/err.h>
4e57b681 19#include <linux/string.h>
f8ce2547 20#include <linux/clk.h>
00431707 21#include <linux/mutex.h>
b824efae 22#include <linux/platform_device.h>
b851cb28 23#include <linux/cpufreq.h>
137b3ee2 24#include <linux/debugfs.h>
fced80c7 25#include <linux/io.h>
1da177e4 26
ce491cf8 27#include <plat/clock.h>
1da177e4 28
7df3450e 29static LIST_HEAD(clocks);
00431707 30static DEFINE_MUTEX(clocks_mutex);
7df3450e 31static DEFINE_SPINLOCK(clockfw_lock);
1da177e4 32
1a8bfa1e 33static struct clk_functions *arch_clock;
1da177e4 34
1a8bfa1e 35/*-------------------------------------------------------------------------
f07adc59 36 * Standard clock functions defined in include/linux/clk.h
1a8bfa1e 37 *-------------------------------------------------------------------------*/
1da177e4 38
74830385
SS
39/* This functions is moved to arch/arm/common/clkdev.c. For OMAP4 since
40 * clock framework is not up , it is defined here to avoid rework in
41 * every driver. Also dummy prcm reset function is added */
42
43/* Dummy hooks only for OMAP4.For rest OMAPs, common clkdev is used */
44#if defined(CONFIG_ARCH_OMAP4)
45struct clk *clk_get(struct device *dev, const char *id)
46{
47 return NULL;
48}
49EXPORT_SYMBOL(clk_get);
50
51void clk_put(struct clk *clk)
52{
53}
54EXPORT_SYMBOL(clk_put);
55
56void omap2_clk_prepare_for_reboot(void)
57{
58}
59EXPORT_SYMBOL(omap2_clk_prepare_for_reboot);
60
61void omap_prcm_arch_reset(char mode)
62{
63}
64EXPORT_SYMBOL(omap_prcm_arch_reset);
65#endif
1da177e4
LT
66int clk_enable(struct clk *clk)
67{
68 unsigned long flags;
1a8bfa1e 69 int ret = 0;
74830385
SS
70 if (cpu_is_omap44xx())
71 /* OMAP4 clk framework not supported yet */
72 return 0;
1da177e4 73
b824efae
TL
74 if (clk == NULL || IS_ERR(clk))
75 return -EINVAL;
76
1da177e4 77 spin_lock_irqsave(&clockfw_lock, flags);
f07adc59 78 if (arch_clock->clk_enable)
1a8bfa1e 79 ret = arch_clock->clk_enable(clk);
1da177e4 80 spin_unlock_irqrestore(&clockfw_lock, flags);
1a8bfa1e 81
1da177e4
LT
82 return ret;
83}
84EXPORT_SYMBOL(clk_enable);
85
1da177e4
LT
86void clk_disable(struct clk *clk)
87{
88 unsigned long flags;
89
b824efae
TL
90 if (clk == NULL || IS_ERR(clk))
91 return;
92
1da177e4 93 spin_lock_irqsave(&clockfw_lock, flags);
7cf95774
TL
94 if (clk->usecount == 0) {
95 printk(KERN_ERR "Trying disable clock %s with 0 usecount\n",
96 clk->name);
97 WARN_ON(1);
98 goto out;
99 }
100
f07adc59 101 if (arch_clock->clk_disable)
1a8bfa1e 102 arch_clock->clk_disable(clk);
7cf95774
TL
103
104out:
1da177e4
LT
105 spin_unlock_irqrestore(&clockfw_lock, flags);
106}
107EXPORT_SYMBOL(clk_disable);
108
1a8bfa1e 109unsigned long clk_get_rate(struct clk *clk)
1da177e4 110{
1a8bfa1e
TL
111 unsigned long flags;
112 unsigned long ret = 0;
1da177e4 113
b824efae
TL
114 if (clk == NULL || IS_ERR(clk))
115 return 0;
116
1a8bfa1e
TL
117 spin_lock_irqsave(&clockfw_lock, flags);
118 ret = clk->rate;
119 spin_unlock_irqrestore(&clockfw_lock, flags);
1da177e4 120
1a8bfa1e 121 return ret;
1da177e4 122}
1a8bfa1e 123EXPORT_SYMBOL(clk_get_rate);
1da177e4 124
1a8bfa1e 125/*-------------------------------------------------------------------------
f07adc59 126 * Optional clock functions defined in include/linux/clk.h
1a8bfa1e 127 *-------------------------------------------------------------------------*/
bb13b5fd 128
1da177e4
LT
129long clk_round_rate(struct clk *clk, unsigned long rate)
130{
1a8bfa1e
TL
131 unsigned long flags;
132 long ret = 0;
1da177e4 133
b824efae
TL
134 if (clk == NULL || IS_ERR(clk))
135 return ret;
136
1a8bfa1e
TL
137 spin_lock_irqsave(&clockfw_lock, flags);
138 if (arch_clock->clk_round_rate)
139 ret = arch_clock->clk_round_rate(clk, rate);
140 spin_unlock_irqrestore(&clockfw_lock, flags);
1da177e4 141
1a8bfa1e 142 return ret;
1da177e4
LT
143}
144EXPORT_SYMBOL(clk_round_rate);
145
1a8bfa1e 146int clk_set_rate(struct clk *clk, unsigned long rate)
1da177e4 147{
1a8bfa1e 148 unsigned long flags;
b824efae
TL
149 int ret = -EINVAL;
150
151 if (clk == NULL || IS_ERR(clk))
152 return ret;
bb13b5fd 153
1a8bfa1e
TL
154 spin_lock_irqsave(&clockfw_lock, flags);
155 if (arch_clock->clk_set_rate)
156 ret = arch_clock->clk_set_rate(clk, rate);
b5088c0d
RK
157 if (ret == 0) {
158 if (clk->recalc)
8b9dbc16 159 clk->rate = clk->recalc(clk);
3f0a820c 160 propagate_rate(clk);
b5088c0d 161 }
1a8bfa1e 162 spin_unlock_irqrestore(&clockfw_lock, flags);
1da177e4 163
1a8bfa1e 164 return ret;
1da177e4 165}
1a8bfa1e 166EXPORT_SYMBOL(clk_set_rate);
1da177e4 167
1a8bfa1e 168int clk_set_parent(struct clk *clk, struct clk *parent)
1da177e4 169{
1a8bfa1e 170 unsigned long flags;
b824efae
TL
171 int ret = -EINVAL;
172
74830385
SS
173 if (cpu_is_omap44xx())
174 /* OMAP4 clk framework not supported yet */
175 return 0;
b824efae
TL
176 if (clk == NULL || IS_ERR(clk) || parent == NULL || IS_ERR(parent))
177 return ret;
1da177e4 178
1a8bfa1e 179 spin_lock_irqsave(&clockfw_lock, flags);
4da37821
RK
180 if (clk->usecount == 0) {
181 if (arch_clock->clk_set_parent)
182 ret = arch_clock->clk_set_parent(clk, parent);
183 if (ret == 0) {
184 if (clk->recalc)
185 clk->rate = clk->recalc(clk);
186 propagate_rate(clk);
187 }
188 } else
189 ret = -EBUSY;
1a8bfa1e 190 spin_unlock_irqrestore(&clockfw_lock, flags);
1da177e4 191
1a8bfa1e 192 return ret;
1da177e4 193}
1a8bfa1e 194EXPORT_SYMBOL(clk_set_parent);
1da177e4 195
1a8bfa1e 196struct clk *clk_get_parent(struct clk *clk)
1da177e4 197{
2e777bf1 198 return clk->parent;
1da177e4 199}
1a8bfa1e 200EXPORT_SYMBOL(clk_get_parent);
1da177e4 201
1a8bfa1e
TL
202/*-------------------------------------------------------------------------
203 * OMAP specific clock functions shared between omap1 and omap2
204 *-------------------------------------------------------------------------*/
1da177e4 205
1a8bfa1e 206unsigned int __initdata mpurate;
1da177e4 207
1a8bfa1e
TL
208/*
209 * By default we use the rate set by the bootloader.
210 * You can override this with mpurate= cmdline option.
211 */
212static int __init omap_clk_setup(char *str)
1da177e4 213{
1a8bfa1e 214 get_option(&str, &mpurate);
1da177e4 215
1a8bfa1e
TL
216 if (!mpurate)
217 return 1;
1da177e4 218
1a8bfa1e
TL
219 if (mpurate < 1000)
220 mpurate *= 1000000;
1da177e4 221
1a8bfa1e 222 return 1;
1da177e4 223}
1a8bfa1e 224__setup("mpurate=", omap_clk_setup);
1da177e4 225
1a8bfa1e 226/* Used for clocks that always have same value as the parent clock */
8b9dbc16 227unsigned long followparent_recalc(struct clk *clk)
1da177e4 228{
8b9dbc16 229 return clk->parent->rate;
1da177e4
LT
230}
231
3f0a820c
RK
232void clk_reparent(struct clk *child, struct clk *parent)
233{
234 list_del_init(&child->sibling);
235 if (parent)
236 list_add(&child->sibling, &parent->children);
237 child->parent = parent;
238
239 /* now do the debugfs renaming to reattach the child
240 to the proper parent */
241}
242
1a8bfa1e
TL
243/* Propagate rate to children */
244void propagate_rate(struct clk * tclk)
1da177e4 245{
1a8bfa1e 246 struct clk *clkp;
1da177e4 247
3f0a820c 248 list_for_each_entry(clkp, &tclk->children, sibling) {
9a5fedac 249 if (clkp->recalc)
8b9dbc16 250 clkp->rate = clkp->recalc(clkp);
3f0a820c 251 propagate_rate(clkp);
1a8bfa1e 252 }
1da177e4
LT
253}
254
3f0a820c
RK
255static LIST_HEAD(root_clks);
256
6b8858a9
PW
257/**
258 * recalculate_root_clocks - recalculate and propagate all root clocks
259 *
260 * Recalculates all root clocks (clocks with no parent), which if the
261 * clock's .recalc is set correctly, should also propagate their rates.
262 * Called at init.
263 */
264void recalculate_root_clocks(void)
265{
266 struct clk *clkp;
267
3f0a820c
RK
268 list_for_each_entry(clkp, &root_clks, sibling) {
269 if (clkp->recalc)
8b9dbc16 270 clkp->rate = clkp->recalc(clkp);
3f0a820c 271 propagate_rate(clkp);
6b8858a9
PW
272 }
273}
274
c8088112 275/**
79716870 276 * clk_preinit - initialize any fields in the struct clk before clk init
c8088112
PW
277 * @clk: struct clk * to initialize
278 *
279 * Initialize any struct clk fields needed before normal clk initialization
280 * can run. No return value.
281 */
79716870 282void clk_preinit(struct clk *clk)
3f0a820c
RK
283{
284 INIT_LIST_HEAD(&clk->children);
285}
286
1da177e4
LT
287int clk_register(struct clk *clk)
288{
b824efae
TL
289 if (clk == NULL || IS_ERR(clk))
290 return -EINVAL;
291
dbb674d5
RK
292 /*
293 * trap out already registered clocks
294 */
295 if (clk->node.next || clk->node.prev)
296 return 0;
297
00431707 298 mutex_lock(&clocks_mutex);
3f0a820c
RK
299 if (clk->parent)
300 list_add(&clk->sibling, &clk->parent->children);
301 else
302 list_add(&clk->sibling, &root_clks);
303
1da177e4
LT
304 list_add(&clk->node, &clocks);
305 if (clk->init)
306 clk->init(clk);
00431707 307 mutex_unlock(&clocks_mutex);
1a8bfa1e 308
1da177e4
LT
309 return 0;
310}
311EXPORT_SYMBOL(clk_register);
312
313void clk_unregister(struct clk *clk)
314{
b824efae
TL
315 if (clk == NULL || IS_ERR(clk))
316 return;
317
00431707 318 mutex_lock(&clocks_mutex);
3f0a820c 319 list_del(&clk->sibling);
1da177e4 320 list_del(&clk->node);
00431707 321 mutex_unlock(&clocks_mutex);
1da177e4
LT
322}
323EXPORT_SYMBOL(clk_unregister);
324
6b8858a9
PW
325void clk_enable_init_clocks(void)
326{
327 struct clk *clkp;
328
329 list_for_each_entry(clkp, &clocks, node) {
330 if (clkp->flags & ENABLE_ON_INIT)
331 clk_enable(clkp);
332 }
333}
334EXPORT_SYMBOL(clk_enable_init_clocks);
335
897dcded
RK
336/*
337 * Low level helpers
338 */
339static int clkll_enable_null(struct clk *clk)
340{
341 return 0;
342}
343
344static void clkll_disable_null(struct clk *clk)
345{
346}
347
348const struct clkops clkops_null = {
349 .enable = clkll_enable_null,
350 .disable = clkll_disable_null,
351};
352
6b8858a9
PW
353#ifdef CONFIG_CPU_FREQ
354void clk_init_cpufreq_table(struct cpufreq_frequency_table **table)
355{
356 unsigned long flags;
357
358 spin_lock_irqsave(&clockfw_lock, flags);
359 if (arch_clock->clk_init_cpufreq_table)
360 arch_clock->clk_init_cpufreq_table(table);
361 spin_unlock_irqrestore(&clockfw_lock, flags);
362}
363EXPORT_SYMBOL(clk_init_cpufreq_table);
364#endif
365
1a8bfa1e 366/*-------------------------------------------------------------------------*/
bb13b5fd 367
90afd5cb
TL
368#ifdef CONFIG_OMAP_RESET_CLOCKS
369/*
370 * Disable any unused clocks left on by the bootloader
371 */
372static int __init clk_disable_unused(void)
373{
374 struct clk *ck;
375 unsigned long flags;
376
377 list_for_each_entry(ck, &clocks, node) {
897dcded
RK
378 if (ck->ops == &clkops_null)
379 continue;
380
381 if (ck->usecount > 0 || ck->enable_reg == 0)
90afd5cb
TL
382 continue;
383
384 spin_lock_irqsave(&clockfw_lock, flags);
385 if (arch_clock->clk_disable_unused)
386 arch_clock->clk_disable_unused(ck);
387 spin_unlock_irqrestore(&clockfw_lock, flags);
388 }
389
390 return 0;
391}
392late_initcall(clk_disable_unused);
393#endif
394
1a8bfa1e 395int __init clk_init(struct clk_functions * custom_clocks)
bb13b5fd 396{
1a8bfa1e
TL
397 if (!custom_clocks) {
398 printk(KERN_ERR "No custom clock functions registered\n");
399 BUG();
bb13b5fd
TL
400 }
401
1a8bfa1e
TL
402 arch_clock = custom_clocks;
403
bb13b5fd
TL
404 return 0;
405}
6b8858a9 406
137b3ee2
HD
407#if defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS)
408/*
409 * debugfs support to trace clock tree hierarchy and attributes
410 */
411static struct dentry *clk_debugfs_root;
412
413static int clk_debugfs_register_one(struct clk *c)
414{
415 int err;
416 struct dentry *d, *child;
417 struct clk *pa = c->parent;
418 char s[255];
419 char *p = s;
420
421 p += sprintf(p, "%s", c->name);
422 if (c->id != 0)
423 sprintf(p, ":%d", c->id);
424 d = debugfs_create_dir(s, pa ? pa->dent : clk_debugfs_root);
e621f266
Z
425 if (!d)
426 return -ENOMEM;
137b3ee2
HD
427 c->dent = d;
428
429 d = debugfs_create_u8("usecount", S_IRUGO, c->dent, (u8 *)&c->usecount);
e621f266
Z
430 if (!d) {
431 err = -ENOMEM;
137b3ee2
HD
432 goto err_out;
433 }
434 d = debugfs_create_u32("rate", S_IRUGO, c->dent, (u32 *)&c->rate);
e621f266
Z
435 if (!d) {
436 err = -ENOMEM;
137b3ee2
HD
437 goto err_out;
438 }
439 d = debugfs_create_x32("flags", S_IRUGO, c->dent, (u32 *)&c->flags);
e621f266
Z
440 if (!d) {
441 err = -ENOMEM;
137b3ee2
HD
442 goto err_out;
443 }
444 return 0;
445
446err_out:
447 d = c->dent;
448 list_for_each_entry(child, &d->d_subdirs, d_u.d_child)
449 debugfs_remove(child);
450 debugfs_remove(c->dent);
451 return err;
452}
453
454static int clk_debugfs_register(struct clk *c)
455{
456 int err;
457 struct clk *pa = c->parent;
458
459 if (pa && !pa->dent) {
460 err = clk_debugfs_register(pa);
461 if (err)
462 return err;
463 }
464
465 if (!c->dent) {
466 err = clk_debugfs_register_one(c);
467 if (err)
468 return err;
469 }
470 return 0;
471}
472
473static int __init clk_debugfs_init(void)
474{
475 struct clk *c;
476 struct dentry *d;
477 int err;
478
479 d = debugfs_create_dir("clock", NULL);
e621f266
Z
480 if (!d)
481 return -ENOMEM;
137b3ee2
HD
482 clk_debugfs_root = d;
483
484 list_for_each_entry(c, &clocks, node) {
485 err = clk_debugfs_register(c);
486 if (err)
487 goto err_out;
488 }
489 return 0;
490err_out:
ca4caa4e 491 debugfs_remove_recursive(clk_debugfs_root);
137b3ee2
HD
492 return err;
493}
494late_initcall(clk_debugfs_init);
495
496#endif /* defined(CONFIG_PM_DEBUG) && defined(CONFIG_DEBUG_FS) */