Commit | Line | Data |
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1da177e4 LT |
1 | /** |
2 | * @file common.c | |
3 | * | |
4 | * @remark Copyright 2004 Oprofile Authors | |
8c1fc96f | 5 | * @remark Copyright 2010 ARM Ltd. |
1da177e4 LT |
6 | * @remark Read the file COPYING |
7 | * | |
8 | * @author Zwane Mwaikambo | |
8c1fc96f | 9 | * @author Will Deacon [move to perf] |
1da177e4 LT |
10 | */ |
11 | ||
8c1fc96f | 12 | #include <linux/cpumask.h> |
d1e86d64 | 13 | #include <linux/err.h> |
8c1fc96f | 14 | #include <linux/errno.h> |
1da177e4 | 15 | #include <linux/init.h> |
8c1fc96f | 16 | #include <linux/mutex.h> |
1da177e4 | 17 | #include <linux/oprofile.h> |
8c1fc96f | 18 | #include <linux/perf_event.h> |
d1e86d64 | 19 | #include <linux/platform_device.h> |
ae92dc9f | 20 | #include <linux/slab.h> |
8c1fc96f WD |
21 | #include <asm/stacktrace.h> |
22 | #include <linux/uaccess.h> | |
23 | ||
24 | #include <asm/perf_event.h> | |
25 | #include <asm/ptrace.h> | |
1da177e4 | 26 | |
8c1fc96f WD |
27 | #ifdef CONFIG_HW_PERF_EVENTS |
28 | /* | |
29 | * Per performance monitor configuration as set via oprofilefs. | |
30 | */ | |
31 | struct op_counter_config { | |
32 | unsigned long count; | |
33 | unsigned long enabled; | |
34 | unsigned long event; | |
35 | unsigned long unit_mask; | |
36 | unsigned long kernel; | |
37 | unsigned long user; | |
38 | struct perf_event_attr attr; | |
39 | }; | |
1da177e4 | 40 | |
55f05234 | 41 | static int op_arm_enabled; |
93ad7949 | 42 | static DEFINE_MUTEX(op_arm_mutex); |
1da177e4 | 43 | |
8c1fc96f WD |
44 | static struct op_counter_config *counter_config; |
45 | static struct perf_event **perf_events[nr_cpumask_bits]; | |
46 | static int perf_num_counters; | |
47 | ||
48 | /* | |
49 | * Overflow callback for oprofile. | |
50 | */ | |
51 | static void op_overflow_handler(struct perf_event *event, int unused, | |
52 | struct perf_sample_data *data, struct pt_regs *regs) | |
53 | { | |
54 | int id; | |
55 | u32 cpu = smp_processor_id(); | |
56 | ||
57 | for (id = 0; id < perf_num_counters; ++id) | |
58 | if (perf_events[cpu][id] == event) | |
59 | break; | |
60 | ||
61 | if (id != perf_num_counters) | |
62 | oprofile_add_sample(regs, id); | |
63 | else | |
64 | pr_warning("oprofile: ignoring spurious overflow " | |
65 | "on cpu %u\n", cpu); | |
66 | } | |
67 | ||
68 | /* | |
69 | * Called by op_arm_setup to create perf attributes to mirror the oprofile | |
70 | * settings in counter_config. Attributes are created as `pinned' events and | |
71 | * so are permanently scheduled on the PMU. | |
72 | */ | |
73 | static void op_perf_setup(void) | |
74 | { | |
75 | int i; | |
76 | u32 size = sizeof(struct perf_event_attr); | |
77 | struct perf_event_attr *attr; | |
78 | ||
79 | for (i = 0; i < perf_num_counters; ++i) { | |
80 | attr = &counter_config[i].attr; | |
81 | memset(attr, 0, size); | |
82 | attr->type = PERF_TYPE_RAW; | |
83 | attr->size = size; | |
84 | attr->config = counter_config[i].event; | |
85 | attr->sample_period = counter_config[i].count; | |
86 | attr->pinned = 1; | |
87 | } | |
88 | } | |
89 | ||
90 | static int op_create_counter(int cpu, int event) | |
91 | { | |
92 | int ret = 0; | |
93 | struct perf_event *pevent; | |
94 | ||
95 | if (!counter_config[event].enabled || (perf_events[cpu][event] != NULL)) | |
96 | return ret; | |
97 | ||
98 | pevent = perf_event_create_kernel_counter(&counter_config[event].attr, | |
99 | cpu, -1, | |
100 | op_overflow_handler); | |
101 | ||
102 | if (IS_ERR(pevent)) { | |
103 | ret = PTR_ERR(pevent); | |
104 | } else if (pevent->state != PERF_EVENT_STATE_ACTIVE) { | |
105 | pr_warning("oprofile: failed to enable event %d " | |
106 | "on CPU %d\n", event, cpu); | |
107 | ret = -EBUSY; | |
108 | } else { | |
109 | perf_events[cpu][event] = pevent; | |
110 | } | |
111 | ||
112 | return ret; | |
113 | } | |
114 | ||
115 | static void op_destroy_counter(int cpu, int event) | |
116 | { | |
117 | struct perf_event *pevent = perf_events[cpu][event]; | |
118 | ||
119 | if (pevent) { | |
120 | perf_event_release_kernel(pevent); | |
121 | perf_events[cpu][event] = NULL; | |
122 | } | |
123 | } | |
124 | ||
125 | /* | |
126 | * Called by op_arm_start to create active perf events based on the | |
127 | * perviously configured attributes. | |
128 | */ | |
129 | static int op_perf_start(void) | |
130 | { | |
131 | int cpu, event, ret = 0; | |
132 | ||
133 | for_each_online_cpu(cpu) { | |
134 | for (event = 0; event < perf_num_counters; ++event) { | |
135 | ret = op_create_counter(cpu, event); | |
136 | if (ret) | |
137 | goto out; | |
138 | } | |
139 | } | |
140 | ||
141 | out: | |
142 | return ret; | |
143 | } | |
144 | ||
145 | /* | |
146 | * Called by op_arm_stop at the end of a profiling run. | |
147 | */ | |
148 | static void op_perf_stop(void) | |
149 | { | |
150 | int cpu, event; | |
151 | ||
152 | for_each_online_cpu(cpu) | |
153 | for (event = 0; event < perf_num_counters; ++event) | |
154 | op_destroy_counter(cpu, event); | |
155 | } | |
156 | ||
157 | ||
158 | static char *op_name_from_perf_id(enum arm_perf_pmu_ids id) | |
159 | { | |
160 | switch (id) { | |
161 | case ARM_PERF_PMU_ID_XSCALE1: | |
162 | return "arm/xscale1"; | |
163 | case ARM_PERF_PMU_ID_XSCALE2: | |
164 | return "arm/xscale2"; | |
165 | case ARM_PERF_PMU_ID_V6: | |
166 | return "arm/armv6"; | |
167 | case ARM_PERF_PMU_ID_V6MP: | |
168 | return "arm/mpcore"; | |
169 | case ARM_PERF_PMU_ID_CA8: | |
170 | return "arm/armv7"; | |
171 | case ARM_PERF_PMU_ID_CA9: | |
172 | return "arm/armv7-ca9"; | |
173 | default: | |
174 | return NULL; | |
175 | } | |
176 | } | |
1da177e4 | 177 | |
55f05234 | 178 | static int op_arm_create_files(struct super_block *sb, struct dentry *root) |
1da177e4 LT |
179 | { |
180 | unsigned int i; | |
181 | ||
8c1fc96f | 182 | for (i = 0; i < perf_num_counters; i++) { |
1da177e4 | 183 | struct dentry *dir; |
ae92dc9f | 184 | char buf[4]; |
1da177e4 LT |
185 | |
186 | snprintf(buf, sizeof buf, "%d", i); | |
187 | dir = oprofilefs_mkdir(sb, root, buf); | |
188 | oprofilefs_create_ulong(sb, dir, "enabled", &counter_config[i].enabled); | |
189 | oprofilefs_create_ulong(sb, dir, "event", &counter_config[i].event); | |
190 | oprofilefs_create_ulong(sb, dir, "count", &counter_config[i].count); | |
191 | oprofilefs_create_ulong(sb, dir, "unit_mask", &counter_config[i].unit_mask); | |
192 | oprofilefs_create_ulong(sb, dir, "kernel", &counter_config[i].kernel); | |
193 | oprofilefs_create_ulong(sb, dir, "user", &counter_config[i].user); | |
194 | } | |
195 | ||
196 | return 0; | |
197 | } | |
198 | ||
55f05234 | 199 | static int op_arm_setup(void) |
1da177e4 | 200 | { |
1da177e4 | 201 | spin_lock(&oprofilefs_lock); |
8c1fc96f | 202 | op_perf_setup(); |
1da177e4 | 203 | spin_unlock(&oprofilefs_lock); |
8c1fc96f | 204 | return 0; |
1da177e4 LT |
205 | } |
206 | ||
55f05234 | 207 | static int op_arm_start(void) |
1da177e4 LT |
208 | { |
209 | int ret = -EBUSY; | |
210 | ||
93ad7949 | 211 | mutex_lock(&op_arm_mutex); |
55f05234 | 212 | if (!op_arm_enabled) { |
8c1fc96f WD |
213 | ret = 0; |
214 | op_perf_start(); | |
215 | op_arm_enabled = 1; | |
1da177e4 | 216 | } |
93ad7949 | 217 | mutex_unlock(&op_arm_mutex); |
1da177e4 LT |
218 | return ret; |
219 | } | |
220 | ||
55f05234 | 221 | static void op_arm_stop(void) |
1da177e4 | 222 | { |
93ad7949 | 223 | mutex_lock(&op_arm_mutex); |
55f05234 | 224 | if (op_arm_enabled) |
8c1fc96f | 225 | op_perf_stop(); |
55f05234 | 226 | op_arm_enabled = 0; |
93ad7949 | 227 | mutex_unlock(&op_arm_mutex); |
1da177e4 LT |
228 | } |
229 | ||
b5893c56 | 230 | #ifdef CONFIG_PM |
d1e86d64 | 231 | static int op_arm_suspend(struct platform_device *dev, pm_message_t state) |
b5893c56 | 232 | { |
93ad7949 | 233 | mutex_lock(&op_arm_mutex); |
55f05234 | 234 | if (op_arm_enabled) |
8c1fc96f | 235 | op_perf_stop(); |
93ad7949 | 236 | mutex_unlock(&op_arm_mutex); |
b5893c56 RK |
237 | return 0; |
238 | } | |
239 | ||
d1e86d64 | 240 | static int op_arm_resume(struct platform_device *dev) |
b5893c56 | 241 | { |
93ad7949 | 242 | mutex_lock(&op_arm_mutex); |
8c1fc96f | 243 | if (op_arm_enabled && op_perf_start()) |
55f05234 | 244 | op_arm_enabled = 0; |
93ad7949 | 245 | mutex_unlock(&op_arm_mutex); |
b5893c56 RK |
246 | return 0; |
247 | } | |
248 | ||
d1e86d64 WD |
249 | static struct platform_driver oprofile_driver = { |
250 | .driver = { | |
251 | .name = "arm-oprofile", | |
252 | }, | |
55f05234 RK |
253 | .resume = op_arm_resume, |
254 | .suspend = op_arm_suspend, | |
b5893c56 RK |
255 | }; |
256 | ||
d1e86d64 | 257 | static struct platform_device *oprofile_pdev; |
b5893c56 RK |
258 | |
259 | static int __init init_driverfs(void) | |
260 | { | |
261 | int ret; | |
262 | ||
d1e86d64 WD |
263 | ret = platform_driver_register(&oprofile_driver); |
264 | if (ret) | |
265 | goto out; | |
266 | ||
267 | oprofile_pdev = platform_device_register_simple( | |
268 | oprofile_driver.driver.name, 0, NULL, 0); | |
269 | if (IS_ERR(oprofile_pdev)) { | |
270 | ret = PTR_ERR(oprofile_pdev); | |
271 | platform_driver_unregister(&oprofile_driver); | |
272 | } | |
b5893c56 | 273 | |
d1e86d64 | 274 | out: |
b5893c56 RK |
275 | return ret; |
276 | } | |
277 | ||
278 | static void exit_driverfs(void) | |
279 | { | |
d1e86d64 WD |
280 | platform_device_unregister(oprofile_pdev); |
281 | platform_driver_unregister(&oprofile_driver); | |
b5893c56 RK |
282 | } |
283 | #else | |
d1e86d64 | 284 | static int __init init_driverfs(void) { return 0; } |
b5893c56 RK |
285 | #define exit_driverfs() do { } while (0) |
286 | #endif /* CONFIG_PM */ | |
287 | ||
8c1fc96f | 288 | static int report_trace(struct stackframe *frame, void *d) |
1da177e4 | 289 | { |
8c1fc96f | 290 | unsigned int *depth = d; |
c6b9dafc | 291 | |
8c1fc96f WD |
292 | if (*depth) { |
293 | oprofile_add_trace(frame->pc); | |
294 | (*depth)--; | |
295 | } | |
1b7b5698 | 296 | |
8c1fc96f WD |
297 | return *depth == 0; |
298 | } | |
c6b9dafc | 299 | |
8c1fc96f WD |
300 | /* |
301 | * The registers we're interested in are at the end of the variable | |
302 | * length saved register structure. The fp points at the end of this | |
303 | * structure so the address of this struct is: | |
304 | * (struct frame_tail *)(xxx->fp)-1 | |
305 | */ | |
306 | struct frame_tail { | |
307 | struct frame_tail *fp; | |
308 | unsigned long sp; | |
309 | unsigned long lr; | |
310 | } __attribute__((packed)); | |
2d9e1ae0 | 311 | |
8c1fc96f WD |
312 | static struct frame_tail* user_backtrace(struct frame_tail *tail) |
313 | { | |
314 | struct frame_tail buftail[2]; | |
10c03f69 | 315 | |
8c1fc96f WD |
316 | /* Also check accessibility of one struct frame_tail beyond */ |
317 | if (!access_ok(VERIFY_READ, tail, sizeof(buftail))) | |
318 | return NULL; | |
319 | if (__copy_from_user_inatomic(buftail, tail, sizeof(buftail))) | |
320 | return NULL; | |
d7ac4e28 | 321 | |
8c1fc96f | 322 | oprofile_add_trace(buftail[0].lr); |
c6b9dafc | 323 | |
8c1fc96f WD |
324 | /* frame pointers should strictly progress back up the stack |
325 | * (towards higher addresses) */ | |
326 | if (tail >= buftail[0].fp) | |
327 | return NULL; | |
328 | ||
329 | return buftail[0].fp-1; | |
330 | } | |
331 | ||
332 | static void arm_backtrace(struct pt_regs * const regs, unsigned int depth) | |
333 | { | |
334 | struct frame_tail *tail = ((struct frame_tail *) regs->ARM_fp) - 1; | |
335 | ||
336 | if (!user_mode(regs)) { | |
337 | struct stackframe frame; | |
338 | frame.fp = regs->ARM_fp; | |
339 | frame.sp = regs->ARM_sp; | |
340 | frame.lr = regs->ARM_lr; | |
341 | frame.pc = regs->ARM_pc; | |
342 | walk_stackframe(&frame, report_trace, &depth); | |
343 | return; | |
344 | } | |
345 | ||
346 | while (depth-- && tail && !((unsigned long) tail & 3)) | |
347 | tail = user_backtrace(tail); | |
348 | } | |
349 | ||
350 | int __init oprofile_arch_init(struct oprofile_operations *ops) | |
351 | { | |
352 | int cpu, ret = 0; | |
353 | ||
354 | perf_num_counters = armpmu_get_max_events(); | |
355 | ||
356 | counter_config = kcalloc(perf_num_counters, | |
357 | sizeof(struct op_counter_config), GFP_KERNEL); | |
ae92dc9f | 358 | |
8c1fc96f WD |
359 | if (!counter_config) { |
360 | pr_info("oprofile: failed to allocate %d " | |
361 | "counters\n", perf_num_counters); | |
362 | return -ENOMEM; | |
c6b9dafc | 363 | } |
1da177e4 | 364 | |
d1e86d64 WD |
365 | ret = init_driverfs(); |
366 | if (ret) { | |
367 | kfree(counter_config); | |
368 | return ret; | |
369 | } | |
370 | ||
8c1fc96f WD |
371 | for_each_possible_cpu(cpu) { |
372 | perf_events[cpu] = kcalloc(perf_num_counters, | |
373 | sizeof(struct perf_event *), GFP_KERNEL); | |
374 | if (!perf_events[cpu]) { | |
375 | pr_info("oprofile: failed to allocate %d perf events " | |
376 | "for cpu %d\n", perf_num_counters, cpu); | |
377 | while (--cpu >= 0) | |
378 | kfree(perf_events[cpu]); | |
379 | return -ENOMEM; | |
380 | } | |
381 | } | |
382 | ||
8c1fc96f WD |
383 | ops->backtrace = arm_backtrace; |
384 | ops->create_files = op_arm_create_files; | |
385 | ops->setup = op_arm_setup; | |
386 | ops->start = op_arm_start; | |
387 | ops->stop = op_arm_stop; | |
388 | ops->shutdown = op_arm_stop; | |
389 | ops->cpu_type = op_name_from_perf_id(armpmu_get_pmu_id()); | |
390 | ||
391 | if (!ops->cpu_type) | |
392 | ret = -ENODEV; | |
393 | else | |
394 | pr_info("oprofile: using %s\n", ops->cpu_type); | |
395 | ||
c6b9dafc | 396 | return ret; |
1da177e4 LT |
397 | } |
398 | ||
c6b9dafc | 399 | void oprofile_arch_exit(void) |
1da177e4 | 400 | { |
8c1fc96f WD |
401 | int cpu, id; |
402 | struct perf_event *event; | |
403 | ||
404 | if (*perf_events) { | |
1da177e4 | 405 | exit_driverfs(); |
8c1fc96f WD |
406 | for_each_possible_cpu(cpu) { |
407 | for (id = 0; id < perf_num_counters; ++id) { | |
408 | event = perf_events[cpu][id]; | |
409 | if (event != NULL) | |
410 | perf_event_release_kernel(event); | |
411 | } | |
412 | kfree(perf_events[cpu]); | |
413 | } | |
1da177e4 | 414 | } |
8c1fc96f WD |
415 | |
416 | if (counter_config) | |
417 | kfree(counter_config); | |
418 | } | |
419 | #else | |
420 | int __init oprofile_arch_init(struct oprofile_operations *ops) | |
421 | { | |
422 | pr_info("oprofile: hardware counters not available\n"); | |
423 | return -ENODEV; | |
1da177e4 | 424 | } |
8c1fc96f WD |
425 | void oprofile_arch_exit(void) {} |
426 | #endif /* CONFIG_HW_PERF_EVENTS */ |