[linux-2.6-block.git] / arch / arm / mm / context.c

/*
 *  linux/arch/arm/mm/context.c
 *
 *  Copyright (C) 2002-2003 Deep Blue Solutions Ltd, all rights reserved.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/init.h>
#include <linux/sched.h>
#include <linux/mm.h>

#include <asm/mmu_context.h>
#include <asm/tlbflush.h>

static DEFINE_SPINLOCK(cpu_asid_lock);
unsigned int cpu_last_asid = ASID_FIRST_VERSION;

/*
 * We fork()ed a process, and we need a new context for the child
 * to run in.  We reserve version 0 for initial tasks so we will
 * always allocate an ASID. The ASID 0 is reserved for the TTBR
 * register changing sequence.
 */
void __init_new_context(struct task_struct *tsk, struct mm_struct *mm)
{
	mm->context.id = 0;
}

void __new_context(struct mm_struct *mm)
{
	unsigned int asid;

	spin_lock(&cpu_asid_lock);
	asid = ++cpu_last_asid;
	if (asid == 0)
		asid = cpu_last_asid = ASID_FIRST_VERSION;

	/*
	 * If we've used up all our ASIDs, we need
	 * to start a new version and flush the TLB.
	 */
	if (unlikely((asid & ~ASID_MASK) == 0)) {
		asid = ++cpu_last_asid;
		/* set the reserved ASID before flushing the TLB */
		asm("mcr	p15, 0, %0, c13, c0, 1	@ set reserved context ID\n"
		    :
		    : "r" (0));
		isb();
		flush_tlb_all();
		if (icache_is_vivt_asid_tagged()) {
			__flush_icache_all();
			dsb();
		}
	}
	spin_unlock(&cpu_asid_lock);

	cpumask_copy(mm_cpumask(mm), cpumask_of(smp_processor_id()));
	mm->context.id = asid;
}
Commit	Line	Data
1da177e4	1	/*
d84b4711	2	* linux/arch/arm/mm/context.c
1da177e4 LT	3	*
	4	* Copyright (C) 2002-2003 Deep Blue Solutions Ltd, all rights reserved.
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10	#include <linux/init.h>
	11	#include <linux/sched.h>
	12	#include <linux/mm.h>
	13
	14	#include <asm/mmu_context.h>
	15	#include <asm/tlbflush.h>
	16
8678c1f0 RK	17	static DEFINE_SPINLOCK(cpu_asid_lock);
8678c1f0 RK	18	unsigned int cpu_last_asid = ASID_FIRST_VERSION;
1da177e4 LT	19
	20	/*
	21	* We fork()ed a process, and we need a new context for the child
	22	* to run in. We reserve version 0 for initial tasks so we will
9d99df4b CM	23	* always allocate an ASID. The ASID 0 is reserved for the TTBR
9d99df4b CM	24	* register changing sequence.
1da177e4 LT	25	*/
	26	void __init_new_context(struct task_struct tsk, struct mm_struct mm)
	27	{
	28	mm->context.id = 0;
	29	}
	30
	31	void __new_context(struct mm_struct *mm)
	32	{
	33	unsigned int asid;
	34
8678c1f0	35	spin_lock(&cpu_asid_lock);
1da177e4 LT	36	asid = ++cpu_last_asid;
1da177e4 LT	37	if (asid == 0)
8678c1f0	38	asid = cpu_last_asid = ASID_FIRST_VERSION;
1da177e4 LT	39
	40	/*
	41	* If we've used up all our ASIDs, we need
	42	* to start a new version and flush the TLB.
	43	*/
8678c1f0	44	if (unlikely((asid & ~ASID_MASK) == 0)) {
9d99df4b CM	45	asid = ++cpu_last_asid;
	46	/* set the reserved ASID before flushing the TLB */
	47	asm("mcr p15, 0, %0, c13, c0, 1 @ set reserved context ID\n"
	48	:
	49	: "r" (0));
	50	isb();
1da177e4	51	flush_tlb_all();
065cf519	52	if (icache_is_vivt_asid_tagged()) {
df71dfd4	53	__flush_icache_all();
065cf519 CM	54	dsb();
065cf519 CM	55	}
9d99df4b	56	}
8678c1f0	57	spin_unlock(&cpu_asid_lock);
1da177e4	58
56f8ba83	59	cpumask_copy(mm_cpumask(mm), cpumask_of(smp_processor_id()));
1da177e4 LT	60	mm->context.id = asid;
1da177e4 LT	61	}