[linux-block.git] / arch / arm / mach-w90x900 / clksel.c

// SPDX-License-Identifier: GPL-2.0-only
/*
 * linux/arch/arm/mach-w90x900/clksel.c
 *
 * Copyright (c) 2008 Nuvoton technology corporation
 *
 * Wan ZongShun <mcuos.com@gmail.com>
 */

#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/device.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/string.h>
#include <linux/clk.h>
#include <linux/mutex.h>
#include <linux/io.h>

#include <mach/hardware.h>
#include <mach/regs-clock.h>

#define PLL0		0x00
#define PLL1		0x01
#define OTHER		0x02
#define EXT		0x03
#define MSOFFSET	0x0C
#define ATAOFFSET	0x0a
#define LCDOFFSET	0x06
#define AUDOFFSET	0x04
#define CPUOFFSET	0x00

static DEFINE_MUTEX(clksel_sem);

static void clock_source_select(const char *dev_id, unsigned int clkval)
{
	unsigned int clksel, offset;

	clksel = __raw_readl(REG_CLKSEL);

	if (strcmp(dev_id, "nuc900-ms") == 0)
		offset = MSOFFSET;
	else if (strcmp(dev_id, "nuc900-atapi") == 0)
		offset = ATAOFFSET;
	else if (strcmp(dev_id, "nuc900-lcd") == 0)
		offset = LCDOFFSET;
	else if (strcmp(dev_id, "nuc900-ac97") == 0)
		offset = AUDOFFSET;
	else
		offset = CPUOFFSET;

	clksel &= ~(0x03 << offset);
	clksel |= (clkval << offset);

	__raw_writel(clksel, REG_CLKSEL);
}

void nuc900_clock_source(struct device *dev, unsigned char *src)
{
	unsigned int clkval;
	const char *dev_id;

	BUG_ON(!src);
	clkval = 0;

	mutex_lock(&clksel_sem);

	if (dev)
		dev_id = dev_name(dev);
	else
		dev_id = "cpufreq";

	if (strcmp(src, "pll0") == 0)
		clkval = PLL0;
	else if (strcmp(src, "pll1") == 0)
		clkval = PLL1;
	else if (strcmp(src, "ext") == 0)
		clkval = EXT;
	else if (strcmp(src, "oth") == 0)
		clkval = OTHER;

	clock_source_select(dev_id, clkval);

	mutex_unlock(&clksel_sem);
}
EXPORT_SYMBOL(nuc900_clock_source);
Commit	Line	Data
b886d83c	1	// SPDX-License-Identifier: GPL-2.0-only
ae45b1c6	2	/*
	3	* linux/arch/arm/mach-w90x900/clksel.c
	4	*
	5	* Copyright (c) 2008 Nuvoton technology corporation
	6	*
	7	* Wan ZongShun <mcuos.com@gmail.com>
ae45b1c6	8	*/
	9
	10	#include <linux/module.h>
	11	#include <linux/kernel.h>
	12	#include <linux/device.h>
	13	#include <linux/list.h>
	14	#include <linux/errno.h>
	15	#include <linux/err.h>
	16	#include <linux/string.h>
	17	#include <linux/clk.h>
	18	#include <linux/mutex.h>
	19	#include <linux/io.h>
	20
	21	#include <mach/hardware.h>
	22	#include <mach/regs-clock.h>
	23
	24	#define PLL0 0x00
	25	#define PLL1 0x01
	26	#define OTHER 0x02
	27	#define EXT 0x03
	28	#define MSOFFSET 0x0C
	29	#define ATAOFFSET 0x0a
	30	#define LCDOFFSET 0x06
	31	#define AUDOFFSET 0x04
	32	#define CPUOFFSET 0x00
	33
	34	static DEFINE_MUTEX(clksel_sem);
	35
	36	static void clock_source_select(const char *dev_id, unsigned int clkval)
	37	{
	38	unsigned int clksel, offset;
	39
	40	clksel = __raw_readl(REG_CLKSEL);
	41
35c9221a	42	if (strcmp(dev_id, "nuc900-ms") == 0)
ae45b1c6	43	offset = MSOFFSET;
35c9221a	44	else if (strcmp(dev_id, "nuc900-atapi") == 0)
ae45b1c6	45	offset = ATAOFFSET;
35c9221a	46	else if (strcmp(dev_id, "nuc900-lcd") == 0)
ae45b1c6	47	offset = LCDOFFSET;
e37051dc	48	else if (strcmp(dev_id, "nuc900-ac97") == 0)
ae45b1c6	49	offset = AUDOFFSET;
	50	else
	51	offset = CPUOFFSET;
	52
	53	clksel &= ~(0x03 << offset);
	54	clksel \|= (clkval << offset);
	55
	56	__raw_writel(clksel, REG_CLKSEL);
	57	}
	58
35c9221a	59	void nuc900_clock_source(struct device dev, unsigned char src)
ae45b1c6	60	{
	61	unsigned int clkval;
	62	const char *dev_id;
	63
	64	BUG_ON(!src);
	65	clkval = 0;
	66
	67	mutex_lock(&clksel_sem);
	68
	69	if (dev)
	70	dev_id = dev_name(dev);
	71	else
	72	dev_id = "cpufreq";
	73
	74	if (strcmp(src, "pll0") == 0)
	75	clkval = PLL0;
	76	else if (strcmp(src, "pll1") == 0)
	77	clkval = PLL1;
	78	else if (strcmp(src, "ext") == 0)
	79	clkval = EXT;
	80	else if (strcmp(src, "oth") == 0)
	81	clkval = OTHER;
	82
	83	clock_source_select(dev_id, clkval);
	84
	85	mutex_unlock(&clksel_sem);
	86	}
35c9221a	87	EXPORT_SYMBOL(nuc900_clock_source);
ae45b1c6	88