Commit | Line | Data |
---|---|---|
b2441318 | 1 | # SPDX-License-Identifier: GPL-2.0 |
21278aea | 2 | menuconfig ARCH_VEXPRESS |
e3246542 MY |
3 | bool "ARM Ltd. Versatile Express family" |
4 | depends on ARCH_MULTI_V7 | |
98dec91f | 5 | select ARCH_SUPPORTS_BIG_ENDIAN |
61727630 | 6 | select ARM_AMBA |
fef88f10 | 7 | select ARM_GIC |
7e13c654 | 8 | select ARM_GLOBAL_TIMER |
61727630 | 9 | select ARM_TIMER_SP804 |
38669e04 | 10 | select COMMON_CLK_VERSATILE |
5c34a4e8 | 11 | select GPIOLIB |
4c3ffffd | 12 | select HAVE_ARM_SCU if SMP |
a894fcc2 | 13 | select HAVE_ARM_TWD if SMP |
61727630 | 14 | select HAVE_PATA_PLATFORM |
61727630 | 15 | select ICST |
ce816fa8 | 16 | select NO_IOPORT_MAP |
61727630 | 17 | select PLAT_VERSATILE |
2655f51d CM |
18 | select POWER_RESET |
19 | select POWER_RESET_VEXPRESS | |
20 | select POWER_SUPPLY | |
1f1dd588 | 21 | select REGULATOR if MMC_ARMMMCI |
61727630 | 22 | select REGULATOR_FIXED_VOLTAGE if REGULATOR |
38669e04 | 23 | select VEXPRESS_CONFIG |
b33cdd28 AB |
24 | select VEXPRESS_SYSCFG |
25 | select MFD_VEXPRESS_SYSREG | |
8deed178 | 26 | help |
8deed178 PM |
27 | This option enables support for systems using Cortex processor based |
28 | ARM core and logic (FPGA) tiles on the Versatile Express motherboard, | |
29 | for example: | |
30 | ||
31 | - CoreTile Express A5x2 (V2P-CA5s) | |
32 | - CoreTile Express A9x4 (V2P-CA9) | |
33 | - CoreTile Express A15x2 (V2P-CA15) | |
34 | - LogicTile Express 13MG (V2F-2XV6) with A5, A7, A9 or A15 SMMs | |
35 | (Soft Macrocell Models) | |
36 | - Versatile Express RTSMs (Models) | |
37 | ||
38 | You must boot using a Flattened Device Tree in order to use these | |
39 | platforms. The traditional (ATAGs) boot method is not usable on | |
40 | these boards with this option. | |
41 | ||
21278aea | 42 | if ARCH_VEXPRESS |
61727630 RH |
43 | |
44 | config ARCH_VEXPRESS_CORTEX_A5_A9_ERRATA | |
45 | bool "Enable A5 and A9 only errata work-arounds" | |
46 | default y | |
f6ac49ba | 47 | select ARM_ERRATA_643719 if SMP |
61727630 | 48 | select ARM_ERRATA_720789 |
a641f3a6 | 49 | select PL310_ERRATA_753970 if CACHE_L2X0 |
61727630 RH |
50 | help |
51 | Provides common dependencies for Versatile Express platforms | |
52 | based on Cortex-A5 and Cortex-A9 processors. In order to | |
53 | build a working kernel, you must also enable relevant core | |
54 | tile support or Flattened Device Tree based support options. | |
55 | ||
1e904e1b NP |
56 | config ARCH_VEXPRESS_DCSCB |
57 | bool "Dual Cluster System Control Block (DCSCB) support" | |
58 | depends on MCPM | |
ee8e5d5f | 59 | select ARM_CCI400_PORT_CTRL |
1e904e1b NP |
60 | help |
61 | Support for the Dual Cluster System Configuration Block (DCSCB). | |
62 | This is needed to provide CPU and cluster power management | |
63 | on RTSM implementing big.LITTLE. | |
64 | ||
f7cd2d83 SK |
65 | config ARCH_VEXPRESS_SPC |
66 | bool "Versatile Express Serial Power Controller (SPC)" | |
f7cd2d83 SK |
67 | select PM_OPP |
68 | help | |
69 | The TC2 (A15x2 A7x3) versatile express core tile integrates a logic | |
70 | block called Serial Power Controller (SPC) that provides the interface | |
71 | between the dual cluster test-chip and the M3 microcontroller that | |
72 | carries out power management. | |
73 | ||
11b277ea NP |
74 | config ARCH_VEXPRESS_TC2_PM |
75 | bool "Versatile Express TC2 power management" | |
76 | depends on MCPM | |
ee8e5d5f | 77 | select ARM_CCI400_PORT_CTRL |
f7cd2d83 | 78 | select ARCH_VEXPRESS_SPC |
95fcedb0 | 79 | select ARM_CPU_SUSPEND |
11b277ea NP |
80 | help |
81 | Support for CPU and cluster power management on Versatile Express | |
82 | with a TC2 (A15x2 A7x3) big.LITTLE core tile. | |
83 | ||
21278aea | 84 | endif |