Merge tag 'iio-for-3.19a' of git://git.kernel.org/pub/scm/linux/kernel/git/jic23...
[linux-2.6-block.git] / arch / arm / mach-tegra / tegra.c
CommitLineData
8e267f3d 1/*
1b14f3a5 2 * NVIDIA Tegra SoC device tree board support
8e267f3d 3 *
1b14f3a5 4 * Copyright (C) 2011, 2013, NVIDIA Corporation
8e267f3d
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5 * Copyright (C) 2010 Secret Lab Technologies, Ltd.
6 * Copyright (C) 2010 Google, Inc.
7 *
8 * This software is licensed under the terms of the GNU General Public
9 * License version 2, as published by the Free Software Foundation, and
10 * may be copied, distributed, and modified under those terms.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 */
18
8e267f3d 19#include <linux/clk.h>
a0524acc 20#include <linux/clk/tegra.h>
8e267f3d 21#include <linux/dma-mapping.h>
a0524acc
TR
22#include <linux/init.h>
23#include <linux/io.h>
24#include <linux/irqchip.h>
8e267f3d 25#include <linux/irqdomain.h>
a0524acc 26#include <linux/kernel.h>
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27#include <linux/of_address.h>
28#include <linux/of_fdt.h>
a0524acc 29#include <linux/of.h>
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30#include <linux/of_platform.h>
31#include <linux/pda_power.h>
a0524acc
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32#include <linux/platform_device.h>
33#include <linux/serial_8250.h>
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34#include <linux/slab.h>
35#include <linux/sys_soc.h>
bab53ce3 36#include <linux/usb/tegra_usb_phy.h>
8e267f3d 37
304664ea 38#include <soc/tegra/fuse.h>
7232398a 39#include <soc/tegra/pmc.h>
304664ea 40
51100bdc 41#include <asm/hardware/cache-l2x0.h>
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42#include <asm/mach/arch.h>
43#include <asm/mach/time.h>
a0524acc 44#include <asm/mach-types.h>
8e267f3d 45#include <asm/setup.h>
1a5de3ae 46#include <asm/trusted_foundations.h>
8e267f3d 47
8e267f3d 48#include "board.h"
a1725732 49#include "common.h"
51100bdc 50#include "cpuidle.h"
783944fe 51#include "flowctrl.h"
2be39c07 52#include "iomap.h"
51100bdc 53#include "irq.h"
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54#include "pm.h"
55#include "reset.h"
56#include "sleep.h"
57
58/*
59 * Storage for debug-macro.S's state.
60 *
61 * This must be in .data not .bss so that it gets initialized each time the
62 * kernel is loaded. The data is declared here rather than debug-macro.S so
63 * that multiple inclusions of debug-macro.S point at the same data.
64 */
2f1d70af 65u32 tegra_uart_config[3] = {
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66 /* Debug UART initialization required */
67 1,
68 /* Debug UART physical address */
69 0,
70 /* Debug UART virtual address */
71 0,
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72};
73
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74static void __init tegra_init_early(void)
75{
1a5de3ae 76 of_register_trusted_foundations();
cd198d6d 77 tegra_cpu_reset_handler_init();
783944fe 78 tegra_flowctrl_init();
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79}
80
81static void __init tegra_dt_init_irq(void)
82{
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83 tegra_init_irq();
84 irqchip_init();
85 tegra_legacy_irq_syscore_init();
86}
bab53ce3 87
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88static void __init tegra_dt_init(void)
89{
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90 struct soc_device_attribute *soc_dev_attr;
91 struct soc_device *soc_dev;
92 struct device *parent = NULL;
93
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94 tegra_clocks_apply_init_table();
95
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96 soc_dev_attr = kzalloc(sizeof(*soc_dev_attr), GFP_KERNEL);
97 if (!soc_dev_attr)
98 goto out;
99
100 soc_dev_attr->family = kasprintf(GFP_KERNEL, "Tegra");
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101 soc_dev_attr->revision = kasprintf(GFP_KERNEL, "%d",
102 tegra_sku_info.revision);
304664ea 103 soc_dev_attr->soc_id = kasprintf(GFP_KERNEL, "%u", tegra_get_chip_id());
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104
105 soc_dev = soc_device_register(soc_dev_attr);
106 if (IS_ERR(soc_dev)) {
107 kfree(soc_dev_attr->family);
108 kfree(soc_dev_attr->revision);
109 kfree(soc_dev_attr->soc_id);
110 kfree(soc_dev_attr);
111 goto out;
112 }
113
114 parent = soc_device_to_device(soc_dev);
115
a58116f3
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116 /*
117 * Finished with the static registrations now; fill in the missing
118 * devices
119 */
d591fdf8 120out:
5fed6828 121 of_platform_populate(NULL, of_default_bus_match_table, NULL, parent);
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122}
123
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124static void __init paz00_init(void)
125{
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126 if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC))
127 tegra_paz00_wifikill_init();
b64a02c6 128}
b64a02c6 129
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130static struct {
131 char *machine;
132 void (*init)(void);
133} board_init_funcs[] = {
b64a02c6 134 { "compal,paz00", paz00_init },
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135};
136
137static void __init tegra_dt_init_late(void)
138{
139 int i;
140
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141 tegra_init_suspend();
142 tegra_cpuidle_init();
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143
144 for (i = 0; i < ARRAY_SIZE(board_init_funcs); i++) {
145 if (of_machine_is_compatible(board_init_funcs[i].machine)) {
146 board_init_funcs[i].init();
147 break;
148 }
149 }
150}
151
1b14f3a5 152static const char * const tegra_dt_board_compat[] = {
73944475 153 "nvidia,tegra124",
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HD
154 "nvidia,tegra114",
155 "nvidia,tegra30",
c5444f39 156 "nvidia,tegra20",
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157 NULL
158};
159
1b14f3a5 160DT_MACHINE_START(TEGRA_DT, "NVIDIA Tegra SoC (Flattened Device Tree)")
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161 .l2c_aux_val = 0x3c400001,
162 .l2c_aux_mask = 0xc20fc3fe,
a1725732 163 .smp = smp_ops(tegra_smp_ops),
00123d9a 164 .map_io = tegra_map_common_io,
7469688e 165 .init_early = tegra_init_early,
0d4f7479 166 .init_irq = tegra_dt_init_irq,
8e267f3d 167 .init_machine = tegra_dt_init,
c554dee3 168 .init_late = tegra_dt_init_late,
51100bdc 169 .restart = tegra_pmc_restart,
1b14f3a5 170 .dt_compat = tegra_dt_board_compat,
8e267f3d 171MACHINE_END