Commit | Line | Data |
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c942fddf | 1 | // SPDX-License-Identifier: GPL-2.0-or-later |
22b8b85d PDS |
2 | /* |
3 | * arch/arm/mach-tegra/cpuidle.c | |
4 | * | |
5 | * CPU idle driver for Tegra CPUs | |
6 | * | |
7 | * Copyright (c) 2010-2012, NVIDIA Corporation. | |
8 | * Copyright (c) 2011 Google, Inc. | |
9 | * Author: Colin Cross <ccross@android.com> | |
10 | * Gary King <gking@nvidia.com> | |
11 | * | |
12 | * Rework for 3.3 by Peter De Schrijver <pdeschrijver@nvidia.com> | |
22b8b85d PDS |
13 | */ |
14 | ||
15 | #include <linux/kernel.h> | |
16 | #include <linux/module.h> | |
22b8b85d | 17 | |
304664ea TR |
18 | #include <soc/tegra/fuse.h> |
19 | ||
0b25e25b | 20 | #include "cpuidle.h" |
22b8b85d | 21 | |
e22dc2b2 | 22 | void __init tegra_cpuidle_init(void) |
22b8b85d | 23 | { |
304664ea | 24 | switch (tegra_get_chip_id()) { |
0b25e25b | 25 | case TEGRA20: |
b046a65f JL |
26 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) |
27 | tegra20_cpuidle_init(); | |
0b25e25b JL |
28 | break; |
29 | case TEGRA30: | |
b046a65f JL |
30 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_3x_SOC)) |
31 | tegra30_cpuidle_init(); | |
0b25e25b | 32 | break; |
51dc5259 | 33 | case TEGRA114: |
24036fdc JL |
34 | case TEGRA124: |
35 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_114_SOC) || | |
36 | IS_ENABLED(CONFIG_ARCH_TEGRA_124_SOC)) | |
b046a65f | 37 | tegra114_cpuidle_init(); |
0b25e25b | 38 | break; |
22b8b85d | 39 | } |
22b8b85d | 40 | } |
b4f17375 SW |
41 | |
42 | void tegra_cpuidle_pcie_irqs_in_use(void) | |
43 | { | |
304664ea | 44 | switch (tegra_get_chip_id()) { |
b4f17375 SW |
45 | case TEGRA20: |
46 | if (IS_ENABLED(CONFIG_ARCH_TEGRA_2x_SOC)) | |
47 | tegra20_cpuidle_pcie_irqs_in_use(); | |
48 | break; | |
49 | } | |
50 | } |