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bd5a875d MD |
1 | /* |
2 | * SMP support for Emma Mobile EV2 | |
3 | * | |
4 | * Copyright (C) 2012 Renesas Solutions Corp. | |
5 | * Copyright (C) 2012 Magnus Damm | |
6 | * | |
7 | * This program is free software; you can redistribute it and/or modify | |
8 | * it under the terms of the GNU General Public License as published by | |
9 | * the Free Software Foundation; version 2 of the License. | |
10 | * | |
11 | * This program is distributed in the hope that it will be useful, | |
12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
14 | * GNU General Public License for more details. | |
15 | * | |
16 | * You should have received a copy of the GNU General Public License | |
17 | * along with this program; if not, write to the Free Software | |
18 | * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA | |
19 | */ | |
20 | #include <linux/kernel.h> | |
21 | #include <linux/init.h> | |
22 | #include <linux/smp.h> | |
23 | #include <linux/spinlock.h> | |
24 | #include <linux/io.h> | |
25 | #include <linux/delay.h> | |
26 | #include <mach/common.h> | |
27 | #include <mach/emev2.h> | |
28 | #include <asm/smp_plat.h> | |
29 | #include <asm/smp_scu.h> | |
30 | #include <asm/hardware/gic.h> | |
31 | #include <asm/cacheflush.h> | |
32 | ||
33 | #define EMEV2_SCU_BASE 0x1e000000 | |
34 | ||
35 | static DEFINE_SPINLOCK(scu_lock); | |
36 | static void __iomem *scu_base; | |
37 | ||
38 | static void modify_scu_cpu_psr(unsigned long set, unsigned long clr) | |
39 | { | |
40 | unsigned long tmp; | |
41 | ||
42 | /* we assume this code is running on a different cpu | |
43 | * than the one that is changing coherency setting */ | |
44 | spin_lock(&scu_lock); | |
45 | tmp = readl(scu_base + 8); | |
46 | tmp &= ~clr; | |
47 | tmp |= set; | |
48 | writel(tmp, scu_base + 8); | |
49 | spin_unlock(&scu_lock); | |
50 | ||
51 | } | |
52 | ||
53 | unsigned int __init emev2_get_core_count(void) | |
54 | { | |
55 | if (!scu_base) { | |
56 | scu_base = ioremap(EMEV2_SCU_BASE, PAGE_SIZE); | |
57 | emev2_clock_init(); /* need ioremapped SMU */ | |
58 | } | |
59 | ||
60 | WARN_ON_ONCE(!scu_base); | |
61 | ||
62 | return scu_base ? scu_get_core_count(scu_base) : 1; | |
63 | } | |
64 | ||
65 | int emev2_platform_cpu_kill(unsigned int cpu) | |
66 | { | |
67 | return 0; /* not supported yet */ | |
68 | } | |
69 | ||
70 | void __cpuinit emev2_secondary_init(unsigned int cpu) | |
71 | { | |
72 | gic_secondary_init(0); | |
73 | } | |
74 | ||
75 | int __cpuinit emev2_boot_secondary(unsigned int cpu) | |
76 | { | |
77 | cpu = cpu_logical_map(cpu); | |
78 | ||
79 | /* enable cache coherency */ | |
80 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); | |
81 | ||
82 | /* Tell ROM loader about our vector (in headsmp.S) */ | |
83 | emev2_set_boot_vector(__pa(shmobile_secondary_vector)); | |
84 | ||
85 | gic_raise_softirq(cpumask_of(cpu), 1); | |
86 | return 0; | |
87 | } | |
88 | ||
89 | void __init emev2_smp_prepare_cpus(void) | |
90 | { | |
91 | int cpu = cpu_logical_map(0); | |
92 | ||
93 | scu_enable(scu_base); | |
94 | ||
95 | /* enable cache coherency on CPU0 */ | |
96 | modify_scu_cpu_psr(0, 3 << (cpu * 8)); | |
97 | } |