projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| c44e182e | 1 | // SPDX-License-Identifier: GPL-2.0 |
| f411fade MD |
2 | /* |
| 3 | * r8a7779 processor support | |
| 4 | * | |
| dace48d0 | 5 | * Copyright (C) 2011, 2013 Renesas Solutions Corp. |
| f411fade | 6 | * Copyright (C) 2011 Magnus Damm |
| dace48d0 | 7 | * Copyright (C) 2013 Cogent Embedded, Inc. |
| f411fade | 8 | */ |
| f411fade | 9 | #include <linux/init.h> |
| 5b3859d7 | 10 | #include <linux/irqchip.h> |
| 1b55353c | 11 | |
| f411fade | 12 | #include <asm/mach/arch.h> |
| 3e353b87 | 13 | #include <asm/mach/map.h> |
| 1b55353c | 14 | |
| fd44aa5e | 15 | #include "common.h" |
| 1b55353c | 16 | #include "r8a7779.h" |
| 3e353b87 MD |
17 | |
| 18 | static struct map_desc r8a7779_io_desc[] __initdata = { | |
| 3e940958 | 19 | /* 2M identity mapping for 0xf0000000 (MPCORE) */ |
| 3e353b87 MD |
20 | { |
| 21 | .virtual = 0xf0000000, | |
| 22 | .pfn = __phys_to_pfn(0xf0000000), | |
| 23 | .length = SZ_2M, | |
| 24 | .type = MT_DEVICE_NONSHARED | |
| 25 | }, | |
| 3e940958 | 26 | /* 16M identity mapping for 0xfexxxxxx (DMAC-S/HPBREG/INTC2/LRAM/DBSC) */ |
| 3e353b87 MD |
27 | { |
| 28 | .virtual = 0xfe000000, | |
| 29 | .pfn = __phys_to_pfn(0xfe000000), | |
| 30 | .length = SZ_16M, | |
| 31 | .type = MT_DEVICE_NONSHARED | |
| 32 | }, | |
| 33 | }; | |
| 34 | ||
| c99cd90d | 35 | static void __init r8a7779_map_io(void) |
| 3e353b87 | 36 | { |
| 7a2071c5 | 37 | debug_ll_io_init(); |
| 3e353b87 MD |
38 | iotable_init(r8a7779_io_desc, ARRAY_SIZE(r8a7779_io_desc)); |
| 39 | } | |
| f411fade | 40 | |
| 5b3859d7 KM |
41 | /* IRQ */ |
| 42 | #define INT2SMSKCR0 IOMEM(0xfe7822a0) | |
| 43 | #define INT2SMSKCR1 IOMEM(0xfe7822a4) | |
| 44 | #define INT2SMSKCR2 IOMEM(0xfe7822a8) | |
| 45 | #define INT2SMSKCR3 IOMEM(0xfe7822ac) | |
| 46 | #define INT2SMSKCR4 IOMEM(0xfe7822b0) | |
| 47 | ||
| 48 | #define INT2NTSR0 IOMEM(0xfe700060) | |
| 49 | #define INT2NTSR1 IOMEM(0xfe700064) | |
| 50 | ||
| c99cd90d | 51 | static void __init r8a7779_init_irq_dt(void) |
| 31e4e292 | 52 | { |
| 5b3859d7 | 53 | irqchip_init(); |
| c99cd90d | 54 | |
| 5b3859d7 KM |
55 | /* route all interrupts to ARM */ |
| 56 | __raw_writel(0xffffffff, INT2NTSR0); | |
| 57 | __raw_writel(0x3fffffff, INT2NTSR1); | |
| 58 | ||
| 59 | /* unmask all known interrupts in INTCS2 */ | |
| 60 | __raw_writel(0xfffffff0, INT2SMSKCR0); | |
| 61 | __raw_writel(0xfff7ffff, INT2SMSKCR1); | |
| 62 | __raw_writel(0xfffbffdf, INT2SMSKCR2); | |
| 63 | __raw_writel(0xbffffffc, INT2SMSKCR3); | |
| 64 | __raw_writel(0x003fee3f, INT2SMSKCR4); | |
| 65 | } | |
| 66 | ||
| 19c233b7 | 67 | static const char *const r8a7779_compat_dt[] __initconst = { |
| 10e8d4f6 SH |
68 | "renesas,r8a7779", |
| 69 | NULL, | |
| 70 | }; | |
| 71 | ||
| abe0e14b | 72 | DT_MACHINE_START(R8A7779_DT, "Generic R8A7779 (Flattened Device Tree)") |
| 44ade5ed | 73 | .smp = smp_ops(r8a7779_smp_ops), |
| 10e8d4f6 | 74 | .map_io = r8a7779_map_io, |
| 0157b626 | 75 | .init_early = shmobile_init_delay, |
| 10e8d4f6 | 76 | .init_irq = r8a7779_init_irq_dt, |
| d5b00b90 | 77 | .init_late = shmobile_init_late, |
| 10e8d4f6 SH |
78 | .dt_compat = r8a7779_compat_dt, |
| 79 | MACHINE_END |