projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| ccb7cc74 KM |
1 | /* |
| 2 | * r8a7778 processor support | |
| 3 | * | |
| 4 | * Copyright (C) 2013 Renesas Solutions Corp. | |
| 5 | * Copyright (C) 2013 Kuninori Morimoto <kuninori.morimoto.gx@renesas.com> | |
| 52421914 | 6 | * Copyright (C) 2013 Cogent Embedded, Inc. |
| ccb7cc74 KM |
7 | * |
| 8 | * This program is free software; you can redistribute it and/or modify | |
| 9 | * it under the terms of the GNU General Public License as published by | |
| 10 | * the Free Software Foundation; version 2 of the License. | |
| 11 | * | |
| 12 | * This program is distributed in the hope that it will be useful, | |
| 13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | |
| 14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | |
| 15 | * GNU General Public License for more details. | |
| ccb7cc74 KM |
16 | */ |
| 17 | ||
| 43cbec85 | 18 | #include <linux/clk/shmobile.h> |
| ccb7cc74 | 19 | #include <linux/io.h> |
| ccb7cc74 | 20 | #include <linux/irqchip.h> |
| 02c94f38 | 21 | |
| ccb7cc74 | 22 | #include <asm/mach/arch.h> |
| ccb7cc74 | 23 | |
| fd44aa5e | 24 | #include "common.h" |
| b6bab126 | 25 | #include "irqs.h" |
| ccb7cc74 | 26 | |
| 43cbec85 UH |
27 | #define MODEMR 0xffcc0020 |
| 28 | ||
| 43cbec85 UH |
29 | static void __init r8a7778_timer_init(void) |
| 30 | { | |
| 31 | u32 mode; | |
| 32 | void __iomem *modemr = ioremap_nocache(MODEMR, 4); | |
| 33 | ||
| 34 | BUG_ON(!modemr); | |
| 35 | mode = ioread32(modemr); | |
| 36 | iounmap(modemr); | |
| 37 | r8a7778_clocks_init(mode); | |
| 38 | } | |
| 43cbec85 | 39 | |
| ccb7cc74 KM |
40 | #define INT2SMSKCR0 0x82288 /* 0xfe782288 */ |
| 41 | #define INT2SMSKCR1 0x8228c /* 0xfe78228c */ | |
| 42 | ||
| 43 | #define INT2NTSR0 0x00018 /* 0xfe700018 */ | |
| 44 | #define INT2NTSR1 0x0002c /* 0xfe70002c */ | |
| 20e73335 GU |
45 | |
| 46 | static void __init r8a7778_init_irq_dt(void) | |
| ccb7cc74 KM |
47 | { |
| 48 | void __iomem *base = ioremap_nocache(0xfe700000, 0x00100000); | |
| 49 | ||
| 50 | BUG_ON(!base); | |
| 51 | ||
| 54aa4c48 | 52 | irqchip_init(); |
| 4baadb9e | 53 | |
| ccb7cc74 KM |
54 | /* route all interrupts to ARM */ |
| 55 | __raw_writel(0x73ffffff, base + INT2NTSR0); | |
| 56 | __raw_writel(0xffffffff, base + INT2NTSR1); | |
| 57 | ||
| 58 | /* unmask all known interrupts in INTCS2 */ | |
| 59 | __raw_writel(0x08330773, base + INT2SMSKCR0); | |
| 60 | __raw_writel(0x00311110, base + INT2SMSKCR1); | |
| 61 | ||
| 62 | iounmap(base); | |
| 63 | } | |
| 64 | ||
| 19c233b7 | 65 | static const char *const r8a7778_compat_dt[] __initconst = { |
| ccb7cc74 KM |
66 | "renesas,r8a7778", |
| 67 | NULL, | |
| 68 | }; | |
| 69 | ||
| 70 | DT_MACHINE_START(R8A7778_DT, "Generic R8A7778 (Flattened Device Tree)") | |
| 92ee341e | 71 | .init_early = shmobile_init_delay, |
| ccb7cc74 | 72 | .init_irq = r8a7778_init_irq_dt, |
| 7759a7a8 | 73 | .init_late = shmobile_init_late, |
| 43cbec85 | 74 | .init_time = r8a7778_timer_init, |
| ccb7cc74 KM |
75 | .dt_compat = r8a7778_compat_dt, |
| 76 | MACHINE_END |