Commit | Line | Data |
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e2f2594b | 1 | // SPDX-License-Identifier: GPL-2.0 |
c970d4ef MD |
2 | /* |
3 | * SMP support for SoCs with SCU covered by mach-shmobile | |
4 | * | |
5 | * Copyright (C) 2013 Magnus Damm | |
c970d4ef | 6 | */ |
916d6121 | 7 | #include <linux/cpu.h> |
e7b1c963 | 8 | #include <linux/delay.h> |
c970d4ef MD |
9 | #include <linux/init.h> |
10 | #include <linux/io.h> | |
11 | #include <linux/smp.h> | |
e7b1c963 | 12 | #include <asm/cacheflush.h> |
c970d4ef MD |
13 | #include <asm/smp_plat.h> |
14 | #include <asm/smp_scu.h> | |
fd44aa5e | 15 | #include "common.h" |
c970d4ef | 16 | |
d2613f56 | 17 | |
8701d808 GU |
18 | static phys_addr_t shmobile_scu_base_phys; |
19 | static void __iomem *shmobile_scu_base; | |
d2613f56 | 20 | |
657ebf7a | 21 | static int shmobile_scu_cpu_prepare(unsigned int cpu) |
916d6121 | 22 | { |
657ebf7a | 23 | /* For this particular CPU register SCU SMP boot vector */ |
64fc2a94 | 24 | shmobile_smp_hook(cpu, __pa_symbol(shmobile_boot_scu), |
657ebf7a SAS |
25 | shmobile_scu_base_phys); |
26 | return 0; | |
916d6121 MD |
27 | } |
28 | ||
8701d808 GU |
29 | void __init shmobile_smp_scu_prepare_cpus(phys_addr_t scu_base_phys, |
30 | unsigned int max_cpus) | |
c970d4ef | 31 | { |
1d33a354 | 32 | /* install boot code shared by all CPUs */ |
64fc2a94 | 33 | shmobile_boot_fn = __pa_symbol(shmobile_smp_boot); |
c970d4ef MD |
34 | |
35 | /* enable SCU and cache coherency on booting CPU */ | |
8701d808 GU |
36 | shmobile_scu_base_phys = scu_base_phys; |
37 | shmobile_scu_base = ioremap(scu_base_phys, PAGE_SIZE); | |
c970d4ef MD |
38 | scu_enable(shmobile_scu_base); |
39 | scu_power_mode(shmobile_scu_base, SCU_PM_NORMAL); | |
916d6121 MD |
40 | |
41 | /* Use CPU notifier for reset vector control */ | |
657ebf7a SAS |
42 | cpuhp_setup_state_nocalls(CPUHP_ARM_SHMOBILE_SCU_PREPARE, |
43 | "arm/shmobile-scu:prepare", | |
44 | shmobile_scu_cpu_prepare, NULL); | |
c970d4ef MD |
45 | } |
46 | ||
e7b1c963 MD |
47 | #ifdef CONFIG_HOTPLUG_CPU |
48 | void shmobile_smp_scu_cpu_die(unsigned int cpu) | |
49 | { | |
1d33a354 MD |
50 | /* For this particular CPU deregister boot vector */ |
51 | shmobile_smp_hook(cpu, 0, 0); | |
52 | ||
e7b1c963 MD |
53 | dsb(); |
54 | flush_cache_all(); | |
55 | ||
56 | /* disable cache coherency */ | |
57 | scu_power_mode(shmobile_scu_base, SCU_PM_POWEROFF); | |
58 | ||
1d33a354 MD |
59 | /* jump to shared mach-shmobile sleep / reset code */ |
60 | shmobile_smp_sleep(); | |
e7b1c963 MD |
61 | } |
62 | ||
63 | static int shmobile_smp_scu_psr_core_disabled(int cpu) | |
64 | { | |
65 | unsigned long mask = SCU_PM_POWEROFF << (cpu * 8); | |
66 | ||
67 | if ((__raw_readl(shmobile_scu_base + 8) & mask) == mask) | |
68 | return 1; | |
69 | ||
70 | return 0; | |
71 | } | |
72 | ||
73 | int shmobile_smp_scu_cpu_kill(unsigned int cpu) | |
74 | { | |
75 | int k; | |
76 | ||
77 | /* this function is running on another CPU than the offline target, | |
78 | * here we need wait for shutdown code in platform_cpu_die() to | |
79 | * finish before asking SoC-specific code to power off the CPU core. | |
80 | */ | |
81 | for (k = 0; k < 1000; k++) { | |
82 | if (shmobile_smp_scu_psr_core_disabled(cpu)) | |
83 | return 1; | |
84 | ||
85 | mdelay(1); | |
86 | } | |
87 | ||
88 | return 0; | |
89 | } | |
90 | #endif |