Merge tag 'clk-for-linus-3.18' of git://git.linaro.org/people/mike.turquette/linux
[linux-2.6-block.git] / arch / arm / mach-shmobile / board-lager.c
CommitLineData
3cc828fd
MD
1/*
2 * Lager board support
3 *
5d5a87a5 4 * Copyright (C) 2013-2014 Renesas Solutions Corp.
3cc828fd 5 * Copyright (C) 2013 Magnus Damm
5d5a87a5 6 * Copyright (C) 2014 Cogent Embedded, Inc.
3cc828fd
MD
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; version 2 of the License.
11 *
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
16 *
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA 02110-1301 USA
20 */
21
c3842e4f
SH
22#include <linux/gpio.h>
23#include <linux/gpio_keys.h>
d58922ce 24#include <linux/i2c.h>
c3842e4f 25#include <linux/input.h>
3cc828fd 26#include <linux/interrupt.h>
5812b8b2 27#include <linux/irq.h>
3cc828fd 28#include <linux/kernel.h>
1034f4ee 29#include <linux/leds.h>
40e6a51e 30#include <linux/mfd/tmio.h>
63d0539e
GL
31#include <linux/mmc/host.h>
32#include <linux/mmc/sh_mmcif.h>
40e6a51e 33#include <linux/mmc/sh_mobile_sdhi.h>
fccae893
GU
34#include <linux/mtd/partitions.h>
35#include <linux/mtd/mtd.h>
e3a28ac2 36#include <linux/pinctrl/machine.h>
094a804a 37#include <linux/platform_data/camera-rcar.h>
1034f4ee 38#include <linux/platform_data/gpio-rcar.h>
c75a5afa 39#include <linux/platform_data/rcar-du.h>
1eabe028 40#include <linux/platform_data/usb-rcar-gen2-phy.h>
3cc828fd 41#include <linux/platform_device.h>
48c8b96f 42#include <linux/phy.h>
be0647d5 43#include <linux/regulator/driver.h>
63d0539e 44#include <linux/regulator/fixed.h>
be0647d5 45#include <linux/regulator/gpio-regulator.h>
63d0539e 46#include <linux/regulator/machine.h>
4901e136 47#include <linux/sh_eth.h>
fccae893
GU
48#include <linux/spi/flash.h>
49#include <linux/spi/rspi.h>
50#include <linux/spi/spi.h>
1eabe028
VB
51#include <linux/usb/phy.h>
52#include <linux/usb/renesas_usbhs.h>
fccae893 53
094a804a 54#include <media/soc_camera.h>
3cc828fd
MD
55#include <asm/mach-types.h>
56#include <asm/mach/arch.h>
d58922ce
KM
57#include <sound/rcar_snd.h>
58#include <sound/simple_card.h>
59
fd44aa5e 60#include "common.h"
b6bab126 61#include "irqs.h"
fccae893 62#include "r8a7790.h"
62872989 63#include "rcar-gen2.h"
d58922ce
KM
64
65/*
66 * SSI-AK4643
67 *
68 * SW1: 1: AK4643
69 * 2: CN22
70 * 3: ADV7511
71 *
72 * this command is required when playback.
73 *
74 * # amixer set "LINEOUT Mixer DACL" on
75 */
3cc828fd 76
40e6a51e
KM
77/*
78 * SDHI0 (CN8)
79 *
80 * JP3: pin1
81 * SW20: pin1
82
83 * GP5_24: 1: VDD 3.3V (defult)
84 * 0: VDD 0.0V
85 * GP5_29: 1: VccQ 3.3V (defult)
86 * 0: VccQ 1.8V
87 *
88 */
89
c75a5afa
LP
90/* DU */
91static struct rcar_du_encoder_data lager_du_encoders[] = {
92 {
93 .type = RCAR_DU_ENCODER_VGA,
94 .output = RCAR_DU_OUTPUT_DPAD0,
95 }, {
96 .type = RCAR_DU_ENCODER_NONE,
97 .output = RCAR_DU_OUTPUT_LVDS1,
98 .connector.lvds.panel = {
99 .width_mm = 210,
100 .height_mm = 158,
101 .mode = {
1d46fea7
LP
102 .pixelclock = 65000000,
103 .hactive = 1024,
104 .hfront_porch = 20,
105 .hback_porch = 160,
106 .hsync_len = 136,
107 .vactive = 768,
108 .vfront_porch = 3,
109 .vback_porch = 29,
110 .vsync_len = 6,
c75a5afa
LP
111 },
112 },
113 },
114};
115
116static const struct rcar_du_platform_data lager_du_pdata __initconst = {
117 .encoders = lager_du_encoders,
118 .num_encoders = ARRAY_SIZE(lager_du_encoders),
119};
120
121static const struct resource du_resources[] __initconst = {
122 DEFINE_RES_MEM(0xfeb00000, 0x70000),
123 DEFINE_RES_MEM_NAMED(0xfeb90000, 0x1c, "lvds.0"),
124 DEFINE_RES_MEM_NAMED(0xfeb94000, 0x1c, "lvds.1"),
125 DEFINE_RES_IRQ(gic_spi(256)),
126 DEFINE_RES_IRQ(gic_spi(268)),
127 DEFINE_RES_IRQ(gic_spi(269)),
128};
129
130static void __init lager_add_du_device(void)
131{
132 struct platform_device_info info = {
133 .name = "rcar-du-r8a7790",
134 .id = -1,
135 .res = du_resources,
136 .num_res = ARRAY_SIZE(du_resources),
37bf8103
LP
137 .data = &lager_du_pdata,
138 .size_data = sizeof(lager_du_pdata),
c75a5afa
LP
139 .dma_mask = DMA_BIT_MASK(32),
140 };
141
142 platform_device_register_full(&info);
143}
144
1034f4ee
SH
145/* LEDS */
146static struct gpio_led lager_leds[] = {
147 {
148 .name = "led8",
149 .gpio = RCAR_GP_PIN(5, 17),
150 .default_state = LEDS_GPIO_DEFSTATE_ON,
151 }, {
152 .name = "led7",
153 .gpio = RCAR_GP_PIN(4, 23),
154 .default_state = LEDS_GPIO_DEFSTATE_ON,
155 }, {
156 .name = "led6",
157 .gpio = RCAR_GP_PIN(4, 22),
158 .default_state = LEDS_GPIO_DEFSTATE_ON,
159 },
160};
161
27113d63 162static const struct gpio_led_platform_data lager_leds_pdata __initconst = {
1034f4ee
SH
163 .leds = lager_leds,
164 .num_leds = ARRAY_SIZE(lager_leds),
165};
166
c3842e4f
SH
167/* GPIO KEY */
168#define GPIO_KEY(c, g, d, ...) \
c9fd77d4 169 { .code = c, .gpio = g, .desc = d, .active_low = 1, \
e0554d90 170 .wakeup = 1, .debounce_interval = 20 }
c3842e4f 171
a6014693 172static struct gpio_keys_button gpio_buttons[] = {
c3842e4f
SH
173 GPIO_KEY(KEY_4, RCAR_GP_PIN(1, 28), "SW2-pin4"),
174 GPIO_KEY(KEY_3, RCAR_GP_PIN(1, 26), "SW2-pin3"),
175 GPIO_KEY(KEY_2, RCAR_GP_PIN(1, 24), "SW2-pin2"),
176 GPIO_KEY(KEY_1, RCAR_GP_PIN(1, 14), "SW2-pin1"),
177};
178
27113d63 179static const struct gpio_keys_platform_data lager_keys_pdata __initconst = {
c3842e4f
SH
180 .buttons = gpio_buttons,
181 .nbuttons = ARRAY_SIZE(gpio_buttons),
182};
183
63d0539e
GL
184/* Fixed 3.3V regulator to be used by MMCIF */
185static struct regulator_consumer_supply fixed3v3_power_consumers[] =
186{
187 REGULATOR_SUPPLY("vmmc", "sh_mmcif.1"),
188};
189
be0647d5
KM
190/*
191 * SDHI regulator macro
192 *
193 ** FIXME**
194 * Lager board vqmmc is provided via DA9063 PMIC chip,
195 * and we should use ${LINK}/drivers/mfd/da9063-* driver for it.
196 * but, it doesn't have regulator support at this point.
197 * It uses gpio-regulator for vqmmc as quick-hack.
198 */
199#define SDHI_REGULATOR(idx, vdd_pin, vccq_pin) \
200static struct regulator_consumer_supply vcc_sdhi##idx##_consumer = \
201 REGULATOR_SUPPLY("vmmc", "sh_mobile_sdhi." #idx); \
202 \
203static struct regulator_init_data vcc_sdhi##idx##_init_data = { \
204 .constraints = { \
205 .valid_ops_mask = REGULATOR_CHANGE_STATUS, \
206 }, \
207 .consumer_supplies = &vcc_sdhi##idx##_consumer, \
208 .num_consumer_supplies = 1, \
209}; \
210 \
211static const struct fixed_voltage_config vcc_sdhi##idx##_info __initconst = {\
212 .supply_name = "SDHI" #idx "Vcc", \
213 .microvolts = 3300000, \
214 .gpio = vdd_pin, \
215 .enable_high = 1, \
216 .init_data = &vcc_sdhi##idx##_init_data, \
217}; \
218 \
219static struct regulator_consumer_supply vccq_sdhi##idx##_consumer = \
220 REGULATOR_SUPPLY("vqmmc", "sh_mobile_sdhi." #idx); \
221 \
222static struct regulator_init_data vccq_sdhi##idx##_init_data = { \
223 .constraints = { \
224 .input_uV = 3300000, \
225 .min_uV = 1800000, \
226 .max_uV = 3300000, \
227 .valid_ops_mask = REGULATOR_CHANGE_VOLTAGE | \
228 REGULATOR_CHANGE_STATUS, \
229 }, \
230 .consumer_supplies = &vccq_sdhi##idx##_consumer, \
231 .num_consumer_supplies = 1, \
232}; \
233 \
234static struct gpio vccq_sdhi##idx##_gpio = \
235 { vccq_pin, GPIOF_OUT_INIT_HIGH, "vccq-sdhi" #idx }; \
236 \
237static struct gpio_regulator_state vccq_sdhi##idx##_states[] = { \
238 { .value = 1800000, .gpios = 0 }, \
239 { .value = 3300000, .gpios = 1 }, \
240}; \
241 \
242static const struct gpio_regulator_config vccq_sdhi##idx##_info __initconst = {\
243 .supply_name = "vqmmc", \
244 .gpios = &vccq_sdhi##idx##_gpio, \
245 .nr_gpios = 1, \
246 .states = vccq_sdhi##idx##_states, \
247 .nr_states = ARRAY_SIZE(vccq_sdhi##idx##_states), \
248 .type = REGULATOR_VOLTAGE, \
249 .init_data = &vccq_sdhi##idx##_init_data, \
250};
251
252SDHI_REGULATOR(0, RCAR_GP_PIN(5, 24), RCAR_GP_PIN(5, 29));
253SDHI_REGULATOR(2, RCAR_GP_PIN(5, 25), RCAR_GP_PIN(5, 30));
254
63d0539e 255/* MMCIF */
27113d63 256static const struct sh_mmcif_plat_data mmcif1_pdata __initconst = {
63d0539e 257 .caps = MMC_CAP_8_BIT_DATA | MMC_CAP_NONREMOVABLE,
b77c6bce
GL
258 .clk_ctrl2_present = true,
259 .ccs_unsupported = true,
63d0539e
GL
260};
261
27113d63 262static const struct resource mmcif1_resources[] __initconst = {
b7b42df6 263 DEFINE_RES_MEM(0xee220000, 0x80),
63d0539e
GL
264 DEFINE_RES_IRQ(gic_spi(170)),
265};
266
4901e136 267/* Ether */
27113d63 268static const struct sh_eth_plat_data ether_pdata __initconst = {
4901e136 269 .phy = 0x1,
5812b8b2 270 .phy_irq = irq_pin(0),
4901e136 271 .edmac_endian = EDMAC_LITTLE_ENDIAN,
4901e136
SH
272 .phy_interface = PHY_INTERFACE_MODE_RMII,
273 .ether_link_active_low = 1,
274};
275
27113d63 276static const struct resource ether_resources[] __initconst = {
4901e136
SH
277 DEFINE_RES_MEM(0xee700000, 0x400),
278 DEFINE_RES_IRQ(gic_spi(162)),
279};
280
5d5a87a5 281static const struct platform_device_info ether_info __initconst = {
5d5a87a5
SS
282 .name = "r8a7790-ether",
283 .id = -1,
284 .res = ether_resources,
285 .num_res = ARRAY_SIZE(ether_resources),
286 .data = &ether_pdata,
287 .size_data = sizeof(ether_pdata),
288 .dma_mask = DMA_BIT_MASK(32),
289};
290
24cf82f4
HCM
291/* SPI Flash memory (Spansion S25FL512SAGMFIG11 64Mb) */
292static struct mtd_partition spi_flash_part[] = {
293 /* Reserved for user loader program, read-only */
294 {
295 .name = "loader",
296 .offset = 0,
297 .size = SZ_256K,
298 .mask_flags = MTD_WRITEABLE,
299 },
300 /* Reserved for user program, read-only */
301 {
302 .name = "user",
303 .offset = MTDPART_OFS_APPEND,
304 .size = SZ_4M,
305 .mask_flags = MTD_WRITEABLE,
306 },
307 /* All else is writable (e.g. JFFS2) */
308 {
309 .name = "flash",
310 .offset = MTDPART_OFS_APPEND,
311 .size = MTDPART_SIZ_FULL,
312 .mask_flags = 0,
313 },
314};
315
d422c451 316static const struct flash_platform_data spi_flash_data = {
24cf82f4
HCM
317 .name = "m25p80",
318 .parts = spi_flash_part,
319 .nr_parts = ARRAY_SIZE(spi_flash_part),
320 .type = "s25fl512s",
321};
322
323static const struct rspi_plat_data qspi_pdata __initconst = {
324 .num_chipselect = 1,
325};
326
327static const struct spi_board_info spi_info[] __initconst = {
328 {
a09b2f0b
GU
329 .modalias = "m25p80",
330 .platform_data = &spi_flash_data,
331 .mode = SPI_MODE_0 | SPI_TX_QUAD | SPI_RX_QUAD,
332 .max_speed_hz = 30000000,
333 .bus_num = 0,
334 .chip_select = 0,
24cf82f4
HCM
335 },
336};
337
338/* QSPI resource */
339static const struct resource qspi_resources[] __initconst = {
340 DEFINE_RES_MEM(0xe6b10000, 0x1000),
a70eda7e 341 DEFINE_RES_IRQ_NAMED(gic_spi(184), "mux"),
24cf82f4
HCM
342};
343
094a804a
VB
344/* VIN */
345static const struct resource vin_resources[] __initconst = {
346 /* VIN0 */
347 DEFINE_RES_MEM(0xe6ef0000, 0x1000),
348 DEFINE_RES_IRQ(gic_spi(188)),
349 /* VIN1 */
350 DEFINE_RES_MEM(0xe6ef1000, 0x1000),
351 DEFINE_RES_IRQ(gic_spi(189)),
352};
353
354static void __init lager_add_vin_device(unsigned idx,
355 struct rcar_vin_platform_data *pdata)
356{
357 struct platform_device_info vin_info = {
094a804a
VB
358 .name = "r8a7790-vin",
359 .id = idx,
360 .res = &vin_resources[idx * 2],
361 .num_res = 2,
362 .dma_mask = DMA_BIT_MASK(32),
363 .data = pdata,
364 .size_data = sizeof(*pdata),
365 };
366
367 BUG_ON(idx > 1);
368
369 platform_device_register_full(&vin_info);
370}
371
372#define LAGER_CAMERA(idx, name, addr, pdata, flag) \
373static struct i2c_board_info i2c_cam##idx##_device = { \
374 I2C_BOARD_INFO(name, addr), \
375}; \
376 \
377static struct rcar_vin_platform_data vin##idx##_pdata = { \
378 .flags = flag, \
379}; \
380 \
381static struct soc_camera_link cam##idx##_link = { \
382 .bus_id = idx, \
383 .board_info = &i2c_cam##idx##_device, \
384 .i2c_adapter_id = 2, \
385 .module_name = name, \
386 .priv = pdata, \
387}
388
389/* Camera 0 is not currently supported due to adv7612 support missing */
390LAGER_CAMERA(1, "adv7180", 0x20, NULL, RCAR_VIN_BT656);
391
392static void __init lager_add_camera1_device(void)
393{
d2168146 394 platform_device_register_data(NULL, "soc-camera-pdrv", 1,
094a804a
VB
395 &cam1_link, sizeof(cam1_link));
396 lager_add_vin_device(1, &vin1_pdata);
397}
398
1e0d2c49
VB
399/* SATA1 */
400static const struct resource sata1_resources[] __initconst = {
401 DEFINE_RES_MEM(0xee500000, 0x2000),
402 DEFINE_RES_IRQ(gic_spi(106)),
403};
404
405static const struct platform_device_info sata1_info __initconst = {
1e0d2c49
VB
406 .name = "sata-r8a7790",
407 .id = 1,
408 .res = sata1_resources,
409 .num_res = ARRAY_SIZE(sata1_resources),
410 .dma_mask = DMA_BIT_MASK(32),
411};
412
1eabe028 413/* USBHS */
1eabe028
VB
414static const struct resource usbhs_resources[] __initconst = {
415 DEFINE_RES_MEM(0xe6590000, 0x100),
416 DEFINE_RES_IRQ(gic_spi(107)),
417};
418
419struct usbhs_private {
420 struct renesas_usbhs_platform_info info;
421 struct usb_phy *phy;
422};
423
424#define usbhs_get_priv(pdev) \
425 container_of(renesas_usbhs_get_info(pdev), struct usbhs_private, info)
426
427static int usbhs_power_ctrl(struct platform_device *pdev,
428 void __iomem *base, int enable)
429{
430 struct usbhs_private *priv = usbhs_get_priv(pdev);
431
432 if (!priv->phy)
433 return -ENODEV;
434
435 if (enable) {
436 int retval = usb_phy_init(priv->phy);
437
438 if (!retval)
439 retval = usb_phy_set_suspend(priv->phy, 0);
440 return retval;
441 }
442
443 usb_phy_set_suspend(priv->phy, 1);
444 usb_phy_shutdown(priv->phy);
445 return 0;
446}
447
448static int usbhs_hardware_init(struct platform_device *pdev)
449{
450 struct usbhs_private *priv = usbhs_get_priv(pdev);
451 struct usb_phy *phy;
36be7686
MD
452 int ret;
453
454 /* USB0 Function - use PWEN as GPIO input to detect DIP Switch SW5
455 * setting to avoid VBUS short circuit due to wrong cable.
456 * PWEN should be pulled up high if USB Function is selected by SW5
457 */
458 gpio_request_one(RCAR_GP_PIN(5, 18), GPIOF_IN, NULL); /* USB0_PWEN */
459 if (!gpio_get_value(RCAR_GP_PIN(5, 18))) {
460 pr_warn("Error: USB Function not selected - check SW5 + SW6\n");
461 ret = -ENOTSUPP;
462 goto error;
463 }
1eabe028
VB
464
465 phy = usb_get_phy_dev(&pdev->dev, 0);
36be7686
MD
466 if (IS_ERR(phy)) {
467 ret = PTR_ERR(phy);
468 goto error;
469 }
1eabe028
VB
470
471 priv->phy = phy;
472 return 0;
36be7686
MD
473 error:
474 gpio_free(RCAR_GP_PIN(5, 18));
475 return ret;
1eabe028
VB
476}
477
478static int usbhs_hardware_exit(struct platform_device *pdev)
479{
480 struct usbhs_private *priv = usbhs_get_priv(pdev);
481
482 if (!priv->phy)
483 return 0;
484
485 usb_put_phy(priv->phy);
486 priv->phy = NULL;
36be7686
MD
487
488 gpio_free(RCAR_GP_PIN(5, 18));
1eabe028
VB
489 return 0;
490}
491
492static int usbhs_get_id(struct platform_device *pdev)
493{
494 return USBHS_GADGET;
495}
496
497static u32 lager_usbhs_pipe_type[] = {
498 USB_ENDPOINT_XFER_CONTROL,
499 USB_ENDPOINT_XFER_ISOC,
500 USB_ENDPOINT_XFER_ISOC,
501 USB_ENDPOINT_XFER_BULK,
502 USB_ENDPOINT_XFER_BULK,
503 USB_ENDPOINT_XFER_BULK,
504 USB_ENDPOINT_XFER_INT,
505 USB_ENDPOINT_XFER_INT,
506 USB_ENDPOINT_XFER_INT,
507 USB_ENDPOINT_XFER_BULK,
508 USB_ENDPOINT_XFER_BULK,
509 USB_ENDPOINT_XFER_BULK,
510 USB_ENDPOINT_XFER_BULK,
511 USB_ENDPOINT_XFER_BULK,
512 USB_ENDPOINT_XFER_BULK,
513 USB_ENDPOINT_XFER_BULK,
514};
515
516static struct usbhs_private usbhs_priv __initdata = {
517 .info = {
518 .platform_callback = {
519 .power_ctrl = usbhs_power_ctrl,
520 .hardware_init = usbhs_hardware_init,
521 .hardware_exit = usbhs_hardware_exit,
522 .get_id = usbhs_get_id,
523 },
524 .driver_param = {
525 .buswait_bwait = 4,
526 .pipe_type = lager_usbhs_pipe_type,
527 .pipe_size = ARRAY_SIZE(lager_usbhs_pipe_type),
528 },
529 }
530};
531
532static void __init lager_register_usbhs(void)
533{
534 usb_bind_phy("renesas_usbhs", 0, "usb_phy_rcar_gen2");
d2168146 535 platform_device_register_resndata(NULL,
1eabe028
VB
536 "renesas_usbhs", -1,
537 usbhs_resources,
538 ARRAY_SIZE(usbhs_resources),
539 &usbhs_priv.info,
540 sizeof(usbhs_priv.info));
541}
1eabe028
VB
542
543/* USBHS PHY */
544static const struct rcar_gen2_phy_platform_data usbhs_phy_pdata __initconst = {
545 .chan0_pci = 0, /* Channel 0 is USBHS */
546 .chan2_pci = 1, /* Channel 2 is PCI USB */
547};
548
549static const struct resource usbhs_phy_resources[] __initconst = {
550 DEFINE_RES_MEM(0xe6590100, 0x100),
551};
552
d58922ce
KM
553/* I2C */
554static struct i2c_board_info i2c2_devices[] = {
555 {
556 I2C_BOARD_INFO("ak4643", 0x12),
557 }
558};
559
560/* Sound */
561static struct resource rsnd_resources[] __initdata = {
562 [RSND_GEN2_SCU] = DEFINE_RES_MEM(0xec500000, 0x1000),
563 [RSND_GEN2_ADG] = DEFINE_RES_MEM(0xec5a0000, 0x100),
564 [RSND_GEN2_SSIU] = DEFINE_RES_MEM(0xec540000, 0x1000),
565 [RSND_GEN2_SSI] = DEFINE_RES_MEM(0xec541000, 0x1280),
566};
567
568static struct rsnd_ssi_platform_info rsnd_ssi[] = {
50f359d7
KM
569 RSND_SSI(0, gic_spi(370), 0),
570 RSND_SSI(0, gic_spi(371), RSND_SSI_CLK_PIN_SHARE),
d58922ce
KM
571};
572
50f359d7 573static struct rsnd_src_platform_info rsnd_src[2] = {
d58922ce
KM
574 /* no member at this point */
575};
576
50f359d7
KM
577static struct rsnd_dai_platform_info rsnd_dai = {
578 .playback = { .ssi = &rsnd_ssi[0], },
579 .capture = { .ssi = &rsnd_ssi[1], },
580};
581
d58922ce
KM
582static struct rcar_snd_info rsnd_info = {
583 .flags = RSND_GEN2,
584 .ssi_info = rsnd_ssi,
585 .ssi_info_nr = ARRAY_SIZE(rsnd_ssi),
50f359d7
KM
586 .src_info = rsnd_src,
587 .src_info_nr = ARRAY_SIZE(rsnd_src),
588 .dai_info = &rsnd_dai,
589 .dai_info_nr = 1,
d58922ce
KM
590};
591
592static struct asoc_simple_card_info rsnd_card_info = {
593 .name = "AK4643",
594 .card = "SSI01-AK4643",
595 .codec = "ak4642-codec.2-0012",
596 .platform = "rcar_sound",
9f85ff84 597 .daifmt = SND_SOC_DAIFMT_LEFT_J | SND_SOC_DAIFMT_CBM_CFM,
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KM
598 .cpu_dai = {
599 .name = "rcar_sound",
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KM
600 },
601 .codec_dai = {
602 .name = "ak4642-hifi",
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KM
603 .sysclk = 11289600,
604 },
605};
606
607static void __init lager_add_rsnd_device(void)
608{
609 struct platform_device_info cardinfo = {
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KM
610 .name = "asoc-simple-card",
611 .id = -1,
612 .data = &rsnd_card_info,
613 .size_data = sizeof(struct asoc_simple_card_info),
614 .dma_mask = DMA_BIT_MASK(32),
615 };
616
617 i2c_register_board_info(2, i2c2_devices,
618 ARRAY_SIZE(i2c2_devices));
619
620 platform_device_register_resndata(
d2168146 621 NULL, "rcar_sound", -1,
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KM
622 rsnd_resources, ARRAY_SIZE(rsnd_resources),
623 &rsnd_info, sizeof(rsnd_info));
624
625 platform_device_register_full(&cardinfo);
626}
627
40e6a51e
KM
628/* SDHI0 */
629static struct sh_mobile_sdhi_info sdhi0_info __initdata = {
630 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
631 MMC_CAP_POWER_OFF_CARD,
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KM
632 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
633 TMIO_MMC_WRPROTECT_DISABLE,
634};
635
636static struct resource sdhi0_resources[] __initdata = {
637 DEFINE_RES_MEM(0xee100000, 0x200),
638 DEFINE_RES_IRQ(gic_spi(165)),
639};
640
641/* SDHI2 */
642static struct sh_mobile_sdhi_info sdhi2_info __initdata = {
643 .tmio_caps = MMC_CAP_SD_HIGHSPEED | MMC_CAP_SDIO_IRQ |
644 MMC_CAP_POWER_OFF_CARD,
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KM
645 .tmio_flags = TMIO_MMC_HAS_IDLE_WAIT |
646 TMIO_MMC_WRPROTECT_DISABLE,
647};
648
649static struct resource sdhi2_resources[] __initdata = {
650 DEFINE_RES_MEM(0xee140000, 0x100),
651 DEFINE_RES_IRQ(gic_spi(167)),
652};
653
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VB
654/* Internal PCI1 */
655static const struct resource pci1_resources[] __initconst = {
656 DEFINE_RES_MEM(0xee0b0000, 0x10000), /* CFG */
657 DEFINE_RES_MEM(0xee0a0000, 0x10000), /* MEM */
658 DEFINE_RES_IRQ(gic_spi(112)),
659};
660
661static const struct platform_device_info pci1_info __initconst = {
849f7b6c
VB
662 .name = "pci-rcar-gen2",
663 .id = 1,
664 .res = pci1_resources,
665 .num_res = ARRAY_SIZE(pci1_resources),
666 .dma_mask = DMA_BIT_MASK(32),
667};
668
669static void __init lager_add_usb1_device(void)
670{
671 platform_device_register_full(&pci1_info);
672}
673
674/* Internal PCI2 */
675static const struct resource pci2_resources[] __initconst = {
676 DEFINE_RES_MEM(0xee0d0000, 0x10000), /* CFG */
677 DEFINE_RES_MEM(0xee0c0000, 0x10000), /* MEM */
678 DEFINE_RES_IRQ(gic_spi(113)),
679};
680
681static const struct platform_device_info pci2_info __initconst = {
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VB
682 .name = "pci-rcar-gen2",
683 .id = 2,
684 .res = pci2_resources,
685 .num_res = ARRAY_SIZE(pci2_resources),
686 .dma_mask = DMA_BIT_MASK(32),
687};
688
689static void __init lager_add_usb2_device(void)
690{
691 platform_device_register_full(&pci2_info);
692}
693
e3a28ac2 694static const struct pinctrl_map lager_pinctrl_map[] = {
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LP
695 /* DU (CN10: ARGB0, CN13: LVDS) */
696 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
697 "du_rgb666", "du"),
698 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
699 "du_sync_1", "du"),
700 PIN_MAP_MUX_GROUP_DEFAULT("rcar-du-r8a7790", "pfc-r8a7790",
701 "du_clk_out_0", "du"),
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702 /* I2C2 */
703 PIN_MAP_MUX_GROUP_DEFAULT("i2c-rcar.2", "pfc-r8a7790",
704 "i2c2", "i2c2"),
248deabb
GU
705 /* QSPI */
706 PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
707 "qspi_ctrl", "qspi"),
708 PIN_MAP_MUX_GROUP_DEFAULT("qspi.0", "pfc-r8a7790",
709 "qspi_data4", "qspi"),
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LP
710 /* SCIF0 (CN19: DEBUG SERIAL0) */
711 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.6", "pfc-r8a7790",
712 "scif0_data", "scif0"),
713 /* SCIF1 (CN20: DEBUG SERIAL1) */
714 PIN_MAP_MUX_GROUP_DEFAULT("sh-sci.7", "pfc-r8a7790",
715 "scif1_data", "scif1"),
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716 /* SDHI0 */
717 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
718 "sdhi0_data4", "sdhi0"),
719 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
720 "sdhi0_ctrl", "sdhi0"),
721 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.0", "pfc-r8a7790",
722 "sdhi0_cd", "sdhi0"),
723 /* SDHI2 */
724 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
725 "sdhi2_data4", "sdhi2"),
726 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
727 "sdhi2_ctrl", "sdhi2"),
728 PIN_MAP_MUX_GROUP_DEFAULT("sh_mobile_sdhi.2", "pfc-r8a7790",
729 "sdhi2_cd", "sdhi2"),
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730 /* SSI (CN17: sound) */
731 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
732 "ssi0129_ctrl", "ssi"),
733 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
734 "ssi0_data", "ssi"),
735 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
736 "ssi1_data", "ssi"),
737 PIN_MAP_MUX_GROUP_DEFAULT("rcar_sound", "pfc-r8a7790",
738 "audio_clk_a", "audio_clk"),
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GL
739 /* MMCIF1 */
740 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
741 "mmc1_data8", "mmc1"),
742 PIN_MAP_MUX_GROUP_DEFAULT("sh_mmcif.1", "pfc-r8a7790",
743 "mmc1_ctrl", "mmc1"),
4901e136
SH
744 /* Ether */
745 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
746 "eth_link", "eth"),
747 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
748 "eth_mdio", "eth"),
749 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
750 "eth_rmii", "eth"),
751 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-ether", "pfc-r8a7790",
752 "intc_irq0", "intc"),
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VB
753 /* VIN0 */
754 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
755 "vin0_data24", "vin0"),
756 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
757 "vin0_sync", "vin0"),
758 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
759 "vin0_field", "vin0"),
760 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
761 "vin0_clkenb", "vin0"),
762 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.0", "pfc-r8a7790",
763 "vin0_clk", "vin0"),
764 /* VIN1 */
765 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
766 "vin1_data8", "vin1"),
767 PIN_MAP_MUX_GROUP_DEFAULT("r8a7790-vin.1", "pfc-r8a7790",
768 "vin1_clk", "vin1"),
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VB
769 /* USB0 */
770 PIN_MAP_MUX_GROUP_DEFAULT("renesas_usbhs", "pfc-r8a7790",
36be7686 771 "usb0_ovc_vbus", "usb0"),
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VB
772 /* USB1 */
773 PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.1", "pfc-r8a7790",
774 "usb1", "usb1"),
775 /* USB2 */
776 PIN_MAP_MUX_GROUP_DEFAULT("pci-rcar-gen2.2", "pfc-r8a7790",
777 "usb2", "usb2"),
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LP
778};
779
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MD
780static void __init lager_add_standard_devices(void)
781{
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782 int fixed_regulator_idx = 0;
783 int gpio_regulator_idx = 0;
784
3cc828fd 785 r8a7790_clock_init();
e3a28ac2
LP
786
787 pinctrl_register_mappings(lager_pinctrl_map,
788 ARRAY_SIZE(lager_pinctrl_map));
789 r8a7790_pinmux_init();
790
3cc828fd 791 r8a7790_add_standard_devices();
d2168146 792 platform_device_register_data(NULL, "leds-gpio", -1,
1034f4ee
SH
793 &lager_leds_pdata,
794 sizeof(lager_leds_pdata));
d2168146 795 platform_device_register_data(NULL, "gpio-keys", -1,
c3842e4f
SH
796 &lager_keys_pdata,
797 sizeof(lager_keys_pdata));
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KM
798 regulator_register_always_on(fixed_regulator_idx++,
799 "fixed-3.3V", fixed3v3_power_consumers,
63d0539e 800 ARRAY_SIZE(fixed3v3_power_consumers), 3300000);
d2168146 801 platform_device_register_resndata(NULL, "sh_mmcif", 1,
63d0539e
GL
802 mmcif1_resources, ARRAY_SIZE(mmcif1_resources),
803 &mmcif1_pdata, sizeof(mmcif1_pdata));
4901e136 804
5d5a87a5 805 platform_device_register_full(&ether_info);
c75a5afa
LP
806
807 lager_add_du_device();
24cf82f4 808
d2168146 809 platform_device_register_resndata(NULL, "qspi", 0,
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HCM
810 qspi_resources,
811 ARRAY_SIZE(qspi_resources),
812 &qspi_pdata, sizeof(qspi_pdata));
813 spi_register_board_info(spi_info, ARRAY_SIZE(spi_info));
be0647d5 814
d2168146 815 platform_device_register_data(NULL, "reg-fixed-voltage", fixed_regulator_idx++,
be0647d5 816 &vcc_sdhi0_info, sizeof(struct fixed_voltage_config));
d2168146 817 platform_device_register_data(NULL, "reg-fixed-voltage", fixed_regulator_idx++,
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KM
818 &vcc_sdhi2_info, sizeof(struct fixed_voltage_config));
819
d2168146 820 platform_device_register_data(NULL, "gpio-regulator", gpio_regulator_idx++,
be0647d5 821 &vccq_sdhi0_info, sizeof(struct gpio_regulator_config));
d2168146 822 platform_device_register_data(NULL, "gpio-regulator", gpio_regulator_idx++,
be0647d5 823 &vccq_sdhi2_info, sizeof(struct gpio_regulator_config));
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VB
824
825 lager_add_camera1_device();
1e0d2c49
VB
826
827 platform_device_register_full(&sata1_info);
1eabe028 828
d2168146 829 platform_device_register_resndata(NULL, "usb_phy_rcar_gen2",
1eabe028
VB
830 -1, usbhs_phy_resources,
831 ARRAY_SIZE(usbhs_phy_resources),
832 &usbhs_phy_pdata,
833 sizeof(usbhs_phy_pdata));
834 lager_register_usbhs();
849f7b6c
VB
835 lager_add_usb1_device();
836 lager_add_usb2_device();
d58922ce
KM
837
838 lager_add_rsnd_device();
40e6a51e 839
d2168146 840 platform_device_register_resndata(NULL, "sh_mobile_sdhi", 0,
40e6a51e
KM
841 sdhi0_resources, ARRAY_SIZE(sdhi0_resources),
842 &sdhi0_info, sizeof(struct sh_mobile_sdhi_info));
d2168146 843 platform_device_register_resndata(NULL, "sh_mobile_sdhi", 2,
40e6a51e
KM
844 sdhi2_resources, ARRAY_SIZE(sdhi2_resources),
845 &sdhi2_info, sizeof(struct sh_mobile_sdhi_info));
3cc828fd
MD
846}
847
48c8b96f
SS
848/*
849 * Ether LEDs on the Lager board are named LINK and ACTIVE which corresponds
850 * to non-default 01 setting of the Micrel KSZ8041 PHY control register 1 bits
851 * 14-15. We have to set them back to 01 from the default 00 value each time
852 * the PHY is reset. It's also important because the PHY's LED0 signal is
853 * connected to SoC's ETH_LINK signal and in the PHY's default mode it will
854 * bounce on and off after each packet, which we apparently want to avoid.
855 */
856static int lager_ksz8041_fixup(struct phy_device *phydev)
857{
858 u16 phyctrl1 = phy_read(phydev, 0x1e);
859
860 phyctrl1 &= ~0xc000;
861 phyctrl1 |= 0x4000;
862 return phy_write(phydev, 0x1e, phyctrl1);
863}
864
865static void __init lager_init(void)
866{
867 lager_add_standard_devices();
868
5812b8b2
SS
869 irq_set_irq_type(irq_pin(0), IRQ_TYPE_LEVEL_LOW);
870
6802cdc5
SH
871 if (IS_ENABLED(CONFIG_PHYLIB))
872 phy_register_fixup_for_id("r8a7790-ether-ff:01",
873 lager_ksz8041_fixup);
48c8b96f
SS
874}
875
27113d63 876static const char * const lager_boards_compat_dt[] __initconst = {
3cc828fd
MD
877 "renesas,lager",
878 NULL,
879};
880
881DT_MACHINE_START(LAGER_DT, "lager")
ad09cb83 882 .smp = smp_ops(r8a7790_smp_ops),
a5d62681 883 .init_early = shmobile_init_delay,
50c517d9 884 .init_time = rcar_gen2_timer_init,
48c8b96f 885 .init_machine = lager_init,
3fbbcbdf 886 .init_late = shmobile_init_late,
5f65c5bd 887 .reserve = rcar_gen2_reserve,
3cc828fd
MD
888 .dt_compat = lager_boards_compat_dt,
889MACHINE_END