Commit | Line | Data |
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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 LT |
2 | /* |
3 | * linux/arch/arm/mach-sa1100/shannon.c | |
4 | */ | |
5 | ||
1da177e4 LT |
6 | #include <linux/init.h> |
7 | #include <linux/device.h> | |
8 | #include <linux/kernel.h> | |
6920b5a7 | 9 | #include <linux/platform_data/sa11x0-serial.h> |
1da177e4 LT |
10 | #include <linux/tty.h> |
11 | #include <linux/mtd/mtd.h> | |
12 | #include <linux/mtd/partitions.h> | |
13 | ||
e1b7a72a RK |
14 | #include <video/sa1100fb.h> |
15 | ||
a09e64fb | 16 | #include <mach/hardware.h> |
1da177e4 LT |
17 | #include <asm/mach-types.h> |
18 | #include <asm/setup.h> | |
19 | ||
20 | #include <asm/mach/arch.h> | |
21 | #include <asm/mach/flash.h> | |
22 | #include <asm/mach/map.h> | |
a1fd844c | 23 | #include <linux/platform_data/mfd-mcp-sa11x0.h> |
a09e64fb | 24 | #include <mach/shannon.h> |
f314f33b | 25 | #include <mach/irqs.h> |
1da177e4 LT |
26 | |
27 | #include "generic.h" | |
28 | ||
29 | static struct mtd_partition shannon_partitions[] = { | |
30 | { | |
31 | .name = "BLOB boot loader", | |
32 | .offset = 0, | |
33 | .size = 0x20000 | |
34 | }, | |
35 | { | |
36 | .name = "kernel", | |
37 | .offset = MTDPART_OFS_APPEND, | |
38 | .size = 0xe0000 | |
39 | }, | |
93982535 | 40 | { |
1da177e4 LT |
41 | .name = "initrd", |
42 | .offset = MTDPART_OFS_APPEND, | |
43 | .size = MTDPART_SIZ_FULL | |
44 | } | |
45 | }; | |
46 | ||
47 | static struct flash_platform_data shannon_flash_data = { | |
48 | .map_name = "cfi_probe", | |
49 | .parts = shannon_partitions, | |
50 | .nr_parts = ARRAY_SIZE(shannon_partitions), | |
51 | }; | |
52 | ||
a181099e RK |
53 | static struct resource shannon_flash_resource = |
54 | DEFINE_RES_MEM(SA1100_CS0_PHYS, SZ_4M); | |
1da177e4 | 55 | |
323cdfc1 RK |
56 | static struct mcp_plat_data shannon_mcp_data = { |
57 | .mccr0 = MCCR0_ADM, | |
58 | .sclk_rate = 11981000, | |
59 | }; | |
60 | ||
e1b7a72a RK |
61 | static struct sa1100fb_mach_info shannon_lcd_info = { |
62 | .pixclock = 152500, .bpp = 8, | |
63 | .xres = 640, .yres = 480, | |
64 | ||
65 | .hsync_len = 4, .vsync_len = 3, | |
66 | .left_margin = 2, .upper_margin = 0, | |
67 | .right_margin = 1, .lower_margin = 0, | |
68 | ||
69 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
70 | ||
71 | .lccr0 = LCCR0_Color | LCCR0_Dual | LCCR0_Pas, | |
72 | .lccr3 = LCCR3_ACBsDiv(512), | |
73 | }; | |
74 | ||
1da177e4 LT |
75 | static void __init shannon_init(void) |
76 | { | |
e36e26a8 | 77 | sa11x0_ppc_configure_mcp(); |
e1b7a72a | 78 | sa11x0_register_lcd(&shannon_lcd_info); |
7a5b4e16 RK |
79 | sa11x0_register_mtd(&shannon_flash_data, &shannon_flash_resource, 1); |
80 | sa11x0_register_mcp(&shannon_mcp_data); | |
1da177e4 LT |
81 | } |
82 | ||
83 | static void __init shannon_map_io(void) | |
84 | { | |
85 | sa1100_map_io(); | |
86 | ||
87 | sa1100_register_uart(0, 3); | |
88 | sa1100_register_uart(1, 1); | |
89 | ||
90 | Ser1SDCR0 |= SDCR0_SUS; | |
91 | GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD); | |
92 | GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET; | |
93 | GPDR &= ~GPIO_UART_RXD; | |
94 | PPAR |= PPAR_UPR; | |
95 | ||
96 | /* reset the codec */ | |
97 | GPCR = SHANNON_GPIO_CODEC_RESET; | |
98 | GPSR = SHANNON_GPIO_CODEC_RESET; | |
99 | } | |
100 | ||
101 | MACHINE_START(SHANNON, "Shannon (AKA: Tuxscreen)") | |
17f4425d | 102 | .atag_offset = 0x100, |
e9dea0c6 | 103 | .map_io = shannon_map_io, |
f314f33b | 104 | .nr_irqs = SA1100_NR_IRQS, |
e9dea0c6 | 105 | .init_irq = sa1100_init_irq, |
6bb27d73 | 106 | .init_time = sa1100_timer_init, |
1da177e4 | 107 | .init_machine = shannon_init, |
7fea1ba5 | 108 | .init_late = sa11x0_init_late, |
d9ca5839 | 109 | .restart = sa11x0_restart, |
1da177e4 | 110 | MACHINE_END |