[linux-2.6-block.git] / arch / arm / mach-sa1100 / neponset.c

// SPDX-License-Identifier: GPL-2.0
/*
 * linux/arch/arm/mach-sa1100/neponset.c
 */
#include <linux/err.h>
#include <linux/gpio/driver.h>
#include <linux/gpio/gpio-reg.h>
#include <linux/gpio/machine.h>
#include <linux/init.h>
#include <linux/ioport.h>
#include <linux/irq.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pm.h>
#include <linux/serial_core.h>
#include <linux/slab.h>
#include <linux/smc91x.h>

#include <asm/mach-types.h>
#include <asm/mach/map.h>
#include <asm/hardware/sa1111.h>
#include <linux/sizes.h>

#include <mach/hardware.h>
#include <mach/assabet.h>
#include <mach/neponset.h>
#include <mach/irqs.h>

#define NEP_IRQ_SMC91X	0
#define NEP_IRQ_USAR	1
#define NEP_IRQ_SA1111	2
#define NEP_IRQ_NR	3

#define WHOAMI		0x00
#define LEDS		0x10
#define SWPK		0x20
#define IRR		0x24
#define KP_Y_IN		0x80
#define KP_X_OUT	0x90
#define NCR_0		0xa0
#define MDM_CTL_0	0xb0
#define MDM_CTL_1	0xb4
#define AUD_CTL		0xc0

#define IRR_ETHERNET	(1 << 0)
#define IRR_USAR	(1 << 1)
#define IRR_SA1111	(1 << 2)

#define NCR_NGPIO	7
#define MDM_CTL0_NGPIO	4
#define MDM_CTL1_NGPIO	6
#define AUD_NGPIO	2

extern void sa1110_mb_disable(void);

#define to_neponset_gpio_chip(x) container_of(x, struct neponset_gpio_chip, gc)

static const char *neponset_ncr_names[] = {
	"gp01_off", "tp_power", "ms_power", "enet_osc",
	"spi_kb_wk_up", "a0vpp", "a1vpp"
};

static const char *neponset_mdmctl0_names[] = {
	"rts3", "dtr3", "rts1", "dtr1",
};

static const char *neponset_mdmctl1_names[] = {
	"cts3", "dsr3", "dcd3", "cts1", "dsr1", "dcd1"
};

static const char *neponset_aud_names[] = {
	"sel_1341", "mute_1341",
};

struct neponset_drvdata {
	void __iomem *base;
	struct platform_device *sa1111;
	struct platform_device *smc91x;
	unsigned irq_base;
	struct gpio_chip *gpio[4];
};

static struct gpiod_lookup_table neponset_uart1_gpio_table = {
	.dev_id = "sa11x0-uart.1",
	.table = {
		GPIO_LOOKUP("neponset-mdm-ctl0", 2, "rts", GPIO_ACTIVE_LOW),
		GPIO_LOOKUP("neponset-mdm-ctl0", 3, "dtr", GPIO_ACTIVE_LOW),
		GPIO_LOOKUP("neponset-mdm-ctl1", 3, "cts", GPIO_ACTIVE_LOW),
		GPIO_LOOKUP("neponset-mdm-ctl1", 4, "dsr", GPIO_ACTIVE_LOW),
		GPIO_LOOKUP("neponset-mdm-ctl1", 5, "dcd", GPIO_ACTIVE_LOW),
		{ },
	},
};

static struct gpiod_lookup_table neponset_uart3_gpio_table = {
	.dev_id = "sa11x0-uart.3",
	.table = {
		GPIO_LOOKUP("neponset-mdm-ctl0", 0, "rts", GPIO_ACTIVE_LOW),
		GPIO_LOOKUP("neponset-mdm-ctl0", 1, "dtr", GPIO_ACTIVE_LOW),
		GPIO_LOOKUP("neponset-mdm-ctl1", 0, "cts", GPIO_ACTIVE_LOW),
		GPIO_LOOKUP("neponset-mdm-ctl1", 1, "dsr", GPIO_ACTIVE_LOW),
		GPIO_LOOKUP("neponset-mdm-ctl1", 2, "dcd", GPIO_ACTIVE_LOW),
		{ },
	},
};

static struct gpiod_lookup_table neponset_pcmcia_table = {
	.dev_id = "1800",
	.table = {
		GPIO_LOOKUP("sa1111", 1, "a0vcc", GPIO_ACTIVE_HIGH),
		GPIO_LOOKUP("sa1111", 0, "a1vcc", GPIO_ACTIVE_HIGH),
		GPIO_LOOKUP("neponset-ncr", 5, "a0vpp", GPIO_ACTIVE_HIGH),
		GPIO_LOOKUP("neponset-ncr", 6, "a1vpp", GPIO_ACTIVE_HIGH),
		GPIO_LOOKUP("sa1111", 2, "b0vcc", GPIO_ACTIVE_HIGH),
		GPIO_LOOKUP("sa1111", 3, "b1vcc", GPIO_ACTIVE_HIGH),
		{ },
	},
};

static struct neponset_drvdata *nep;

void neponset_ncr_frob(unsigned int mask, unsigned int val)
{
	struct neponset_drvdata *n = nep;
	unsigned long m = mask, v = val;

	if (nep)
		n->gpio[0]->set_multiple(n->gpio[0], &m, &v);
	else
		WARN(1, "nep unset\n");
}
EXPORT_SYMBOL(neponset_ncr_frob);

/*
 * Install handler for Neponset IRQ.  Note that we have to loop here
 * since the ETHERNET and USAR IRQs are level based, and we need to
 * ensure that the IRQ signal is deasserted before returning.  This
 * is rather unfortunate.
 */
static void neponset_irq_handler(struct irq_desc *desc)
{
	struct neponset_drvdata *d = irq_desc_get_handler_data(desc);
	unsigned int irr;

	while (1) {
		/*
		 * Acknowledge the parent IRQ.
		 */
		desc->irq_data.chip->irq_ack(&desc->irq_data);

		/*
		 * Read the interrupt reason register.  Let's have all
		 * active IRQ bits high.  Note: there is a typo in the
		 * Neponset user's guide for the SA1111 IRR level.
		 */
		irr = readb_relaxed(d->base + IRR);
		irr ^= IRR_ETHERNET | IRR_USAR;

		if ((irr & (IRR_ETHERNET | IRR_USAR | IRR_SA1111)) == 0)
			break;

		/*
		 * Since there is no individual mask, we have to
		 * mask the parent IRQ.  This is safe, since we'll
		 * recheck the register for any pending IRQs.
		 */
		if (irr & (IRR_ETHERNET | IRR_USAR)) {
			desc->irq_data.chip->irq_mask(&desc->irq_data);

			/*
			 * Ack the interrupt now to prevent re-entering
			 * this neponset handler.  Again, this is safe
			 * since we'll check the IRR register prior to
			 * leaving.
			 */
			desc->irq_data.chip->irq_ack(&desc->irq_data);

			if (irr & IRR_ETHERNET)
				generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X);

			if (irr & IRR_USAR)
				generic_handle_irq(d->irq_base + NEP_IRQ_USAR);

			desc->irq_data.chip->irq_unmask(&desc->irq_data);
		}

		if (irr & IRR_SA1111)
			generic_handle_irq(d->irq_base + NEP_IRQ_SA1111);
	}
}

/* Yes, we really do not have any kind of masking or unmasking */
static void nochip_noop(struct irq_data *irq)
{
}

static struct irq_chip nochip = {
	.name = "neponset",
	.irq_ack = nochip_noop,
	.irq_mask = nochip_noop,
	.irq_unmask = nochip_noop,
};

static int neponset_init_gpio(struct gpio_chip **gcp,
	struct device *dev, const char *label, void __iomem *reg,
	unsigned num, bool in, const char *const * names)
{
	struct gpio_chip *gc;

	gc = gpio_reg_init(dev, reg, -1, num, label, in ? 0xffffffff : 0,
			   readl_relaxed(reg), names, NULL, NULL);
	if (IS_ERR(gc))
		return PTR_ERR(gc);

	*gcp = gc;

	return 0;
}

static struct sa1111_platform_data sa1111_info = {
	.disable_devs	= SA1111_DEVID_PS2_MSE,
};

static int neponset_probe(struct platform_device *dev)
{
	struct neponset_drvdata *d;
	struct resource *nep_res, *sa1111_res, *smc91x_res;
	struct resource sa1111_resources[] = {
		DEFINE_RES_MEM(0x40000000, SZ_8K),
		{ .flags = IORESOURCE_IRQ },
	};
	struct platform_device_info sa1111_devinfo = {
		.parent = &dev->dev,
		.name = "sa1111",
		.id = 0,
		.res = sa1111_resources,
		.num_res = ARRAY_SIZE(sa1111_resources),
		.data = &sa1111_info,
		.size_data = sizeof(sa1111_info),
		.dma_mask = 0xffffffffUL,
	};
	struct resource smc91x_resources[] = {
		DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS,
			0x02000000, "smc91x-regs"),
		DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000,
			0x02000000, "smc91x-attrib"),
		{ .flags = IORESOURCE_IRQ },
	};
	struct smc91x_platdata smc91x_platdata = {
		.flags = SMC91X_USE_8BIT | SMC91X_IO_SHIFT_2 | SMC91X_NOWAIT,
	};
	struct platform_device_info smc91x_devinfo = {
		.parent = &dev->dev,
		.name = "smc91x",
		.id = 0,
		.res = smc91x_resources,
		.num_res = ARRAY_SIZE(smc91x_resources),
		.data = &smc91x_platdata,
		.size_data = sizeof(smc91x_platdata),
	};
	int ret, irq;

	if (nep)
		return -EBUSY;

	irq = ret = platform_get_irq(dev, 0);
	if (ret < 0)
		goto err_alloc;

	nep_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
	smc91x_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
	sa1111_res = platform_get_resource(dev, IORESOURCE_MEM, 2);
	if (!nep_res || !smc91x_res || !sa1111_res) {
		ret = -ENXIO;
		goto err_alloc;
	}

	d = kzalloc(sizeof(*d), GFP_KERNEL);
	if (!d) {
		ret = -ENOMEM;
		goto err_alloc;
	}

	d->base = ioremap(nep_res->start, SZ_4K);
	if (!d->base) {
		ret = -ENOMEM;
		goto err_ioremap;
	}

	if (readb_relaxed(d->base + WHOAMI) != 0x11) {
		dev_warn(&dev->dev, "Neponset board detected, but wrong ID: %02x\n",
			 readb_relaxed(d->base + WHOAMI));
		ret = -ENODEV;
		goto err_id;
	}

	ret = irq_alloc_descs(-1, IRQ_BOARD_START, NEP_IRQ_NR, -1);
	if (ret <= 0) {
		dev_err(&dev->dev, "unable to allocate %u irqs: %d\n",
			NEP_IRQ_NR, ret);
		if (ret == 0)
			ret = -ENOMEM;
		goto err_irq_alloc;
	}

	d->irq_base = ret;

	irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip,
		handle_simple_irq);
	irq_clear_status_flags(d->irq_base + NEP_IRQ_SMC91X, IRQ_NOREQUEST | IRQ_NOPROBE);
	irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip,
		handle_simple_irq);
	irq_clear_status_flags(d->irq_base + NEP_IRQ_USAR, IRQ_NOREQUEST | IRQ_NOPROBE);
	irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip);

	irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
	irq_set_chained_handler_and_data(irq, neponset_irq_handler, d);

	/* Disable GPIO 0/1 drivers so the buttons work on the Assabet */
	writeb_relaxed(NCR_GP01_OFF, d->base + NCR_0);

	neponset_init_gpio(&d->gpio[0], &dev->dev, "neponset-ncr",
			   d->base + NCR_0, NCR_NGPIO, false,
			   neponset_ncr_names);
	neponset_init_gpio(&d->gpio[1], &dev->dev, "neponset-mdm-ctl0",
			   d->base + MDM_CTL_0, MDM_CTL0_NGPIO, false,
			   neponset_mdmctl0_names);
	neponset_init_gpio(&d->gpio[2], &dev->dev, "neponset-mdm-ctl1",
			   d->base + MDM_CTL_1, MDM_CTL1_NGPIO, true,
			   neponset_mdmctl1_names);
	neponset_init_gpio(&d->gpio[3], &dev->dev, "neponset-aud-ctl",
			   d->base + AUD_CTL, AUD_NGPIO, false,
			   neponset_aud_names);

	gpiod_add_lookup_table(&neponset_uart1_gpio_table);
	gpiod_add_lookup_table(&neponset_uart3_gpio_table);
	gpiod_add_lookup_table(&neponset_pcmcia_table);

	/*
	 * We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately
	 * something on the Neponset activates this IRQ on sleep (eth?)
	 */
#if 0
	enable_irq_wake(irq);
#endif

	dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n",
		 d->irq_base, d->irq_base + NEP_IRQ_NR - 1);
	nep = d;

	/* Ensure that the memory bus request/grant signals are setup */
	sa1110_mb_disable();

	sa1111_resources[0].parent = sa1111_res;
	sa1111_resources[1].start = d->irq_base + NEP_IRQ_SA1111;
	sa1111_resources[1].end = d->irq_base + NEP_IRQ_SA1111;
	d->sa1111 = platform_device_register_full(&sa1111_devinfo);

	smc91x_resources[0].parent = smc91x_res;
	smc91x_resources[1].parent = smc91x_res;
	smc91x_resources[2].start = d->irq_base + NEP_IRQ_SMC91X;
	smc91x_resources[2].end = d->irq_base + NEP_IRQ_SMC91X;
	d->smc91x = platform_device_register_full(&smc91x_devinfo);

	platform_set_drvdata(dev, d);

	return 0;

 err_irq_alloc:
 err_id:
	iounmap(d->base);
 err_ioremap:
	kfree(d);
 err_alloc:
	return ret;
}

static int neponset_remove(struct platform_device *dev)
{
	struct neponset_drvdata *d = platform_get_drvdata(dev);
	int irq = platform_get_irq(dev, 0);

	if (!IS_ERR(d->sa1111))
		platform_device_unregister(d->sa1111);
	if (!IS_ERR(d->smc91x))
		platform_device_unregister(d->smc91x);

	gpiod_remove_lookup_table(&neponset_pcmcia_table);
	gpiod_remove_lookup_table(&neponset_uart3_gpio_table);
	gpiod_remove_lookup_table(&neponset_uart1_gpio_table);

	irq_set_chained_handler(irq, NULL);
	irq_free_descs(d->irq_base, NEP_IRQ_NR);
	nep = NULL;
	iounmap(d->base);
	kfree(d);

	return 0;
}

#ifdef CONFIG_PM_SLEEP
static int neponset_resume(struct device *dev)
{
	struct neponset_drvdata *d = dev_get_drvdata(dev);
	int i, ret = 0;

	for (i = 0; i < ARRAY_SIZE(d->gpio); i++) {
		ret = gpio_reg_resume(d->gpio[i]);
		if (ret)
			break;
	}

	return ret;
}

static const struct dev_pm_ops neponset_pm_ops = {
	.resume_noirq = neponset_resume,
	.restore_noirq = neponset_resume,
};
#define PM_OPS &neponset_pm_ops
#else
#define PM_OPS NULL
#endif

static struct platform_driver neponset_device_driver = {
	.probe		= neponset_probe,
	.remove		= neponset_remove,
	.driver		= {
		.name	= "neponset",
		.pm	= PM_OPS,
	},
};

static int __init neponset_init(void)
{
	return platform_driver_register(&neponset_device_driver);
}

subsys_initcall(neponset_init);
Commit	Line	Data
b2441318	1	// SPDX-License-Identifier: GPL-2.0
1da177e4 LT	2	/*
1da177e4 LT	3	* linux/arch/arm/mach-sa1100/neponset.c
1da177e4	4	*/
9590e898	5	#include <linux/err.h>
f85fac0e RK	6	#include <linux/gpio/driver.h>
f85fac0e RK	7	#include <linux/gpio/gpio-reg.h>
e2125d05	8	#include <linux/gpio/machine.h>
1da177e4	9	#include <linux/init.h>
1da177e4	10	#include <linux/ioport.h>
ced8d21c	11	#include <linux/irq.h>
92e617d9	12	#include <linux/kernel.h>
ae14c2e2	13	#include <linux/module.h>
d052d1be	14	#include <linux/platform_device.h>
51f93390	15	#include <linux/pm.h>
92e617d9	16	#include <linux/serial_core.h>
ae14c2e2	17	#include <linux/slab.h>
b70661c7	18	#include <linux/smc91x.h>
1da177e4	19
1da177e4	20	#include <asm/mach-types.h>
1da177e4	21	#include <asm/mach/map.h>
1da177e4	22	#include <asm/hardware/sa1111.h>
87dfb311	23	#include <linux/sizes.h>
1da177e4	24
92e617d9 RK	25	#include <mach/hardware.h>
	26	#include <mach/assabet.h>
	27	#include <mach/neponset.h>
f314f33b	28	#include <mach/irqs.h>
92e617d9	29
ced8d21c RK	30	#define NEP_IRQ_SMC91X 0
	31	#define NEP_IRQ_USAR 1
	32	#define NEP_IRQ_SA1111 2
	33	#define NEP_IRQ_NR 3
	34
f942b0fd RK	35	#define WHOAMI 0x00
	36	#define LEDS 0x10
	37	#define SWPK 0x20
	38	#define IRR 0x24
	39	#define KP_Y_IN 0x80
	40	#define KP_X_OUT 0x90
	41	#define NCR_0 0xa0
	42	#define MDM_CTL_0 0xb0
	43	#define MDM_CTL_1 0xb4
	44	#define AUD_CTL 0xc0
	45
	46	#define IRR_ETHERNET (1 << 0)
	47	#define IRR_USAR (1 << 1)
	48	#define IRR_SA1111 (1 << 2)
	49
f85fac0e	50	#define NCR_NGPIO 7
f85fac0e	51	#define MDM_CTL0_NGPIO 4
f85fac0e	52	#define MDM_CTL1_NGPIO 6
f85fac0e	53	#define AUD_NGPIO 2
f942b0fd	54
bab50a35 RK	55	extern void sa1110_mb_disable(void);
bab50a35 RK	56
f85fac0e RK	57	#define to_neponset_gpio_chip(x) container_of(x, struct neponset_gpio_chip, gc)
	58
	59	static const char *neponset_ncr_names[] = {
	60	"gp01_off", "tp_power", "ms_power", "enet_osc",
	61	"spi_kb_wk_up", "a0vpp", "a1vpp"
	62	};
	63
	64	static const char *neponset_mdmctl0_names[] = {
	65	"rts3", "dtr3", "rts1", "dtr1",
	66	};
	67
	68	static const char *neponset_mdmctl1_names[] = {
	69	"cts3", "dsr3", "dcd3", "cts1", "dsr1", "dcd1"
	70	};
	71
	72	static const char *neponset_aud_names[] = {
	73	"sel_1341", "mute_1341",
	74	};
	75
ae14c2e2	76	struct neponset_drvdata {
f942b0fd	77	void __iomem *base;
9590e898 RK	78	struct platform_device *sa1111;
9590e898 RK	79	struct platform_device *smc91x;
ced8d21c	80	unsigned irq_base;
f85fac0e	81	struct gpio_chip *gpio[4];
ae14c2e2 RK	82	};
ae14c2e2 RK	83
5c9e4d8c RK	84	static struct gpiod_lookup_table neponset_uart1_gpio_table = {
	85	.dev_id = "sa11x0-uart.1",
	86	.table = {
	87	GPIO_LOOKUP("neponset-mdm-ctl0", 2, "rts", GPIO_ACTIVE_LOW),
	88	GPIO_LOOKUP("neponset-mdm-ctl0", 3, "dtr", GPIO_ACTIVE_LOW),
	89	GPIO_LOOKUP("neponset-mdm-ctl1", 3, "cts", GPIO_ACTIVE_LOW),
	90	GPIO_LOOKUP("neponset-mdm-ctl1", 4, "dsr", GPIO_ACTIVE_LOW),
	91	GPIO_LOOKUP("neponset-mdm-ctl1", 5, "dcd", GPIO_ACTIVE_LOW),
	92	{ },
	93	},
	94	};
	95
	96	static struct gpiod_lookup_table neponset_uart3_gpio_table = {
	97	.dev_id = "sa11x0-uart.3",
	98	.table = {
	99	GPIO_LOOKUP("neponset-mdm-ctl0", 0, "rts", GPIO_ACTIVE_LOW),
	100	GPIO_LOOKUP("neponset-mdm-ctl0", 1, "dtr", GPIO_ACTIVE_LOW),
	101	GPIO_LOOKUP("neponset-mdm-ctl1", 0, "cts", GPIO_ACTIVE_LOW),
	102	GPIO_LOOKUP("neponset-mdm-ctl1", 1, "dsr", GPIO_ACTIVE_LOW),
	103	GPIO_LOOKUP("neponset-mdm-ctl1", 2, "dcd", GPIO_ACTIVE_LOW),
	104	{ },
	105	},
	106	};
	107
e2125d05 RK	108	static struct gpiod_lookup_table neponset_pcmcia_table = {
	109	.dev_id = "1800",
	110	.table = {
	111	GPIO_LOOKUP("sa1111", 1, "a0vcc", GPIO_ACTIVE_HIGH),
	112	GPIO_LOOKUP("sa1111", 0, "a1vcc", GPIO_ACTIVE_HIGH),
	113	GPIO_LOOKUP("neponset-ncr", 5, "a0vpp", GPIO_ACTIVE_HIGH),
	114	GPIO_LOOKUP("neponset-ncr", 6, "a1vpp", GPIO_ACTIVE_HIGH),
	115	GPIO_LOOKUP("sa1111", 2, "b0vcc", GPIO_ACTIVE_HIGH),
	116	GPIO_LOOKUP("sa1111", 3, "b1vcc", GPIO_ACTIVE_HIGH),
	117	{ },
	118	},
	119	};
	120
f85fac0e	121	static struct neponset_drvdata *nep;
f942b0fd	122
6ad1b614 RK	123	void neponset_ncr_frob(unsigned int mask, unsigned int val)
6ad1b614 RK	124	{
f85fac0e RK	125	struct neponset_drvdata *n = nep;
	126	unsigned long m = mask, v = val;
	127
	128	if (nep)
	129	n->gpio[0]->set_multiple(n->gpio[0], &m, &v);
	130	else
	131	WARN(1, "nep unset\n");
6ad1b614	132	}
ef0c1484	133	EXPORT_SYMBOL(neponset_ncr_frob);
6ad1b614	134
1da177e4 LT	135	/*
	136	* Install handler for Neponset IRQ. Note that we have to loop here
	137	* since the ETHERNET and USAR IRQs are level based, and we need to
	138	* ensure that the IRQ signal is deasserted before returning. This
	139	* is rather unfortunate.
	140	*/
bd0b9ac4	141	static void neponset_irq_handler(struct irq_desc *desc)
1da177e4	142	{
ced8d21c	143	struct neponset_drvdata *d = irq_desc_get_handler_data(desc);
1da177e4 LT	144	unsigned int irr;
	145
	146	while (1) {
1da177e4 LT	147	/*
	148	* Acknowledge the parent IRQ.
	149	*/
c4e8964e	150	desc->irq_data.chip->irq_ack(&desc->irq_data);
1da177e4 LT	151
	152	/*
	153	* Read the interrupt reason register. Let's have all
	154	* active IRQ bits high. Note: there is a typo in the
	155	* Neponset user's guide for the SA1111 IRR level.
	156	*/
f942b0fd RK	157	irr = readb_relaxed(d->base + IRR);
f942b0fd RK	158	irr ^= IRR_ETHERNET \| IRR_USAR;
1da177e4 LT	159
	160	if ((irr & (IRR_ETHERNET \| IRR_USAR \| IRR_SA1111)) == 0)
	161	break;
	162
	163	/*
	164	* Since there is no individual mask, we have to
	165	* mask the parent IRQ. This is safe, since we'll
	166	* recheck the register for any pending IRQs.
	167	*/
	168	if (irr & (IRR_ETHERNET \| IRR_USAR)) {
c4e8964e	169	desc->irq_data.chip->irq_mask(&desc->irq_data);
1da177e4	170
d782f33d RK	171	/*
	172	* Ack the interrupt now to prevent re-entering
	173	* this neponset handler. Again, this is safe
	174	* since we'll check the IRR register prior to
	175	* leaving.
	176	*/
c4e8964e	177	desc->irq_data.chip->irq_ack(&desc->irq_data);
d782f33d	178
ced8d21c RK	179	if (irr & IRR_ETHERNET)
ced8d21c RK	180	generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X);
1da177e4	181
ced8d21c RK	182	if (irr & IRR_USAR)
ced8d21c RK	183	generic_handle_irq(d->irq_base + NEP_IRQ_USAR);
1da177e4	184
c4e8964e	185	desc->irq_data.chip->irq_unmask(&desc->irq_data);
1da177e4 LT	186	}
1da177e4 LT	187
ced8d21c RK	188	if (irr & IRR_SA1111)
ced8d21c RK	189	generic_handle_irq(d->irq_base + NEP_IRQ_SA1111);
1da177e4 LT	190	}
	191	}
	192
ced8d21c	193	/* Yes, we really do not have any kind of masking or unmasking */
71045520 RK	194	static void nochip_noop(struct irq_data *irq)
	195	{
	196	}
	197
	198	static struct irq_chip nochip = {
	199	.name = "neponset",
	200	.irq_ack = nochip_noop,
	201	.irq_mask = nochip_noop,
	202	.irq_unmask = nochip_noop,
	203	};
	204
f85fac0e RK	205	static int neponset_init_gpio(struct gpio_chip **gcp,
	206	struct device dev, const char label, void __iomem *reg,
	207	unsigned num, bool in, const char const names)
	208	{
	209	struct gpio_chip *gc;
	210
	211	gc = gpio_reg_init(dev, reg, -1, num, label, in ? 0xffffffff : 0,
	212	readl_relaxed(reg), names, NULL, NULL);
	213	if (IS_ERR(gc))
	214	return PTR_ERR(gc);
	215
	216	*gcp = gc;
	217
	218	return 0;
	219	}
	220
92e617d9	221	static struct sa1111_platform_data sa1111_info = {
07be45f5	222	.disable_devs = SA1111_DEVID_PS2_MSE,
92e617d9 RK	223	};
92e617d9 RK	224
351a102d	225	static int neponset_probe(struct platform_device *dev)
1da177e4	226	{
ae14c2e2	227	struct neponset_drvdata *d;
f942b0fd	228	struct resource nep_res, sa1111_res, *smc91x_res;
ced8d21c RK	229	struct resource sa1111_resources[] = {
	230	DEFINE_RES_MEM(0x40000000, SZ_8K),
	231	{ .flags = IORESOURCE_IRQ },
	232	};
9590e898 RK	233	struct platform_device_info sa1111_devinfo = {
	234	.parent = &dev->dev,
	235	.name = "sa1111",
	236	.id = 0,
	237	.res = sa1111_resources,
	238	.num_res = ARRAY_SIZE(sa1111_resources),
	239	.data = &sa1111_info,
	240	.size_data = sizeof(sa1111_info),
	241	.dma_mask = 0xffffffffUL,
	242	};
ced8d21c RK	243	struct resource smc91x_resources[] = {
	244	DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS,
	245	0x02000000, "smc91x-regs"),
	246	DEFINE_RES_MEM_NAMED(SA1100_CS3_PHYS + 0x02000000,
	247	0x02000000, "smc91x-attrib"),
	248	{ .flags = IORESOURCE_IRQ },
	249	};
b70661c7 AB	250	struct smc91x_platdata smc91x_platdata = {
	251	.flags = SMC91X_USE_8BIT \| SMC91X_IO_SHIFT_2 \| SMC91X_NOWAIT,
	252	};
9590e898 RK	253	struct platform_device_info smc91x_devinfo = {
	254	.parent = &dev->dev,
	255	.name = "smc91x",
	256	.id = 0,
	257	.res = smc91x_resources,
	258	.num_res = ARRAY_SIZE(smc91x_resources),
04b91701 AB	259	.data = &smc91x_platdata,
04b91701 AB	260	.size_data = sizeof(smc91x_platdata),
9590e898	261	};
b6bdfcf5 RK	262	int ret, irq;
b6bdfcf5 RK	263
f85fac0e	264	if (nep)
f942b0fd RK	265	return -EBUSY;
f942b0fd RK	266
b6bdfcf5 RK	267	irq = ret = platform_get_irq(dev, 0);
	268	if (ret < 0)
	269	goto err_alloc;
ae14c2e2	270
f942b0fd	271	nep_res = platform_get_resource(dev, IORESOURCE_MEM, 0);
d2e539a5 RK	272	smc91x_res = platform_get_resource(dev, IORESOURCE_MEM, 1);
d2e539a5 RK	273	sa1111_res = platform_get_resource(dev, IORESOURCE_MEM, 2);
f942b0fd	274	if (!nep_res \|\| !smc91x_res \|\| !sa1111_res) {
d2e539a5 RK	275	ret = -ENXIO;
	276	goto err_alloc;
	277	}
	278
ae14c2e2 RK	279	d = kzalloc(sizeof(*d), GFP_KERNEL);
	280	if (!d) {
	281	ret = -ENOMEM;
	282	goto err_alloc;
	283	}
	284
f942b0fd RK	285	d->base = ioremap(nep_res->start, SZ_4K);
	286	if (!d->base) {
	287	ret = -ENOMEM;
	288	goto err_ioremap;
	289	}
	290
	291	if (readb_relaxed(d->base + WHOAMI) != 0x11) {
	292	dev_warn(&dev->dev, "Neponset board detected, but wrong ID: %02x\n",
	293	readb_relaxed(d->base + WHOAMI));
	294	ret = -ENODEV;
	295	goto err_id;
	296	}
	297
ced8d21c RK	298	ret = irq_alloc_descs(-1, IRQ_BOARD_START, NEP_IRQ_NR, -1);
	299	if (ret <= 0) {
	300	dev_err(&dev->dev, "unable to allocate %u irqs: %d\n",
	301	NEP_IRQ_NR, ret);
	302	if (ret == 0)
	303	ret = -ENOMEM;
	304	goto err_irq_alloc;
	305	}
	306
	307	d->irq_base = ret;
	308
	309	irq_set_chip_and_handler(d->irq_base + NEP_IRQ_SMC91X, &nochip,
	310	handle_simple_irq);
e8d36d5d	311	irq_clear_status_flags(d->irq_base + NEP_IRQ_SMC91X, IRQ_NOREQUEST \| IRQ_NOPROBE);
ced8d21c RK	312	irq_set_chip_and_handler(d->irq_base + NEP_IRQ_USAR, &nochip,
ced8d21c RK	313	handle_simple_irq);
e8d36d5d	314	irq_clear_status_flags(d->irq_base + NEP_IRQ_USAR, IRQ_NOREQUEST \| IRQ_NOPROBE);
ced8d21c	315	irq_set_chip(d->irq_base + NEP_IRQ_SA1111, &nochip);
1da177e4	316
b6bdfcf5	317	irq_set_irq_type(irq, IRQ_TYPE_EDGE_RISING);
056c0acf	318	irq_set_chained_handler_and_data(irq, neponset_irq_handler, d);
1da177e4	319
f85fac0e RK	320	/* Disable GPIO 0/1 drivers so the buttons work on the Assabet */
	321	writeb_relaxed(NCR_GP01_OFF, d->base + NCR_0);
	322
	323	neponset_init_gpio(&d->gpio[0], &dev->dev, "neponset-ncr",
	324	d->base + NCR_0, NCR_NGPIO, false,
	325	neponset_ncr_names);
	326	neponset_init_gpio(&d->gpio[1], &dev->dev, "neponset-mdm-ctl0",
	327	d->base + MDM_CTL_0, MDM_CTL0_NGPIO, false,
	328	neponset_mdmctl0_names);
	329	neponset_init_gpio(&d->gpio[2], &dev->dev, "neponset-mdm-ctl1",
	330	d->base + MDM_CTL_1, MDM_CTL1_NGPIO, true,
	331	neponset_mdmctl1_names);
	332	neponset_init_gpio(&d->gpio[3], &dev->dev, "neponset-aud-ctl",
	333	d->base + AUD_CTL, AUD_NGPIO, false,
	334	neponset_aud_names);
	335
5c9e4d8c RK	336	gpiod_add_lookup_table(&neponset_uart1_gpio_table);
5c9e4d8c RK	337	gpiod_add_lookup_table(&neponset_uart3_gpio_table);
e2125d05 RK	338	gpiod_add_lookup_table(&neponset_pcmcia_table);
e2125d05 RK	339
1da177e4	340	/*
ced8d21c RK	341	* We would set IRQ_GPIO25 to be a wake-up IRQ, but unfortunately
ced8d21c RK	342	* something on the Neponset activates this IRQ on sleep (eth?)
1da177e4 LT	343	*/
1da177e4 LT	344	#if 0
b6bdfcf5	345	enable_irq_wake(irq);
1da177e4 LT	346	#endif
1da177e4 LT	347
ced8d21c RK	348	dev_info(&dev->dev, "Neponset daughter board, providing IRQ%u-%u\n",
ced8d21c RK	349	d->irq_base, d->irq_base + NEP_IRQ_NR - 1);
f85fac0e	350	nep = d;
1da177e4	351
bab50a35 RK	352	/* Ensure that the memory bus request/grant signals are setup */
	353	sa1110_mb_disable();
	354
d2e539a5	355	sa1111_resources[0].parent = sa1111_res;
ced8d21c RK	356	sa1111_resources[1].start = d->irq_base + NEP_IRQ_SA1111;
ced8d21c RK	357	sa1111_resources[1].end = d->irq_base + NEP_IRQ_SA1111;
9590e898	358	d->sa1111 = platform_device_register_full(&sa1111_devinfo);
ced8d21c	359
d2e539a5 RK	360	smc91x_resources[0].parent = smc91x_res;
d2e539a5 RK	361	smc91x_resources[1].parent = smc91x_res;
ced8d21c RK	362	smc91x_resources[2].start = d->irq_base + NEP_IRQ_SMC91X;
ced8d21c RK	363	smc91x_resources[2].end = d->irq_base + NEP_IRQ_SMC91X;
9590e898 RK	364	d->smc91x = platform_device_register_full(&smc91x_devinfo);
9590e898 RK	365
ae14c2e2 RK	366	platform_set_drvdata(dev, d);
ae14c2e2 RK	367
1da177e4	368	return 0;
ae14c2e2	369
ced8d21c	370	err_irq_alloc:
f942b0fd RK	371	err_id:
	372	iounmap(d->base);
	373	err_ioremap:
ced8d21c	374	kfree(d);
ae14c2e2 RK	375	err_alloc:
ae14c2e2 RK	376	return ret;
1da177e4 LT	377	}
1da177e4 LT	378
351a102d	379	static int neponset_remove(struct platform_device *dev)
ae14c2e2 RK	380	{
ae14c2e2 RK	381	struct neponset_drvdata *d = platform_get_drvdata(dev);
b6bdfcf5	382	int irq = platform_get_irq(dev, 0);
1da177e4	383
9590e898 RK	384	if (!IS_ERR(d->sa1111))
	385	platform_device_unregister(d->sa1111);
	386	if (!IS_ERR(d->smc91x))
	387	platform_device_unregister(d->smc91x);
e2125d05 RK	388
e2125d05 RK	389	gpiod_remove_lookup_table(&neponset_pcmcia_table);
5c9e4d8c RK	390	gpiod_remove_lookup_table(&neponset_uart3_gpio_table);
5c9e4d8c RK	391	gpiod_remove_lookup_table(&neponset_uart1_gpio_table);
e2125d05	392
b6bdfcf5	393	irq_set_chained_handler(irq, NULL);
ced8d21c	394	irq_free_descs(d->irq_base, NEP_IRQ_NR);
f85fac0e	395	nep = NULL;
f942b0fd	396	iounmap(d->base);
ae14c2e2 RK	397	kfree(d);
	398
	399	return 0;
	400	}
93160c63	401
51f93390	402	#ifdef CONFIG_PM_SLEEP
51f93390	403	static int neponset_resume(struct device *dev)
1da177e4	404	{
51f93390	405	struct neponset_drvdata *d = dev_get_drvdata(dev);
f85fac0e	406	int i, ret = 0;
ae14c2e2	407
f85fac0e RK	408	for (i = 0; i < ARRAY_SIZE(d->gpio); i++) {
	409	ret = gpio_reg_resume(d->gpio[i]);
	410	if (ret)
	411	break;
	412	}
1da177e4	413
f85fac0e	414	return ret;
1da177e4 LT	415	}
1da177e4 LT	416
51f93390	417	static const struct dev_pm_ops neponset_pm_ops = {
51f93390	418	.resume_noirq = neponset_resume,
51f93390 RK	419	.restore_noirq = neponset_resume,
	420	};
	421	#define PM_OPS &neponset_pm_ops
1da177e4	422	#else
51f93390	423	#define PM_OPS NULL
1da177e4 LT	424	#endif
1da177e4 LT	425
3ae5eaec	426	static struct platform_driver neponset_device_driver = {
1da177e4	427	.probe = neponset_probe,
351a102d	428	.remove = neponset_remove,
3ae5eaec RK	429	.driver = {
3ae5eaec RK	430	.name = "neponset",
51f93390	431	.pm = PM_OPS,
3ae5eaec	432	},
1da177e4 LT	433	};
1da177e4 LT	434
1da177e4 LT	435	static int __init neponset_init(void)
1da177e4 LT	436	{
bab50a35	437	return platform_driver_register(&neponset_device_driver);
1da177e4 LT	438	}
	439
	440	subsys_initcall(neponset_init);