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b2441318 | 1 | // SPDX-License-Identifier: GPL-2.0 |
1da177e4 LT |
2 | /* |
3 | * linux/arch/arm/mach-sa1100/lart.c | |
4 | */ | |
5 | ||
6 | #include <linux/init.h> | |
7 | #include <linux/kernel.h> | |
6920b5a7 | 8 | #include <linux/platform_data/sa11x0-serial.h> |
1da177e4 | 9 | #include <linux/tty.h> |
18775a7b BW |
10 | #include <linux/gpio.h> |
11 | #include <linux/leds.h> | |
12 | #include <linux/platform_device.h> | |
1da177e4 | 13 | |
e1b7a72a RK |
14 | #include <video/sa1100fb.h> |
15 | ||
a09e64fb | 16 | #include <mach/hardware.h> |
1da177e4 LT |
17 | #include <asm/setup.h> |
18 | #include <asm/mach-types.h> | |
5876ee95 | 19 | #include <asm/page.h> |
1da177e4 LT |
20 | |
21 | #include <asm/mach/arch.h> | |
22 | #include <asm/mach/map.h> | |
a1fd844c | 23 | #include <linux/platform_data/mfd-mcp-sa11x0.h> |
f314f33b | 24 | #include <mach/irqs.h> |
1da177e4 LT |
25 | |
26 | #include "generic.h" | |
27 | ||
323cdfc1 RK |
28 | static struct mcp_plat_data lart_mcp_data = { |
29 | .mccr0 = MCCR0_ADM, | |
30 | .sclk_rate = 11981000, | |
31 | }; | |
32 | ||
e1b7a72a RK |
33 | #ifdef LART_GREY_LCD |
34 | static struct sa1100fb_mach_info lart_grey_info = { | |
35 | .pixclock = 150000, .bpp = 4, | |
36 | .xres = 320, .yres = 240, | |
37 | ||
38 | .hsync_len = 1, .vsync_len = 1, | |
39 | .left_margin = 4, .upper_margin = 0, | |
40 | .right_margin = 2, .lower_margin = 0, | |
41 | ||
42 | .cmap_greyscale = 1, | |
43 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
44 | ||
45 | .lccr0 = LCCR0_Mono | LCCR0_Sngl | LCCR0_Pas | LCCR0_4PixMono, | |
46 | .lccr3 = LCCR3_OutEnH | LCCR3_PixRsEdg | LCCR3_ACBsDiv(512), | |
47 | }; | |
48 | #endif | |
49 | #ifdef LART_COLOR_LCD | |
50 | static struct sa1100fb_mach_info lart_color_info = { | |
51 | .pixclock = 150000, .bpp = 16, | |
52 | .xres = 320, .yres = 240, | |
53 | ||
54 | .hsync_len = 2, .vsync_len = 3, | |
55 | .left_margin = 69, .upper_margin = 14, | |
56 | .right_margin = 8, .lower_margin = 4, | |
57 | ||
58 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, | |
59 | .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512), | |
60 | }; | |
61 | #endif | |
62 | #ifdef LART_VIDEO_OUT | |
63 | static struct sa1100fb_mach_info lart_video_info = { | |
64 | .pixclock = 39721, .bpp = 16, | |
65 | .xres = 640, .yres = 480, | |
66 | ||
67 | .hsync_len = 95, .vsync_len = 2, | |
68 | .left_margin = 40, .upper_margin = 32, | |
69 | .right_margin = 24, .lower_margin = 11, | |
70 | ||
71 | .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT, | |
72 | ||
73 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, | |
74 | .lccr3 = LCCR3_OutEnL | LCCR3_PixFlEdg | LCCR3_ACBsDiv(512), | |
75 | }; | |
76 | #endif | |
77 | ||
78 | #ifdef LART_KIT01_LCD | |
79 | static struct sa1100fb_mach_info lart_kit01_info = { | |
80 | .pixclock = 63291, .bpp = 16, | |
81 | .xres = 640, .yres = 480, | |
82 | ||
83 | .hsync_len = 64, .vsync_len = 3, | |
84 | .left_margin = 122, .upper_margin = 45, | |
85 | .right_margin = 10, .lower_margin = 10, | |
86 | ||
87 | .lccr0 = LCCR0_Color | LCCR0_Sngl | LCCR0_Act, | |
88 | .lccr3 = LCCR3_OutEnH | LCCR3_PixFlEdg | |
89 | }; | |
90 | #endif | |
91 | ||
323cdfc1 RK |
92 | static void __init lart_init(void) |
93 | { | |
e1b7a72a RK |
94 | struct sa1100fb_mach_info *inf = NULL; |
95 | ||
96 | #ifdef LART_GREY_LCD | |
97 | inf = &lart_grey_info; | |
98 | #endif | |
99 | #ifdef LART_COLOR_LCD | |
100 | inf = &lart_color_info; | |
101 | #endif | |
102 | #ifdef LART_VIDEO_OUT | |
103 | inf = &lart_video_info; | |
104 | #endif | |
105 | #ifdef LART_KIT01_LCD | |
106 | inf = &lart_kit01_info; | |
107 | #endif | |
108 | ||
109 | if (inf) | |
110 | sa11x0_register_lcd(inf); | |
111 | ||
e36e26a8 | 112 | sa11x0_ppc_configure_mcp(); |
7a5b4e16 | 113 | sa11x0_register_mcp(&lart_mcp_data); |
323cdfc1 RK |
114 | } |
115 | ||
1da177e4 | 116 | static struct map_desc lart_io_desc[] __initdata = { |
92519d82 DS |
117 | { /* main flash memory */ |
118 | .virtual = 0xe8000000, | |
119 | .pfn = __phys_to_pfn(0x00000000), | |
120 | .length = 0x00400000, | |
121 | .type = MT_DEVICE | |
122 | }, { /* main flash, alternative location */ | |
123 | .virtual = 0xec000000, | |
124 | .pfn = __phys_to_pfn(0x08000000), | |
125 | .length = 0x00400000, | |
126 | .type = MT_DEVICE | |
127 | } | |
1da177e4 LT |
128 | }; |
129 | ||
18775a7b BW |
130 | /* LEDs */ |
131 | struct gpio_led lart_gpio_leds[] = { | |
132 | { | |
133 | .name = "lart:red", | |
134 | .default_trigger = "cpu0", | |
135 | .gpio = 23, | |
136 | }, | |
137 | }; | |
138 | ||
139 | static struct gpio_led_platform_data lart_gpio_led_info = { | |
140 | .leds = lart_gpio_leds, | |
141 | .num_leds = ARRAY_SIZE(lart_gpio_leds), | |
142 | }; | |
143 | ||
144 | static struct platform_device lart_leds = { | |
145 | .name = "leds-gpio", | |
146 | .id = -1, | |
147 | .dev = { | |
148 | .platform_data = &lart_gpio_led_info, | |
149 | } | |
150 | }; | |
1da177e4 LT |
151 | static void __init lart_map_io(void) |
152 | { | |
153 | sa1100_map_io(); | |
154 | iotable_init(lart_io_desc, ARRAY_SIZE(lart_io_desc)); | |
155 | ||
156 | sa1100_register_uart(0, 3); | |
157 | sa1100_register_uart(1, 1); | |
158 | sa1100_register_uart(2, 2); | |
159 | ||
160 | GAFR |= (GPIO_UART_TXD | GPIO_UART_RXD); | |
161 | GPDR |= GPIO_UART_TXD; | |
162 | GPDR &= ~GPIO_UART_RXD; | |
163 | PPAR |= PPAR_UPR; | |
18775a7b BW |
164 | |
165 | platform_device_register(&lart_leds); | |
1da177e4 LT |
166 | } |
167 | ||
168 | MACHINE_START(LART, "LART") | |
17f4425d | 169 | .atag_offset = 0x100, |
e9dea0c6 | 170 | .map_io = lart_map_io, |
f314f33b | 171 | .nr_irqs = SA1100_NR_IRQS, |
e9dea0c6 | 172 | .init_irq = sa1100_init_irq, |
323cdfc1 | 173 | .init_machine = lart_init, |
7fea1ba5 | 174 | .init_late = sa11x0_init_late, |
6bb27d73 | 175 | .init_time = sa1100_timer_init, |
d9ca5839 | 176 | .restart = sa11x0_restart, |
1da177e4 | 177 | MACHINE_END |