[linux-2.6-block.git] / arch / arm / mach-sa1100 / clock.c

/*
 *  linux/arch/arm/mach-sa1100/clock.c
 */
#include <linux/module.h>
#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/errno.h>
#include <linux/err.h>
#include <linux/string.h>
#include <linux/clk.h>
#include <linux/spinlock.h>
#include <linux/mutex.h>

#include <mach/hardware.h>

/*
 * Very simple clock implementation - we only have one clock to
 * deal with at the moment, so we only match using the "name".
 */
struct clk {
	struct list_head	node;
	unsigned long		rate;
	const char		*name;
	unsigned int		enabled;
	void			(*enable)(void);
	void			(*disable)(void);
};

static LIST_HEAD(clocks);
static DEFINE_MUTEX(clocks_mutex);
static DEFINE_SPINLOCK(clocks_lock);

struct clk *clk_get(struct device *dev, const char *id)
{
	struct clk *p, *clk = ERR_PTR(-ENOENT);

	mutex_lock(&clocks_mutex);
	list_for_each_entry(p, &clocks, node) {
		if (strcmp(id, p->name) == 0) {
			clk = p;
			break;
		}
	}
	mutex_unlock(&clocks_mutex);

	return clk;
}
EXPORT_SYMBOL(clk_get);

void clk_put(struct clk *clk)
{
}
EXPORT_SYMBOL(clk_put);

int clk_enable(struct clk *clk)
{
	unsigned long flags;

	spin_lock_irqsave(&clocks_lock, flags);
	if (clk->enabled++ == 0)
		clk->enable();
	spin_unlock_irqrestore(&clocks_lock, flags);
	return 0;
}
EXPORT_SYMBOL(clk_enable);

void clk_disable(struct clk *clk)
{
	unsigned long flags;

	WARN_ON(clk->enabled == 0);

	spin_lock_irqsave(&clocks_lock, flags);
	if (--clk->enabled == 0)
		clk->disable();
	spin_unlock_irqrestore(&clocks_lock, flags);
}
EXPORT_SYMBOL(clk_disable);

unsigned long clk_get_rate(struct clk *clk)
{
	return clk->rate;
}
EXPORT_SYMBOL(clk_get_rate);


static void clk_gpio27_enable(void)
{
	/*
	 * First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
	 * (SA-1110 Developer's Manual, section 9.1.2.1)
	 */
	GAFR |= GPIO_32_768kHz;
	GPDR |= GPIO_32_768kHz;
	TUCR = TUCR_3_6864MHz;
}

static void clk_gpio27_disable(void)
{
	TUCR = 0;
	GPDR &= ~GPIO_32_768kHz;
	GAFR &= ~GPIO_32_768kHz;
}

static struct clk clk_gpio27 = {
	.name		= "SA1111_CLK",
	.rate		= 3686400,
	.enable		= clk_gpio27_enable,
	.disable	= clk_gpio27_disable,
};

int clk_register(struct clk *clk)
{
	mutex_lock(&clocks_mutex);
	list_add(&clk->node, &clocks);
	mutex_unlock(&clocks_mutex);
	return 0;
}
EXPORT_SYMBOL(clk_register);

void clk_unregister(struct clk *clk)
{
	mutex_lock(&clocks_mutex);
	list_del(&clk->node);
	mutex_unlock(&clocks_mutex);
}
EXPORT_SYMBOL(clk_unregister);

static int __init clk_init(void)
{
	clk_register(&clk_gpio27);
	return 0;
}
arch_initcall(clk_init);
Commit	Line	Data
97d654f8 RK	1	/*
	2	* linux/arch/arm/mach-sa1100/clock.c
	3	*/
	4	#include <linux/module.h>
	5	#include <linux/kernel.h>
	6	#include <linux/list.h>
	7	#include <linux/errno.h>
	8	#include <linux/err.h>
	9	#include <linux/string.h>
	10	#include <linux/clk.h>
	11	#include <linux/spinlock.h>
d0a9d75b	12	#include <linux/mutex.h>
97d654f8	13
a09e64fb	14	#include <mach/hardware.h>
97d654f8	15
d0a9d75b RK	16	/*
	17	* Very simple clock implementation - we only have one clock to
	18	* deal with at the moment, so we only match using the "name".
	19	*/
97d654f8 RK	20	struct clk {
	21	struct list_head node;
	22	unsigned long rate;
97d654f8 RK	23	const char *name;
	24	unsigned int enabled;
	25	void (*enable)(void);
	26	void (*disable)(void);
	27	};
	28
	29	static LIST_HEAD(clocks);
d0a9d75b	30	static DEFINE_MUTEX(clocks_mutex);
97d654f8 RK	31	static DEFINE_SPINLOCK(clocks_lock);
	32
	33	struct clk clk_get(struct device dev, const char *id)
	34	{
	35	struct clk p, clk = ERR_PTR(-ENOENT);
	36
d0a9d75b	37	mutex_lock(&clocks_mutex);
97d654f8	38	list_for_each_entry(p, &clocks, node) {
d0a9d75b	39	if (strcmp(id, p->name) == 0) {
97d654f8 RK	40	clk = p;
	41	break;
	42	}
	43	}
d0a9d75b	44	mutex_unlock(&clocks_mutex);
97d654f8 RK	45
	46	return clk;
	47	}
	48	EXPORT_SYMBOL(clk_get);
	49
	50	void clk_put(struct clk *clk)
	51	{
97d654f8 RK	52	}
	53	EXPORT_SYMBOL(clk_put);
	54
	55	int clk_enable(struct clk *clk)
	56	{
	57	unsigned long flags;
	58
	59	spin_lock_irqsave(&clocks_lock, flags);
	60	if (clk->enabled++ == 0)
	61	clk->enable();
	62	spin_unlock_irqrestore(&clocks_lock, flags);
	63	return 0;
	64	}
	65	EXPORT_SYMBOL(clk_enable);
	66
	67	void clk_disable(struct clk *clk)
	68	{
	69	unsigned long flags;
	70
	71	WARN_ON(clk->enabled == 0);
	72
	73	spin_lock_irqsave(&clocks_lock, flags);
	74	if (--clk->enabled == 0)
	75	clk->disable();
	76	spin_unlock_irqrestore(&clocks_lock, flags);
	77	}
	78	EXPORT_SYMBOL(clk_disable);
	79
	80	unsigned long clk_get_rate(struct clk *clk)
	81	{
	82	return clk->rate;
	83	}
	84	EXPORT_SYMBOL(clk_get_rate);
	85
	86
	87	static void clk_gpio27_enable(void)
	88	{
	89	/*
	90	* First, set up the 3.6864MHz clock on GPIO 27 for the SA-1111:
	91	* (SA-1110 Developer's Manual, section 9.1.2.1)
	92	*/
	93	GAFR \|= GPIO_32_768kHz;
	94	GPDR \|= GPIO_32_768kHz;
	95	TUCR = TUCR_3_6864MHz;
	96	}
	97
	98	static void clk_gpio27_disable(void)
	99	{
	100	TUCR = 0;
	101	GPDR &= ~GPIO_32_768kHz;
	102	GAFR &= ~GPIO_32_768kHz;
	103	}
	104
	105	static struct clk clk_gpio27 = {
13f75582	106	.name = "SA1111_CLK",
97d654f8 RK	107	.rate = 3686400,
	108	.enable = clk_gpio27_enable,
	109	.disable = clk_gpio27_disable,
	110	};
	111
	112	int clk_register(struct clk *clk)
	113	{
d0a9d75b	114	mutex_lock(&clocks_mutex);
97d654f8	115	list_add(&clk->node, &clocks);
d0a9d75b	116	mutex_unlock(&clocks_mutex);
97d654f8 RK	117	return 0;
	118	}
	119	EXPORT_SYMBOL(clk_register);
	120
	121	void clk_unregister(struct clk *clk)
	122	{
d0a9d75b	123	mutex_lock(&clocks_mutex);
97d654f8	124	list_del(&clk->node);
d0a9d75b	125	mutex_unlock(&clocks_mutex);
97d654f8 RK	126	}
	127	EXPORT_SYMBOL(clk_unregister);
	128
	129	static int __init clk_init(void)
	130	{
	131	clk_register(&clk_gpio27);
	132	return 0;
	133	}
	134	arch_initcall(clk_init);