[linux-2.6-block.git] / arch / arm / mach-sa1100 / assabet.c

/*
 * linux/arch/arm/mach-sa1100/assabet.c
 *
 * Author: Nicolas Pitre
 *
 * This file contains all Assabet-specific tweaks.
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */
#include <linux/init.h>
#include <linux/kernel.h>
#include <linux/module.h>
#include <linux/errno.h>
#include <linux/ioport.h>
#include <linux/serial_core.h>
#include <linux/mtd/mtd.h>
#include <linux/mtd/partitions.h>
#include <linux/delay.h>
#include <linux/mm.h>

#include <mach/hardware.h>
#include <asm/mach-types.h>
#include <asm/irq.h>
#include <asm/setup.h>
#include <asm/page.h>
#include <asm/pgtable-hwdef.h>
#include <asm/pgtable.h>
#include <asm/tlbflush.h>

#include <asm/mach/arch.h>
#include <asm/mach/flash.h>
#include <asm/mach/irda.h>
#include <asm/mach/map.h>
#include <asm/mach/serial_sa1100.h>
#include <mach/assabet.h>
#include <mach/mcp.h>

#include "generic.h"

#define ASSABET_BCR_DB1110 \
	(ASSABET_BCR_SPK_OFF    | ASSABET_BCR_QMUTE     | \
	 ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
	 ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
	 ASSABET_BCR_IRDA_MD0)

#define ASSABET_BCR_DB1111 \
	(ASSABET_BCR_SPK_OFF    | ASSABET_BCR_QMUTE     | \
	 ASSABET_BCR_LED_GREEN  | ASSABET_BCR_LED_RED   | \
	 ASSABET_BCR_RS232EN    | ASSABET_BCR_LCD_12RGB | \
	 ASSABET_BCR_CF_BUS_OFF | ASSABET_BCR_STEREO_LB | \
	 ASSABET_BCR_IRDA_MD0   | ASSABET_BCR_CF_RST)

unsigned long SCR_value = ASSABET_SCR_INIT;
EXPORT_SYMBOL(SCR_value);

static unsigned long BCR_value = ASSABET_BCR_DB1110;

void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
{
	unsigned long flags;

	local_irq_save(flags);
	BCR_value = (BCR_value & ~mask) | val;
	ASSABET_BCR = BCR_value;
	local_irq_restore(flags);
}

EXPORT_SYMBOL(ASSABET_BCR_frob);

static void assabet_backlight_power(int on)
{
#ifndef ASSABET_PAL_VIDEO
	if (on)
		ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
	else
#endif
		ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
}

/*
 * Turn on/off the backlight.  When turning the backlight on,
 * we wait 500us after turning it on so we don't cause the
 * supplies to droop when we enable the LCD controller (and
 * cause a hard reset.)
 */
static void assabet_lcd_power(int on)
{
#ifndef ASSABET_PAL_VIDEO
	if (on) {
		ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
		udelay(500);
	} else
#endif
		ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
}


/*
 * Assabet flash support code.
 */

#ifdef ASSABET_REV_4
/*
 * Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
 */
static struct mtd_partition assabet_partitions[] = {
	{
		.name		= "bootloader",
		.size		= 0x00020000,
		.offset		= 0,
		.mask_flags	= MTD_WRITEABLE,
	}, {
		.name		= "bootloader params",
		.size		= 0x00020000,
		.offset		= MTDPART_OFS_APPEND,
		.mask_flags	= MTD_WRITEABLE,
	}, {
		.name		= "jffs",
		.size		= MTDPART_SIZ_FULL,
		.offset		= MTDPART_OFS_APPEND,
	}
};
#else
/*
 * Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
 */
static struct mtd_partition assabet_partitions[] = {
	{
		.name		= "bootloader",
		.size		= 0x00040000,
		.offset		= 0,
		.mask_flags	= MTD_WRITEABLE,
	}, {
		.name		= "bootloader params",
		.size		= 0x00040000,
		.offset		= MTDPART_OFS_APPEND,
		.mask_flags	= MTD_WRITEABLE,
	}, {
		.name		= "jffs",
		.size		= MTDPART_SIZ_FULL,
		.offset		= MTDPART_OFS_APPEND,
	}
};
#endif

static struct flash_platform_data assabet_flash_data = {
	.map_name	= "cfi_probe",
	.parts		= assabet_partitions,
	.nr_parts	= ARRAY_SIZE(assabet_partitions),
};

static struct resource assabet_flash_resources[] = {
	{
		.start	= SA1100_CS0_PHYS,
		.end	= SA1100_CS0_PHYS + SZ_32M - 1,
		.flags	= IORESOURCE_MEM,
	}, {
		.start	= SA1100_CS1_PHYS,
		.end	= SA1100_CS1_PHYS + SZ_32M - 1,
		.flags	= IORESOURCE_MEM,
	}
};


/*
 * Assabet IrDA support code.
 */

static int assabet_irda_set_power(struct device *dev, unsigned int state)
{
	static unsigned int bcr_state[4] = {
		ASSABET_BCR_IRDA_MD0,
		ASSABET_BCR_IRDA_MD1|ASSABET_BCR_IRDA_MD0,
		ASSABET_BCR_IRDA_MD1,
		0
	};

	if (state < 4) {
		state = bcr_state[state];
		ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1|
					   ASSABET_BCR_IRDA_MD0));
		ASSABET_BCR_set(state);
	}
	return 0;
}

static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
{
	if (speed < 4000000)
		ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
	else
		ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
}

static struct irda_platform_data assabet_irda_data = {
	.set_power	= assabet_irda_set_power,
	.set_speed	= assabet_irda_set_speed,
};

static struct mcp_plat_data assabet_mcp_data = {
	.mccr0		= MCCR0_ADM,
	.sclk_rate	= 11981000,
	.codec		= "ucb1x00",
};

static void __init assabet_init(void)
{
	/*
	 * Ensure that the power supply is in "high power" mode.
	 */
	GPDR |= GPIO_GPIO16;
	GPSR = GPIO_GPIO16;

	/*
	 * Ensure that these pins are set as outputs and are driving
	 * logic 0.  This ensures that we won't inadvertently toggle
	 * the WS latch in the CPLD, and we don't float causing
	 * excessive power drain.  --rmk
	 */
	GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;
	GPCR = GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM;

	/*
	 * Set up registers for sleep mode.
	 */
	PWER = PWER_GPIO0;
	PGSR = 0;
	PCFR = 0;
	PSDR = 0;
	PPDR |= PPC_TXD3 | PPC_TXD1;
	PPSR |= PPC_TXD3 | PPC_TXD1;

	sa1100fb_lcd_power = assabet_lcd_power;
	sa1100fb_backlight_power = assabet_backlight_power;

	if (machine_has_neponset()) {
		/*
		 * Angel sets this, but other bootloaders may not.
		 *
		 * This must precede any driver calls to BCR_set()
		 * or BCR_clear().
		 */
		ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;

#ifndef CONFIG_ASSABET_NEPONSET
		printk( "Warning: Neponset detected but full support "
			"hasn't been configured in the kernel\n" );
#endif
	}

	sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
			    ARRAY_SIZE(assabet_flash_resources));
	sa11x0_register_irda(&assabet_irda_data);

	/*
	 * Setup the PPC unit correctly.
	 */
	PPDR &= ~PPC_RXD4;
	PPDR |= PPC_TXD4 | PPC_SCLK | PPC_SFRM;
	PSDR |= PPC_RXD4;
	PSDR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);
	PPSR &= ~(PPC_TXD4 | PPC_SCLK | PPC_SFRM);

	ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
	sa11x0_register_mcp(&assabet_mcp_data);
}

/*
 * On Assabet, we must probe for the Neponset board _before_
 * paging_init() has occurred to actually determine the amount
 * of RAM available.  To do so, we map the appropriate IO section
 * in the page table here in order to access GPIO registers.
 */
static void __init map_sa1100_gpio_regs( void )
{
	unsigned long phys = __PREG(GPLR) & PMD_MASK;
	unsigned long virt = io_p2v(phys);
	int prot = PMD_TYPE_SECT | PMD_SECT_AP_WRITE | PMD_DOMAIN(DOMAIN_IO);
	pmd_t *pmd;

	pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
	*pmd = __pmd(phys | prot);
	flush_pmd_entry(pmd);
}

/*
 * Read System Configuration "Register"
 * (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
 * User's Guide", section 4.4.1)
 *
 * This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
 * to set up the serial port for decompression status messages. We
 * repeat it here because the kernel may not be loaded as a zImage, and
 * also because it's a hassle to communicate the SCR value to the kernel
 * from the decompressor.
 *
 * Note that IRQs are guaranteed to be disabled.
 */
static void __init get_assabet_scr(void)
{
	unsigned long scr, i;

	GPDR |= 0x3fc;			/* Configure GPIO 9:2 as outputs */
	GPSR = 0x3fc;			/* Write 0xFF to GPIO 9:2 */
	GPDR &= ~(0x3fc);		/* Configure GPIO 9:2 as inputs */
	for(i = 100; i--; )		/* Read GPIO 9:2 */
		scr = GPLR;
	GPDR |= 0x3fc;			/*  restore correct pin direction */
	scr &= 0x3fc;			/* save as system configuration byte. */
	SCR_value = scr;
}

static void __init
fixup_assabet(struct tag *tags, char **cmdline, struct meminfo *mi)
{
	/* This must be done before any call to machine_has_neponset() */
	map_sa1100_gpio_regs();
	get_assabet_scr();

	if (machine_has_neponset())
		printk("Neponset expansion board detected\n");
}


static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
{
	if (port->mapbase == _Ser1UTCR0) {
		if (state)
			ASSABET_BCR_clear(ASSABET_BCR_RS232EN |
					  ASSABET_BCR_COM_RTS |
					  ASSABET_BCR_COM_DTR);
		else
			ASSABET_BCR_set(ASSABET_BCR_RS232EN |
					ASSABET_BCR_COM_RTS |
					ASSABET_BCR_COM_DTR);
	}
}

/*
 * Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
 * and UART3 (radio module).  We only handle them for UART1 here.
 */
static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
{
	if (port->mapbase == _Ser1UTCR0) {
		u_int set = 0, clear = 0;

		if (mctrl & TIOCM_RTS)
			clear |= ASSABET_BCR_COM_RTS;
		else
			set |= ASSABET_BCR_COM_RTS;

		if (mctrl & TIOCM_DTR)
			clear |= ASSABET_BCR_COM_DTR;
		else
			set |= ASSABET_BCR_COM_DTR;

		ASSABET_BCR_clear(clear);
		ASSABET_BCR_set(set);
	}
}

static u_int assabet_get_mctrl(struct uart_port *port)
{
	u_int ret = 0;
	u_int bsr = ASSABET_BSR;

	/* need 2 reads to read current value */
	bsr = ASSABET_BSR;

	if (port->mapbase == _Ser1UTCR0) {
		if (bsr & ASSABET_BSR_COM_DCD)
			ret |= TIOCM_CD;
		if (bsr & ASSABET_BSR_COM_CTS)
			ret |= TIOCM_CTS;
		if (bsr & ASSABET_BSR_COM_DSR)
			ret |= TIOCM_DSR;
	} else if (port->mapbase == _Ser3UTCR0) {
		if (bsr & ASSABET_BSR_RAD_DCD)
			ret |= TIOCM_CD;
		if (bsr & ASSABET_BSR_RAD_CTS)
			ret |= TIOCM_CTS;
		if (bsr & ASSABET_BSR_RAD_DSR)
			ret |= TIOCM_DSR;
		if (bsr & ASSABET_BSR_RAD_RI)
			ret |= TIOCM_RI;
	} else {
		ret = TIOCM_CD | TIOCM_CTS | TIOCM_DSR;
	}

	return ret;
}

static struct sa1100_port_fns assabet_port_fns __initdata = {
	.set_mctrl	= assabet_set_mctrl,
	.get_mctrl	= assabet_get_mctrl,
	.pm		= assabet_uart_pm,
};

static struct map_desc assabet_io_desc[] __initdata = {
  	{	/* Board Control Register */
		.virtual	=  0xf1000000,
		.pfn		= __phys_to_pfn(0x12000000),
		.length		= 0x00100000,
		.type		= MT_DEVICE
	}, {	/* MQ200 */
		.virtual	=  0xf2800000,
		.pfn		= __phys_to_pfn(0x4b800000),
		.length		= 0x00800000,
		.type		= MT_DEVICE
	}
};

static void __init assabet_map_io(void)
{
	sa1100_map_io();
	iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));

	/*
	 * Set SUS bit in SDCR0 so serial port 1 functions.
	 * Its called GPCLKR0 in my SA1110 manual.
	 */
	Ser1SDCR0 |= SDCR0_SUS;

	if (machine_has_neponset()) {
#ifdef CONFIG_ASSABET_NEPONSET
		extern void neponset_map_io(void);

		/*
		 * We map Neponset registers even if it isn't present since
		 * many drivers will try to probe their stuff (and fail).
		 * This is still more friendly than a kernel paging request
		 * crash.
		 */
		neponset_map_io();
#endif
	} else {
		sa1100_register_uart_fns(&assabet_port_fns);
	}

	/*
	 * When Neponset is attached, the first UART should be
	 * UART3.  That's what Angel is doing and many documents
	 * are stating this.
	 *
	 * We do the Neponset mapping even if Neponset support
	 * isn't compiled in so the user will still get something on
	 * the expected physical serial port.
	 *
	 * We no longer do this; not all boot loaders support it,
	 * and UART3 appears to be somewhat unreliable with blob.
	 */
	sa1100_register_uart(0, 1);
	sa1100_register_uart(2, 3);
}


MACHINE_START(ASSABET, "Intel-Assabet")
	.atag_offset	= 0x100,
	.fixup		= fixup_assabet,
	.map_io		= assabet_map_io,
	.init_irq	= sa1100_init_irq,
	.timer		= &sa1100_timer,
	.init_machine	= assabet_init,
#ifdef CONFIG_SA1111
	.dma_zone_size	= SZ_1M,
#endif
	.restart	= sa11x0_restart,
MACHINE_END
Commit	Line	Data
1da177e4 LT	1	/*
	2	* linux/arch/arm/mach-sa1100/assabet.c
	3	*
	4	* Author: Nicolas Pitre
	5	*
	6	* This file contains all Assabet-specific tweaks.
	7	*
	8	* This program is free software; you can redistribute it and/or modify
	9	* it under the terms of the GNU General Public License version 2 as
	10	* published by the Free Software Foundation.
	11	*/
1da177e4 LT	12	#include <linux/init.h>
	13	#include <linux/kernel.h>
	14	#include <linux/module.h>
	15	#include <linux/errno.h>
	16	#include <linux/ioport.h>
	17	#include <linux/serial_core.h>
	18	#include <linux/mtd/mtd.h>
	19	#include <linux/mtd/partitions.h>
	20	#include <linux/delay.h>
	21	#include <linux/mm.h>
	22
a09e64fb	23	#include <mach/hardware.h>
1da177e4 LT	24	#include <asm/mach-types.h>
	25	#include <asm/irq.h>
	26	#include <asm/setup.h>
	27	#include <asm/page.h>
74945c86	28	#include <asm/pgtable-hwdef.h>
1da177e4 LT	29	#include <asm/pgtable.h>
	30	#include <asm/tlbflush.h>
	31
	32	#include <asm/mach/arch.h>
	33	#include <asm/mach/flash.h>
	34	#include <asm/mach/irda.h>
	35	#include <asm/mach/map.h>
	36	#include <asm/mach/serial_sa1100.h>
a09e64fb RK	37	#include <mach/assabet.h>
a09e64fb RK	38	#include <mach/mcp.h>
1da177e4 LT	39
	40	#include "generic.h"
	41
	42	#define ASSABET_BCR_DB1110 \
	43	(ASSABET_BCR_SPK_OFF \| ASSABET_BCR_QMUTE \| \
	44	ASSABET_BCR_LED_GREEN \| ASSABET_BCR_LED_RED \| \
	45	ASSABET_BCR_RS232EN \| ASSABET_BCR_LCD_12RGB \| \
	46	ASSABET_BCR_IRDA_MD0)
	47
	48	#define ASSABET_BCR_DB1111 \
	49	(ASSABET_BCR_SPK_OFF \| ASSABET_BCR_QMUTE \| \
	50	ASSABET_BCR_LED_GREEN \| ASSABET_BCR_LED_RED \| \
	51	ASSABET_BCR_RS232EN \| ASSABET_BCR_LCD_12RGB \| \
	52	ASSABET_BCR_CF_BUS_OFF \| ASSABET_BCR_STEREO_LB \| \
	53	ASSABET_BCR_IRDA_MD0 \| ASSABET_BCR_CF_RST)
	54
	55	unsigned long SCR_value = ASSABET_SCR_INIT;
	56	EXPORT_SYMBOL(SCR_value);
	57
	58	static unsigned long BCR_value = ASSABET_BCR_DB1110;
	59
	60	void ASSABET_BCR_frob(unsigned int mask, unsigned int val)
	61	{
	62	unsigned long flags;
	63
	64	local_irq_save(flags);
	65	BCR_value = (BCR_value & ~mask) \| val;
	66	ASSABET_BCR = BCR_value;
	67	local_irq_restore(flags);
	68	}
	69
	70	EXPORT_SYMBOL(ASSABET_BCR_frob);
	71
	72	static void assabet_backlight_power(int on)
	73	{
	74	#ifndef ASSABET_PAL_VIDEO
	75	if (on)
	76	ASSABET_BCR_set(ASSABET_BCR_LIGHT_ON);
	77	else
	78	#endif
	79	ASSABET_BCR_clear(ASSABET_BCR_LIGHT_ON);
	80	}
	81
	82	/*
	83	* Turn on/off the backlight. When turning the backlight on,
	84	* we wait 500us after turning it on so we don't cause the
	85	* supplies to droop when we enable the LCD controller (and
	86	* cause a hard reset.)
	87	*/
	88	static void assabet_lcd_power(int on)
	89	{
	90	#ifndef ASSABET_PAL_VIDEO
	91	if (on) {
	92	ASSABET_BCR_set(ASSABET_BCR_LCD_ON);
	93	udelay(500);
	94	} else
	95	#endif
	96	ASSABET_BCR_clear(ASSABET_BCR_LCD_ON);
	97	}
	98
	99
	100	/*
	101	* Assabet flash support code.
	102	*/
103
104	#ifdef ASSABET_REV_4
105	/*
106	* Phase 4 Assabet has two 28F160B3 flash parts in bank 0:
107	*/
108	static struct mtd_partition assabet_partitions[] = {
109	{
110	.name = "bootloader",
111	.size = 0x00020000,
112	.offset = 0,
113	.mask_flags = MTD_WRITEABLE,
114	}, {
115	.name = "bootloader params",
116	.size = 0x00020000,
117	.offset = MTDPART_OFS_APPEND,
118	.mask_flags = MTD_WRITEABLE,
119	}, {
120	.name = "jffs",
121	.size = MTDPART_SIZ_FULL,
122	.offset = MTDPART_OFS_APPEND,
123	}
124	};
125	#else
126	/*
127	* Phase 5 Assabet has two 28F128J3A flash parts in bank 0:
128	*/
129	static struct mtd_partition assabet_partitions[] = {
130	{
131	.name = "bootloader",
132	.size = 0x00040000,
133	.offset = 0,
134	.mask_flags = MTD_WRITEABLE,
135	}, {
136	.name = "bootloader params",
137	.size = 0x00040000,
138	.offset = MTDPART_OFS_APPEND,
139	.mask_flags = MTD_WRITEABLE,
140	}, {
141	.name = "jffs",
142	.size = MTDPART_SIZ_FULL,
143	.offset = MTDPART_OFS_APPEND,
144	}
145	};
146	#endif
147
148	static struct flash_platform_data assabet_flash_data = {
149	.map_name = "cfi_probe",
150	.parts = assabet_partitions,
151	.nr_parts = ARRAY_SIZE(assabet_partitions),
152	};
153
154	static struct resource assabet_flash_resources[] = {
155	{
156	.start = SA1100_CS0_PHYS,
157	.end = SA1100_CS0_PHYS + SZ_32M - 1,
158	.flags = IORESOURCE_MEM,
159	}, {
160	.start = SA1100_CS1_PHYS,
161	.end = SA1100_CS1_PHYS + SZ_32M - 1,
162	.flags = IORESOURCE_MEM,
163	}
164	};
165
166
167	/*
168	* Assabet IrDA support code.
169	*/
170
171	static int assabet_irda_set_power(struct device *dev, unsigned int state)
172	{
173	static unsigned int bcr_state[4] = {
174	ASSABET_BCR_IRDA_MD0,
175	ASSABET_BCR_IRDA_MD1\|ASSABET_BCR_IRDA_MD0,
176	ASSABET_BCR_IRDA_MD1,
177	0
178	};
179
180	if (state < 4) {
181	state = bcr_state[state];
182	ASSABET_BCR_clear(state ^ (ASSABET_BCR_IRDA_MD1\|
183	ASSABET_BCR_IRDA_MD0));
184	ASSABET_BCR_set(state);
185	}
186	return 0;
187	}
188
189	static void assabet_irda_set_speed(struct device *dev, unsigned int speed)
190	{
191	if (speed < 4000000)
192	ASSABET_BCR_clear(ASSABET_BCR_IRDA_FSEL);
193	else
194	ASSABET_BCR_set(ASSABET_BCR_IRDA_FSEL);
195	}
196
197	static struct irda_platform_data assabet_irda_data = {
198	.set_power = assabet_irda_set_power,
199	.set_speed = assabet_irda_set_speed,
200	};
201
323cdfc1 RK	202	static struct mcp_plat_data assabet_mcp_data = {
	203	.mccr0 = MCCR0_ADM,
	204	.sclk_rate = 11981000,
5dd7bf59	205	.codec = "ucb1x00",
323cdfc1 RK	206	};
323cdfc1 RK	207
1da177e4 LT	208	static void __init assabet_init(void)
	209	{
	210	/*
	211	* Ensure that the power supply is in "high power" mode.
	212	*/
	213	GPDR \|= GPIO_GPIO16;
	214	GPSR = GPIO_GPIO16;
	215
	216	/*
	217	* Ensure that these pins are set as outputs and are driving
	218	* logic 0. This ensures that we won't inadvertently toggle
	219	* the WS latch in the CPLD, and we don't float causing
	220	* excessive power drain. --rmk
	221	*/
	222	GPDR \|= GPIO_SSP_TXD \| GPIO_SSP_SCLK \| GPIO_SSP_SFRM;
	223	GPCR = GPIO_SSP_TXD \| GPIO_SSP_SCLK \| GPIO_SSP_SFRM;
	224
	225	/*
	226	* Set up registers for sleep mode.
	227	*/
	228	PWER = PWER_GPIO0;
	229	PGSR = 0;
	230	PCFR = 0;
	231	PSDR = 0;
	232	PPDR \|= PPC_TXD3 \| PPC_TXD1;
	233	PPSR \|= PPC_TXD3 \| PPC_TXD1;
	234
	235	sa1100fb_lcd_power = assabet_lcd_power;
	236	sa1100fb_backlight_power = assabet_backlight_power;
	237
	238	if (machine_has_neponset()) {
	239	/*
	240	* Angel sets this, but other bootloaders may not.
	241	*
	242	* This must precede any driver calls to BCR_set()
	243	* or BCR_clear().
	244	*/
	245	ASSABET_BCR = BCR_value = ASSABET_BCR_DB1111;
	246
	247	#ifndef CONFIG_ASSABET_NEPONSET
	248	printk( "Warning: Neponset detected but full support "
	249	"hasn't been configured in the kernel\n" );
	250	#endif
	251	}
	252
7a5b4e16 RK	253	sa11x0_register_mtd(&assabet_flash_data, assabet_flash_resources,
	254	ARRAY_SIZE(assabet_flash_resources));
	255	sa11x0_register_irda(&assabet_irda_data);
af9081ae JF	256
	257	/*
	258	* Setup the PPC unit correctly.
	259	*/
	260	PPDR &= ~PPC_RXD4;
	261	PPDR \|= PPC_TXD4 \| PPC_SCLK \| PPC_SFRM;
	262	PSDR \|= PPC_RXD4;
	263	PSDR &= ~(PPC_TXD4 \| PPC_SCLK \| PPC_SFRM);
	264	PPSR &= ~(PPC_TXD4 \| PPC_SCLK \| PPC_SFRM);
	265
	266	ASSABET_BCR_set(ASSABET_BCR_CODEC_RST);
7a5b4e16	267	sa11x0_register_mcp(&assabet_mcp_data);
1da177e4 LT	268	}
	269
	270	/*
	271	* On Assabet, we must probe for the Neponset board _before_
	272	* paging_init() has occurred to actually determine the amount
	273	* of RAM available. To do so, we map the appropriate IO section
	274	* in the page table here in order to access GPIO registers.
	275	*/
	276	static void __init map_sa1100_gpio_regs( void )
	277	{
	278	unsigned long phys = __PREG(GPLR) & PMD_MASK;
	279	unsigned long virt = io_p2v(phys);
	280	int prot = PMD_TYPE_SECT \| PMD_SECT_AP_WRITE \| PMD_DOMAIN(DOMAIN_IO);
	281	pmd_t *pmd;
	282
a61c2332	283	pmd = pmd_offset(pud_offset(pgd_offset_k(virt), virt), virt);
1da177e4 LT	284	*pmd = __pmd(phys \| prot);
	285	flush_pmd_entry(pmd);
	286	}
	287
	288	/*
	289	* Read System Configuration "Register"
	290	* (taken from "Intel StrongARM SA-1110 Microprocessor Development Board
	291	* User's Guide", section 4.4.1)
	292	*
	293	* This same scan is performed in arch/arm/boot/compressed/head-sa1100.S
	294	* to set up the serial port for decompression status messages. We
	295	* repeat it here because the kernel may not be loaded as a zImage, and
	296	* also because it's a hassle to communicate the SCR value to the kernel
	297	* from the decompressor.
	298	*
	299	* Note that IRQs are guaranteed to be disabled.
	300	*/
	301	static void __init get_assabet_scr(void)
	302	{
	303	unsigned long scr, i;
	304
	305	GPDR \|= 0x3fc; /* Configure GPIO 9:2 as outputs */
	306	GPSR = 0x3fc; /* Write 0xFF to GPIO 9:2 */
	307	GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */
2f3eca8b RK	308	for(i = 100; i--; ) /* Read GPIO 9:2 */
2f3eca8b RK	309	scr = GPLR;
1da177e4 LT	310	GPDR \|= 0x3fc; /* restore correct pin direction */
	311	scr &= 0x3fc; /* save as system configuration byte. */
	312	SCR_value = scr;
	313	}
	314
	315	static void __init
0744a3ee	316	fixup_assabet(struct tag tags, char cmdline, struct meminfo mi)
1da177e4 LT	317	{
	318	/* This must be done before any call to machine_has_neponset() */
	319	map_sa1100_gpio_regs();
	320	get_assabet_scr();
	321
	322	if (machine_has_neponset())
	323	printk("Neponset expansion board detected\n");
	324	}
	325
	326
	327	static void assabet_uart_pm(struct uart_port *port, u_int state, u_int oldstate)
	328	{
	329	if (port->mapbase == _Ser1UTCR0) {
	330	if (state)
	331	ASSABET_BCR_clear(ASSABET_BCR_RS232EN \|
	332	ASSABET_BCR_COM_RTS \|
	333	ASSABET_BCR_COM_DTR);
	334	else
	335	ASSABET_BCR_set(ASSABET_BCR_RS232EN \|
	336	ASSABET_BCR_COM_RTS \|
	337	ASSABET_BCR_COM_DTR);
	338	}
	339	}
	340
	341	/*
	342	* Assabet uses COM_RTS and COM_DTR for both UART1 (com port)
	343	* and UART3 (radio module). We only handle them for UART1 here.
	344	*/
	345	static void assabet_set_mctrl(struct uart_port *port, u_int mctrl)
	346	{
	347	if (port->mapbase == _Ser1UTCR0) {
	348	u_int set = 0, clear = 0;
	349
	350	if (mctrl & TIOCM_RTS)
	351	clear \|= ASSABET_BCR_COM_RTS;
	352	else
	353	set \|= ASSABET_BCR_COM_RTS;
	354
	355	if (mctrl & TIOCM_DTR)
	356	clear \|= ASSABET_BCR_COM_DTR;
	357	else
	358	set \|= ASSABET_BCR_COM_DTR;
	359
	360	ASSABET_BCR_clear(clear);
	361	ASSABET_BCR_set(set);
	362	}
	363	}
	364
	365	static u_int assabet_get_mctrl(struct uart_port *port)
	366	{
	367	u_int ret = 0;
	368	u_int bsr = ASSABET_BSR;
	369
	370	/* need 2 reads to read current value */
	371	bsr = ASSABET_BSR;
	372
	373	if (port->mapbase == _Ser1UTCR0) {
	374	if (bsr & ASSABET_BSR_COM_DCD)
	375	ret \|= TIOCM_CD;
	376	if (bsr & ASSABET_BSR_COM_CTS)
	377	ret \|= TIOCM_CTS;
	378	if (bsr & ASSABET_BSR_COM_DSR)
	379	ret \|= TIOCM_DSR;
	380	} else if (port->mapbase == _Ser3UTCR0) {
381	if (bsr & ASSABET_BSR_RAD_DCD)
382	ret \|= TIOCM_CD;
383	if (bsr & ASSABET_BSR_RAD_CTS)
384	ret \|= TIOCM_CTS;
385	if (bsr & ASSABET_BSR_RAD_DSR)
386	ret \|= TIOCM_DSR;
387	if (bsr & ASSABET_BSR_RAD_RI)
388	ret \|= TIOCM_RI;
389	} else {
390	ret = TIOCM_CD \| TIOCM_CTS \| TIOCM_DSR;
391	}
392
393	return ret;
394	}
395
396	static struct sa1100_port_fns assabet_port_fns __initdata = {
397	.set_mctrl = assabet_set_mctrl,
398	.get_mctrl = assabet_get_mctrl,
399	.pm = assabet_uart_pm,
400	};
401
402	static struct map_desc assabet_io_desc[] __initdata = {
92519d82 DS	403	{ /* Board Control Register */
	404	.virtual = 0xf1000000,
	405	.pfn = __phys_to_pfn(0x12000000),
	406	.length = 0x00100000,
	407	.type = MT_DEVICE
	408	}, { /* MQ200 */
	409	.virtual = 0xf2800000,
	410	.pfn = __phys_to_pfn(0x4b800000),
	411	.length = 0x00800000,
	412	.type = MT_DEVICE
	413	}
1da177e4 LT	414	};
	415
	416	static void __init assabet_map_io(void)
	417	{
	418	sa1100_map_io();
	419	iotable_init(assabet_io_desc, ARRAY_SIZE(assabet_io_desc));
	420
	421	/*
	422	* Set SUS bit in SDCR0 so serial port 1 functions.
	423	* Its called GPCLKR0 in my SA1110 manual.
	424	*/
	425	Ser1SDCR0 \|= SDCR0_SUS;
	426
	427	if (machine_has_neponset()) {
	428	#ifdef CONFIG_ASSABET_NEPONSET
	429	extern void neponset_map_io(void);
	430
	431	/*
	432	* We map Neponset registers even if it isn't present since
	433	* many drivers will try to probe their stuff (and fail).
	434	* This is still more friendly than a kernel paging request
	435	* crash.
	436	*/
	437	neponset_map_io();
	438	#endif
	439	} else {
	440	sa1100_register_uart_fns(&assabet_port_fns);
	441	}
	442
	443	/*
	444	* When Neponset is attached, the first UART should be
	445	* UART3. That's what Angel is doing and many documents
	446	* are stating this.
	447	*
	448	* We do the Neponset mapping even if Neponset support
	449	* isn't compiled in so the user will still get something on
	450	* the expected physical serial port.
	451	*
	452	* We no longer do this; not all boot loaders support it,
	453	* and UART3 appears to be somewhat unreliable with blob.
	454	*/
	455	sa1100_register_uart(0, 1);
	456	sa1100_register_uart(2, 3);
	457	}
	458
	459
	460	MACHINE_START(ASSABET, "Intel-Assabet")
17f4425d	461	.atag_offset = 0x100,
e9dea0c6 RK	462	.fixup = fixup_assabet,
	463	.map_io = assabet_map_io,
	464	.init_irq = sa1100_init_irq,
1da177e4 LT	465	.timer = &sa1100_timer,
1da177e4 LT	466	.init_machine = assabet_init,
e9107ab6 NP	467	#ifdef CONFIG_SA1111
	468	.dma_zone_size = SZ_1M,
	469	#endif
d9ca5839	470	.restart = sa11x0_restart,
1da177e4	471	MACHINE_END