[linux-2.6-block.git] / arch / arm / mach-s3c64xx / mach-crag6410.c

/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
 *
 * Copyright 2011 Wolfson Microelectronics plc
 *	Mark Brown <broonie@opensource.wolfsonmicro.com>
 *
 * Copyright 2011 Simtec Electronics
 *	Ben Dooks <ben@simtec.co.uk>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/kernel.h>
#include <linux/list.h>
#include <linux/serial_core.h>
#include <linux/platform_device.h>
#include <linux/fb.h>
#include <linux/io.h>
#include <linux/init.h>
#include <linux/gpio.h>
#include <linux/delay.h>
#include <linux/regulator/machine.h>
#include <linux/regulator/fixed.h>
#include <linux/pwm_backlight.h>
#include <linux/dm9000.h>
#include <linux/gpio_keys.h>
#include <linux/basic_mmio_gpio.h>
#include <linux/spi/spi.h>

#include <linux/i2c/pca953x.h>

#include <video/platform_lcd.h>

#include <linux/mfd/wm831x/core.h>
#include <linux/mfd/wm831x/pdata.h>
#include <linux/mfd/wm831x/irq.h>
#include <linux/mfd/wm831x/gpio.h>

#include <asm/mach/arch.h>
#include <asm/mach-types.h>

#include <mach/hardware.h>
#include <mach/map.h>

#include <mach/s3c6410.h>
#include <mach/regs-sys.h>
#include <mach/regs-gpio.h>
#include <mach/regs-modem.h>

#include <mach/regs-gpio-memport.h>

#include <plat/regs-serial.h>
#include <plat/regs-fb-v4.h>
#include <plat/fb.h>
#include <plat/sdhci.h>
#include <plat/gpio-cfg.h>
#include <plat/s3c64xx-spi.h>

#include <plat/keypad.h>
#include <plat/clock.h>
#include <plat/devs.h>
#include <plat/cpu.h>
#include <plat/adc.h>
#include <plat/iic.h>
#include <plat/pm.h>

#include <sound/wm8915.h>
#include <sound/wm8962.h>
#include <sound/wm9081.h>

#define BANFF_PMIC_IRQ_BASE		IRQ_BOARD_START
#define GLENFARCLAS_PMIC_IRQ_BASE	(IRQ_BOARD_START + 64)

#define PCA935X_GPIO_BASE		GPIO_BOARD_START
#define CODEC_GPIO_BASE		(GPIO_BOARD_START + 8)
#define GLENFARCLAS_PMIC_GPIO_BASE	(GPIO_BOARD_START + 16)

/* serial port setup */

#define UCON (S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK)
#define ULCON (S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB)
#define UFCON (S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE)

static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
	[0] = {
		.hwport		= 0,
		.flags		= 0,
		.ucon		= UCON,
		.ulcon		= ULCON,
		.ufcon		= UFCON,
	},
	[1] = {
		.hwport		= 1,
		.flags		= 0,
		.ucon		= UCON,
		.ulcon		= ULCON,
		.ufcon		= UFCON,
	},
	[2] = {
		.hwport		= 2,
		.flags		= 0,
		.ucon		= UCON,
		.ulcon		= ULCON,
		.ufcon		= UFCON,
	},
	[3] = {
		.hwport		= 3,
		.flags		= 0,
		.ucon		= UCON,
		.ulcon		= ULCON,
		.ufcon		= UFCON,
	},
};

static struct platform_pwm_backlight_data crag6410_backlight_data = {
	.pwm_id		= 0,
	.max_brightness	= 1000,
	.dft_brightness	= 600,
	.pwm_period_ns	= 100000,	/* about 1kHz */
};

static struct platform_device crag6410_backlight_device = {
	.name		= "pwm-backlight",
	.id		= -1,
	.dev		= {
		.parent	= &s3c_device_timer[0].dev,
		.platform_data = &crag6410_backlight_data,
	},
};

static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
{
	pr_debug("%s: setting power %d\n", __func__, power);

	if (power) {
		gpio_set_value(S3C64XX_GPB(0), 1);
		msleep(1);
		s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
	} else {
		gpio_direction_output(S3C64XX_GPF(14), 0);
		gpio_set_value(S3C64XX_GPB(0), 0);
	}
}

static struct platform_device crag6410_lcd_powerdev = {
	.name			= "platform-lcd",
	.id			= -1,
	.dev.parent		= &s3c_device_fb.dev,
	.dev.platform_data	= &(struct plat_lcd_data) {
		.set_power	= crag6410_lcd_power_set,
	},
};

/* 640x480 URT */
static struct s3c_fb_pd_win crag6410_fb_win0 = {
	/* this is to ensure we use win0 */
	.win_mode	= {
		.left_margin	= 150,
		.right_margin	= 80,
		.upper_margin	= 40,
		.lower_margin	= 5,
		.hsync_len	= 40,
		.vsync_len	= 5,
		.xres		= 640,
		.yres		= 480,
	},
	.max_bpp	= 32,
	.default_bpp	= 16,
	.virtual_y	= 480 * 2,
	.virtual_x	= 640,
};

/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
	.setup_gpio	= s3c64xx_fb_gpio_setup_24bpp,
	.win[0]		= &crag6410_fb_win0,
	.vidcon0	= VIDCON0_VIDOUT_RGB | VIDCON0_PNRMODE_RGB,
	.vidcon1	= VIDCON1_INV_HSYNC | VIDCON1_INV_VSYNC,
};

/* 2x6 keypad */

static uint32_t crag6410_keymap[] __initdata = {
	/* KEY(row, col, keycode) */
	KEY(0, 0, KEY_VOLUMEUP),
	KEY(0, 1, KEY_HOME),
	KEY(0, 2, KEY_VOLUMEDOWN),
	KEY(0, 3, KEY_HELP),
	KEY(0, 4, KEY_MENU),
	KEY(0, 5, KEY_MEDIA),
	KEY(1, 0, 232),
	KEY(1, 1, KEY_DOWN),
	KEY(1, 2, KEY_LEFT),
	KEY(1, 3, KEY_UP),
	KEY(1, 4, KEY_RIGHT),
	KEY(1, 5, KEY_CAMERA),
};

static struct matrix_keymap_data crag6410_keymap_data __initdata = {
	.keymap		= crag6410_keymap,
	.keymap_size	= ARRAY_SIZE(crag6410_keymap),
};

static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
	.keymap_data	= &crag6410_keymap_data,
	.rows		= 2,
	.cols		= 6,
};

static struct gpio_keys_button crag6410_gpio_keys[] = {
	[0] = {
		.code	= KEY_SUSPEND,
		.gpio	= S3C64XX_GPL(10),	/* EINT 18 */
		.type	= EV_KEY,
		.wakeup	= 1,
		.active_low = 1,
	},
	[1] = {
		.code	= SW_FRONT_PROXIMITY,
		.gpio	= S3C64XX_GPN(11),	/* EINT 11 */
		.type	= EV_SW,
	},
};

static struct gpio_keys_platform_data crag6410_gpio_keydata = {
	.buttons	= crag6410_gpio_keys,
	.nbuttons	= ARRAY_SIZE(crag6410_gpio_keys),
};

static struct platform_device crag6410_gpio_keydev = {
	.name		= "gpio-keys",
	.id		= 0,
	.dev.platform_data = &crag6410_gpio_keydata,
};

static struct resource crag6410_dm9k_resource[] = {
	[0] = {
		.start	= S3C64XX_PA_XM0CSN5,
		.end	= S3C64XX_PA_XM0CSN5 + 1,
		.flags	= IORESOURCE_MEM,
	},
	[1] = {
		.start	= S3C64XX_PA_XM0CSN5 + (1 << 8),
		.end	= S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
		.flags	= IORESOURCE_MEM,
	},
	[2] = {
		.start	= S3C_EINT(17),
		.end	= S3C_EINT(17),
		.flags	= IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
	},
};

static struct dm9000_plat_data mini6410_dm9k_pdata = {
	.flags	= DM9000_PLATF_16BITONLY,
};

static struct platform_device crag6410_dm9k_device = {
	.name		= "dm9000",
	.id		= -1,
	.num_resources	= ARRAY_SIZE(crag6410_dm9k_resource),
	.resource	= crag6410_dm9k_resource,
	.dev.platform_data = &mini6410_dm9k_pdata,
};

static struct resource crag6410_mmgpio_resource[] = {
	[0] = {
		.start	= S3C64XX_PA_XM0CSN4 + 1,
		.end	= S3C64XX_PA_XM0CSN4 + 1,
		.flags	= IORESOURCE_MEM,
	},
};

static struct platform_device crag6410_mmgpio = {
	.name		= "basic-mmio-gpio",
	.id		= -1,
	.resource	= crag6410_mmgpio_resource,
	.num_resources	= ARRAY_SIZE(crag6410_mmgpio_resource),
	.dev.platform_data = &(struct bgpio_pdata) {
		.base	= -1,
	},
};

static struct platform_device speyside_device = {
	.name		= "speyside",
	.id		= -1,
};

static struct platform_device speyside_wm8962_device = {
	.name		= "speyside-wm8962",
	.id		= -1,
};

static struct regulator_consumer_supply wallvdd_consumers[] = {
	REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
	REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
};

static struct regulator_init_data wallvdd_data = {
	.constraints = {
		.always_on = 1,
	},
	.num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
	.consumer_supplies = wallvdd_consumers,
};

static struct fixed_voltage_config wallvdd_pdata = {
	.supply_name = "WALLVDD",
	.microvolts = 5000000,
	.init_data = &wallvdd_data,
	.gpio = -EINVAL,
};

static struct platform_device wallvdd_device = {
	.name		= "reg-fixed-voltage",
	.id		= -1,
	.dev = {
		.platform_data = &wallvdd_pdata,
	},
};

static struct platform_device *crag6410_devices[] __initdata = {
	&s3c_device_hsmmc0,
	&s3c_device_hsmmc1,
	&s3c_device_hsmmc2,
	&s3c_device_i2c0,
	&s3c_device_i2c1,
	&s3c_device_fb,
	&s3c_device_ohci,
	&s3c_device_usb_hsotg,
	&s3c_device_adc,
	&s3c_device_rtc,
	&s3c_device_ts,
	&s3c_device_timer[0],
	&s3c64xx_device_iis0,
	&s3c64xx_device_iis1,
	&samsung_asoc_dma,
	&samsung_device_keypad,
	&crag6410_gpio_keydev,
	&crag6410_dm9k_device,
	&s3c64xx_device_spi0,
	&crag6410_mmgpio,
	&crag6410_lcd_powerdev,
	&crag6410_backlight_device,
	&speyside_device,
	&speyside_wm8962_device,
	&wallvdd_device,
};

static struct pca953x_platform_data crag6410_pca_data = {
	.gpio_base	= PCA935X_GPIO_BASE,
	.irq_base	= 0,
};

static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
	REGULATOR_SUPPLY("vddarm", NULL),
};

static struct regulator_init_data vddarm __initdata = {
	.constraints = {
		.name = "VDDARM",
		.min_uV = 1000000,
		.max_uV = 1300000,
		.always_on = 1,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	},
	.num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
	.consumer_supplies = vddarm_consumers,
};

static struct regulator_init_data vddint __initdata = {
	.constraints = {
		.name = "VDDINT",
		.min_uV = 1000000,
		.max_uV = 1200000,
		.always_on = 1,
		.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	},
};

static struct regulator_init_data vddmem __initdata = {
	.constraints = {
		.name = "VDDMEM",
		.always_on = 1,
	},
};

static struct regulator_init_data vddsys __initdata = {
	.constraints = {
		.name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
		.always_on = 1,
	},
};

static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
};

static struct regulator_init_data vddmmc __initdata = {
	.constraints = {
		.name = "VDDMMC,UH",
		.always_on = 1,
	},
	.num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
	.consumer_supplies = vddmmc_consumers,
};

static struct regulator_init_data vddotgi __initdata = {
	.constraints = {
		.name = "VDDOTGi",
		.always_on = 1,
	},
};

static struct regulator_init_data vddotg __initdata = {
	.constraints = {
		.name = "VDDOTG",
		.always_on = 1,
	},
};

static struct regulator_init_data vddhi __initdata = {
	.constraints = {
		.name = "VDDHI",
		.always_on = 1,
	},
};

static struct regulator_init_data vddadc __initdata = {
	.constraints = {
		.name = "VDDADC,VDDDAC",
		.always_on = 1,
	},
};

static struct regulator_init_data vddmem0 __initdata = {
	.constraints = {
		.name = "VDDMEM0",
		.always_on = 1,
	},
};

static struct regulator_init_data vddpll __initdata = {
	.constraints = {
		.name = "VDDPLL",
		.always_on = 1,
	},
};

static struct regulator_init_data vddlcd __initdata = {
	.constraints = {
		.name = "VDDLCD",
		.always_on = 1,
	},
};

static struct regulator_init_data vddalive __initdata = {
	.constraints = {
		.name = "VDDALIVE",
		.always_on = 1,
	},
};

static struct wm831x_status_pdata banff_red_led __initdata = {
	.name = "banff:red:",
	.default_src = WM831X_STATUS_MANUAL,
};

static struct wm831x_status_pdata banff_green_led __initdata = {
	.name = "banff:green:",
	.default_src = WM831X_STATUS_MANUAL,
};

static struct wm831x_touch_pdata touch_pdata __initdata = {
	.data_irq = S3C_EINT(26),
	.pd_irq = S3C_EINT(27),
};

static struct wm831x_pdata crag_pmic_pdata __initdata = {
	.wm831x_num = 1,
	.irq_base = BANFF_PMIC_IRQ_BASE,
	.gpio_base = GPIO_BOARD_START + 8,

	.gpio_defaults = {
		/* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
		[10] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x6,
		/* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
		[11] = WM831X_GPN_POL | WM831X_GPN_ENA | 0x7,
	},

	.dcdc = {
		&vddarm,  /* DCDC1 */
		&vddint,  /* DCDC2 */
		&vddmem,  /* DCDC3 */
	},

	.ldo = {
		&vddsys,   /* LDO1 */
		&vddmmc,   /* LDO2 */
		NULL,      /* LDO3 */
		&vddotgi,  /* LDO4 */
		&vddotg,   /* LDO5 */
		&vddhi,    /* LDO6 */
		&vddadc,   /* LDO7 */
		&vddmem0,  /* LDO8 */
		&vddpll,   /* LDO9 */
		&vddlcd,   /* LDO10 */
		&vddalive, /* LDO11 */
	},

	.status = {
		&banff_green_led,
		&banff_red_led,
	},

	.touch = &touch_pdata,
};

static struct i2c_board_info i2c_devs0[] __initdata = {
	{ I2C_BOARD_INFO("24c08", 0x50), },
	{ I2C_BOARD_INFO("tca6408", 0x20),
	  .platform_data = &crag6410_pca_data,
	},
	{ I2C_BOARD_INFO("wm8312", 0x34),
	  .platform_data = &crag_pmic_pdata,
	  .irq = S3C_EINT(23),
	},
};

static struct s3c2410_platform_i2c i2c0_pdata = {
	.frequency = 400000,
};

static struct regulator_init_data pvdd_1v2 __initdata = {
	.constraints = {
		.name = "PVDD_1V2",
		.always_on = 1,
	},
};

static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
	REGULATOR_SUPPLY("PLLVDD", "1-001a"),
	REGULATOR_SUPPLY("DBVDD", "1-001a"),
	REGULATOR_SUPPLY("CPVDD", "1-001a"),
	REGULATOR_SUPPLY("AVDD2", "1-001a"),
	REGULATOR_SUPPLY("DCVDD", "1-001a"),
	REGULATOR_SUPPLY("AVDD", "1-001a"),
};

static struct regulator_init_data pvdd_1v8 __initdata = {
	.constraints = {
		.name = "PVDD_1V8",
		.always_on = 1,
	},

	.consumer_supplies = pvdd_1v8_consumers,
	.num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
};

static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
	REGULATOR_SUPPLY("MICVDD", "1-001a"),
	REGULATOR_SUPPLY("AVDD1", "1-001a"),
};

static struct regulator_init_data pvdd_3v3 __initdata = {
	.constraints = {
		.name = "PVDD_3V3",
		.always_on = 1,
	},

	.consumer_supplies = pvdd_3v3_consumers,
	.num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
};

static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
	.wm831x_num = 2,
	.irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
	.gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,

	.gpio_defaults = {
		/* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
		[0] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
		[1] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
		[2] = WM831X_GPN_DIR | WM831X_GPN_POL | WM831X_GPN_ENA,
	},

	.dcdc = {
		&pvdd_1v2,  /* DCDC1 */
		&pvdd_1v8,  /* DCDC2 */
		&pvdd_3v3,  /* DCDC3 */
	},

	.disable_touch = true,
};

static struct wm8915_retune_mobile_config wm8915_retune[] = {
	{
		.name = "Sub LPF",
		.rate = 48000,
		.regs = {
			0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
			0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
			0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
		},
	},
	{
		.name = "Sub HPF",
		.rate = 48000,
		.regs = {
			0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
			0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
			0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
		},
	},
};

static struct wm8915_pdata wm8915_pdata __initdata = {
	.ldo_ena = S3C64XX_GPN(7),
	.gpio_base = CODEC_GPIO_BASE,
	.micdet_def = 1,
	.inl_mode = WM8915_DIFFERRENTIAL_1,
	.inr_mode = WM8915_DIFFERRENTIAL_1,

	.irq_flags = IRQF_TRIGGER_FALLING,

	.gpio_default = {
		0x8001, /* GPIO1 == ADCLRCLK1 */
		0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
		0x0141, /* GPIO3 == HP_SEL */
		0x0002, /* GPIO4 == IRQ */
		0x020e, /* GPIO5 == CLKOUT */
	},

	.retune_mobile_cfgs = wm8915_retune,
	.num_retune_mobile_cfgs = ARRAY_SIZE(wm8915_retune),
};

static struct wm8962_pdata wm8962_pdata __initdata = {
	.gpio_init = {
		0,
		WM8962_GPIO_FN_OPCLK,
		WM8962_GPIO_FN_DMICCLK,
		0,
		0x8000 | WM8962_GPIO_FN_DMICDAT,
		WM8962_GPIO_FN_IRQ,    /* Open drain mode */
	},
	.irq_active_low = true,
};

static struct wm9081_pdata wm9081_pdata __initdata = {
	.irq_high = false,
	.irq_cmos = false,
};

static struct i2c_board_info i2c_devs1[] __initdata = {
	{ I2C_BOARD_INFO("wm8311", 0x34),
	  .irq = S3C_EINT(0),
	  .platform_data = &glenfarclas_pmic_pdata },

	{ I2C_BOARD_INFO("wm1250-ev1", 0x27) },
	{ I2C_BOARD_INFO("wm8915", 0x1a),
	  .platform_data = &wm8915_pdata,
	  .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	},
	{ I2C_BOARD_INFO("wm9081", 0x6c),
	  .platform_data = &wm9081_pdata, },
	{ I2C_BOARD_INFO("wm8962", 0x1a),
	  .platform_data = &wm8962_pdata,
	  .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	},
};

static void __init crag6410_map_io(void)
{
	s3c64xx_init_io(NULL, 0);
	s3c24xx_init_clocks(12000000);
	s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));

	/* LCD type and Bypass set by bootloader */
}

static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
	.max_width		= 4,
	.cd_type		= S3C_SDHCI_CD_PERMANENT,
};

static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
	.max_width		= 4,
	.cd_type		= S3C_SDHCI_CD_GPIO,
	.ext_cd_gpio		= S3C64XX_GPF(11),
};

static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
{
	/* Set all the necessary GPG pins to special-function 2 */
	s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));

	/* force card-detected for prototype 0 */
	s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
}

static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
	.max_width		= 4,
	.cd_type		= S3C_SDHCI_CD_INTERNAL,
	.cfg_gpio		= crag6410_cfg_sdhci0,
};

static void __init crag6410_machine_init(void)
{
	/* Open drain IRQs need pullups */
	s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
	s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);

	gpio_request(S3C64XX_GPB(0), "LCD power");
	gpio_direction_output(S3C64XX_GPB(0), 0);

	gpio_request(S3C64XX_GPF(14), "LCD PWM");
	gpio_direction_output(S3C64XX_GPF(14), 0);  /* turn off */

	gpio_request(S3C64XX_GPB(1), "SD power");
	gpio_direction_output(S3C64XX_GPB(1), 0);

	gpio_request(S3C64XX_GPF(10), "nRESETSEL");
	gpio_direction_output(S3C64XX_GPF(10), 1);

	s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
	s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
	s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);

	s3c_i2c0_set_platdata(&i2c0_pdata);
	s3c_i2c1_set_platdata(NULL);
	s3c_fb_set_platdata(&crag6410_lcd_pdata);

	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));

	samsung_keypad_set_platdata(&crag6410_keypad_data);

	platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));

	regulator_has_full_constraints();

	s3c_pm_init();
}

MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
	/* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
	.boot_params	= S3C64XX_PA_SDRAM + 0x100,
	.init_irq	= s3c6410_init_irq,
	.map_io		= crag6410_map_io,
	.init_machine	= crag6410_machine_init,
	.timer		= &s3c24xx_timer,
MACHINE_END
Commit	Line	Data
e1a3c74f MB	1	/* linux/arch/arm/mach-s3c64xx/mach-crag6410.c
	2	*
	3	* Copyright 2011 Wolfson Microelectronics plc
	4	* Mark Brown <broonie@opensource.wolfsonmicro.com>
	5	*
	6	* Copyright 2011 Simtec Electronics
	7	* Ben Dooks <ben@simtec.co.uk>
	8	*
	9	* This program is free software; you can redistribute it and/or modify
	10	* it under the terms of the GNU General Public License version 2 as
	11	* published by the Free Software Foundation.
	12	*/
	13
	14	#include <linux/kernel.h>
	15	#include <linux/list.h>
	16	#include <linux/serial_core.h>
	17	#include <linux/platform_device.h>
	18	#include <linux/fb.h>
	19	#include <linux/io.h>
	20	#include <linux/init.h>
	21	#include <linux/gpio.h>
	22	#include <linux/delay.h>
	23	#include <linux/regulator/machine.h>
ae24c263	24	#include <linux/regulator/fixed.h>
e1a3c74f MB	25	#include <linux/pwm_backlight.h>
	26	#include <linux/dm9000.h>
	27	#include <linux/gpio_keys.h>
	28	#include <linux/basic_mmio_gpio.h>
	29	#include <linux/spi/spi.h>
	30
	31	#include <linux/i2c/pca953x.h>
	32
	33	#include <video/platform_lcd.h>
	34
	35	#include <linux/mfd/wm831x/core.h>
	36	#include <linux/mfd/wm831x/pdata.h>
ae24c263	37	#include <linux/mfd/wm831x/irq.h>
e1a3c74f MB	38	#include <linux/mfd/wm831x/gpio.h>
	39
	40	#include <asm/mach/arch.h>
	41	#include <asm/mach-types.h>
	42
	43	#include <mach/hardware.h>
	44	#include <mach/map.h>
	45
	46	#include <mach/s3c6410.h>
	47	#include <mach/regs-sys.h>
	48	#include <mach/regs-gpio.h>
	49	#include <mach/regs-modem.h>
	50
e1a3c74f MB	51	#include <mach/regs-gpio-memport.h>
	52
	53	#include <plat/regs-serial.h>
	54	#include <plat/regs-fb-v4.h>
	55	#include <plat/fb.h>
	56	#include <plat/sdhci.h>
	57	#include <plat/gpio-cfg.h>
	58	#include <plat/s3c64xx-spi.h>
	59
	60	#include <plat/keypad.h>
	61	#include <plat/clock.h>
	62	#include <plat/devs.h>
	63	#include <plat/cpu.h>
	64	#include <plat/adc.h>
	65	#include <plat/iic.h>
	66	#include <plat/pm.h>
	67
ae24c263 MB	68	#include <sound/wm8915.h>
	69	#include <sound/wm8962.h>
	70	#include <sound/wm9081.h>
e1a3c74f	71
ae24c263 MB	72	#define BANFF_PMIC_IRQ_BASE IRQ_BOARD_START
	73	#define GLENFARCLAS_PMIC_IRQ_BASE (IRQ_BOARD_START + 64)
	74
	75	#define PCA935X_GPIO_BASE GPIO_BOARD_START
	76	#define CODEC_GPIO_BASE (GPIO_BOARD_START + 8)
	77	#define GLENFARCLAS_PMIC_GPIO_BASE (GPIO_BOARD_START + 16)
e1a3c74f MB	78
	79	/* serial port setup */
	80
	81	#define UCON (S3C2410_UCON_DEFAULT \| S3C2410_UCON_UCLK)
	82	#define ULCON (S3C2410_LCON_CS8 \| S3C2410_LCON_PNONE \| S3C2410_LCON_STOPB)
	83	#define UFCON (S3C2410_UFCON_RXTRIG8 \| S3C2410_UFCON_FIFOMODE)
	84
	85	static struct s3c2410_uartcfg crag6410_uartcfgs[] __initdata = {
	86	[0] = {
ae24c263 MB	87	.hwport = 0,
	88	.flags = 0,
	89	.ucon = UCON,
	90	.ulcon = ULCON,
	91	.ufcon = UFCON,
e1a3c74f MB	92	},
e1a3c74f MB	93	[1] = {
ae24c263 MB	94	.hwport = 1,
	95	.flags = 0,
	96	.ucon = UCON,
	97	.ulcon = ULCON,
	98	.ufcon = UFCON,
e1a3c74f MB	99	},
e1a3c74f MB	100	[2] = {
ae24c263 MB	101	.hwport = 2,
	102	.flags = 0,
	103	.ucon = UCON,
	104	.ulcon = ULCON,
	105	.ufcon = UFCON,
e1a3c74f MB	106	},
e1a3c74f MB	107	[3] = {
ae24c263 MB	108	.hwport = 3,
	109	.flags = 0,
	110	.ucon = UCON,
	111	.ulcon = ULCON,
	112	.ufcon = UFCON,
e1a3c74f MB	113	},
	114	};
	115
	116	static struct platform_pwm_backlight_data crag6410_backlight_data = {
	117	.pwm_id = 0,
	118	.max_brightness = 1000,
	119	.dft_brightness = 600,
	120	.pwm_period_ns = 100000, /* about 1kHz */
	121	};
	122
	123	static struct platform_device crag6410_backlight_device = {
	124	.name = "pwm-backlight",
	125	.id = -1,
	126	.dev = {
	127	.parent = &s3c_device_timer[0].dev,
	128	.platform_data = &crag6410_backlight_data,
	129	},
	130	};
	131
	132	static void crag6410_lcd_power_set(struct plat_lcd_data *pd, unsigned int power)
	133	{
	134	pr_debug("%s: setting power %d\n", __func__, power);
	135
	136	if (power) {
	137	gpio_set_value(S3C64XX_GPB(0), 1);
	138	msleep(1);
	139	s3c_gpio_cfgpin(S3C64XX_GPF(14), S3C_GPIO_SFN(2));
	140	} else {
	141	gpio_direction_output(S3C64XX_GPF(14), 0);
	142	gpio_set_value(S3C64XX_GPB(0), 0);
	143	}
	144	}
	145
	146	static struct platform_device crag6410_lcd_powerdev = {
	147	.name = "platform-lcd",
	148	.id = -1,
	149	.dev.parent = &s3c_device_fb.dev,
	150	.dev.platform_data = &(struct plat_lcd_data) {
	151	.set_power = crag6410_lcd_power_set,
	152	},
	153	};
	154
	155	/* 640x480 URT */
	156	static struct s3c_fb_pd_win crag6410_fb_win0 = {
	157	/* this is to ensure we use win0 */
	158	.win_mode = {
	159	.left_margin = 150,
	160	.right_margin = 80,
	161	.upper_margin = 40,
	162	.lower_margin = 5,
	163	.hsync_len = 40,
	164	.vsync_len = 5,
	165	.xres = 640,
	166	.yres = 480,
	167	},
	168	.max_bpp = 32,
	169	.default_bpp = 16,
	170	.virtual_y = 480 * 2,
	171	.virtual_x = 640,
	172	};
	173
	174	/* 405566 clocks per frame => 60Hz refresh requires 24333960Hz clock */
	175	static struct s3c_fb_platdata crag6410_lcd_pdata __initdata = {
	176	.setup_gpio = s3c64xx_fb_gpio_setup_24bpp,
177	.win[0] = &crag6410_fb_win0,
178	.vidcon0 = VIDCON0_VIDOUT_RGB \| VIDCON0_PNRMODE_RGB,
179	.vidcon1 = VIDCON1_INV_HSYNC \| VIDCON1_INV_VSYNC,
180	};
181
182	/* 2x6 keypad */
183
184	static uint32_t crag6410_keymap[] __initdata = {
185	/* KEY(row, col, keycode) */
186	KEY(0, 0, KEY_VOLUMEUP),
187	KEY(0, 1, KEY_HOME),
188	KEY(0, 2, KEY_VOLUMEDOWN),
189	KEY(0, 3, KEY_HELP),
190	KEY(0, 4, KEY_MENU),
191	KEY(0, 5, KEY_MEDIA),
192	KEY(1, 0, 232),
193	KEY(1, 1, KEY_DOWN),
194	KEY(1, 2, KEY_LEFT),
195	KEY(1, 3, KEY_UP),
196	KEY(1, 4, KEY_RIGHT),
197	KEY(1, 5, KEY_CAMERA),
198	};
199
200	static struct matrix_keymap_data crag6410_keymap_data __initdata = {
201	.keymap = crag6410_keymap,
202	.keymap_size = ARRAY_SIZE(crag6410_keymap),
203	};
204
205	static struct samsung_keypad_platdata crag6410_keypad_data __initdata = {
206	.keymap_data = &crag6410_keymap_data,
207	.rows = 2,
208	.cols = 6,
209	};
210
211	static struct gpio_keys_button crag6410_gpio_keys[] = {
212	[0] = {
213	.code = KEY_SUSPEND,
214	.gpio = S3C64XX_GPL(10), /* EINT 18 */
ae24c263	215	.type = EV_KEY,
e1a3c74f MB	216	.wakeup = 1,
	217	.active_low = 1,
	218	},
ae24c263 MB	219	[1] = {
	220	.code = SW_FRONT_PROXIMITY,
	221	.gpio = S3C64XX_GPN(11), /* EINT 11 */
	222	.type = EV_SW,
	223	},
e1a3c74f MB	224	};
	225
	226	static struct gpio_keys_platform_data crag6410_gpio_keydata = {
	227	.buttons = crag6410_gpio_keys,
	228	.nbuttons = ARRAY_SIZE(crag6410_gpio_keys),
	229	};
	230
	231	static struct platform_device crag6410_gpio_keydev = {
	232	.name = "gpio-keys",
	233	.id = 0,
	234	.dev.platform_data = &crag6410_gpio_keydata,
	235	};
	236
	237	static struct resource crag6410_dm9k_resource[] = {
	238	[0] = {
	239	.start = S3C64XX_PA_XM0CSN5,
	240	.end = S3C64XX_PA_XM0CSN5 + 1,
	241	.flags = IORESOURCE_MEM,
	242	},
	243	[1] = {
	244	.start = S3C64XX_PA_XM0CSN5 + (1 << 8),
	245	.end = S3C64XX_PA_XM0CSN5 + (1 << 8) + 1,
	246	.flags = IORESOURCE_MEM,
	247	},
	248	[2] = {
	249	.start = S3C_EINT(17),
	250	.end = S3C_EINT(17),
	251	.flags = IORESOURCE_IRQ \| IORESOURCE_IRQ_HIGHLEVEL,
	252	},
	253	};
	254
	255	static struct dm9000_plat_data mini6410_dm9k_pdata = {
	256	.flags = DM9000_PLATF_16BITONLY,
	257	};
	258
	259	static struct platform_device crag6410_dm9k_device = {
	260	.name = "dm9000",
	261	.id = -1,
	262	.num_resources = ARRAY_SIZE(crag6410_dm9k_resource),
	263	.resource = crag6410_dm9k_resource,
	264	.dev.platform_data = &mini6410_dm9k_pdata,
	265	};
	266
	267	static struct resource crag6410_mmgpio_resource[] = {
	268	[0] = {
	269	.start = S3C64XX_PA_XM0CSN4 + 1,
	270	.end = S3C64XX_PA_XM0CSN4 + 1,
	271	.flags = IORESOURCE_MEM,
	272	},
	273	};
	274
	275	static struct platform_device crag6410_mmgpio = {
	276	.name = "basic-mmio-gpio",
	277	.id = -1,
	278	.resource = crag6410_mmgpio_resource,
	279	.num_resources = ARRAY_SIZE(crag6410_mmgpio_resource),
	280	.dev.platform_data = &(struct bgpio_pdata) {
	281	.base = -1,
	282	},
	283	};
	284
ae24c263 MB	285	static struct platform_device speyside_device = {
	286	.name = "speyside",
	287	.id = -1,
	288	};
	289
	290	static struct platform_device speyside_wm8962_device = {
	291	.name = "speyside-wm8962",
	292	.id = -1,
	293	};
	294
	295	static struct regulator_consumer_supply wallvdd_consumers[] = {
	296	REGULATOR_SUPPLY("SPKVDD1", "1-001a"),
	297	REGULATOR_SUPPLY("SPKVDD2", "1-001a"),
	298	};
	299
	300	static struct regulator_init_data wallvdd_data = {
	301	.constraints = {
	302	.always_on = 1,
	303	},
	304	.num_consumer_supplies = ARRAY_SIZE(wallvdd_consumers),
	305	.consumer_supplies = wallvdd_consumers,
	306	};
	307
	308	static struct fixed_voltage_config wallvdd_pdata = {
	309	.supply_name = "WALLVDD",
	310	.microvolts = 5000000,
	311	.init_data = &wallvdd_data,
	312	.gpio = -EINVAL,
	313	};
	314
	315	static struct platform_device wallvdd_device = {
	316	.name = "reg-fixed-voltage",
	317	.id = -1,
	318	.dev = {
	319	.platform_data = &wallvdd_pdata,
	320	},
	321	};
	322
e1a3c74f MB	323	static struct platform_device *crag6410_devices[] __initdata = {
	324	&s3c_device_hsmmc0,
	325	&s3c_device_hsmmc1,
	326	&s3c_device_hsmmc2,
	327	&s3c_device_i2c0,
	328	&s3c_device_i2c1,
	329	&s3c_device_fb,
	330	&s3c_device_ohci,
	331	&s3c_device_usb_hsotg,
	332	&s3c_device_adc,
	333	&s3c_device_rtc,
	334	&s3c_device_ts,
	335	&s3c_device_timer[0],
	336	&s3c64xx_device_iis0,
	337	&s3c64xx_device_iis1,
	338	&samsung_asoc_dma,
	339	&samsung_device_keypad,
	340	&crag6410_gpio_keydev,
	341	&crag6410_dm9k_device,
	342	&s3c64xx_device_spi0,
	343	&crag6410_mmgpio,
	344	&crag6410_lcd_powerdev,
	345	&crag6410_backlight_device,
ae24c263 MB	346	&speyside_device,
	347	&speyside_wm8962_device,
	348	&wallvdd_device,
e1a3c74f MB	349	};
	350
	351	static struct pca953x_platform_data crag6410_pca_data = {
	352	.gpio_base = PCA935X_GPIO_BASE,
	353	.irq_base = 0,
	354	};
	355
	356	static struct regulator_consumer_supply vddarm_consumers[] __initdata = {
	357	REGULATOR_SUPPLY("vddarm", NULL),
	358	};
	359
	360	static struct regulator_init_data vddarm __initdata = {
	361	.constraints = {
	362	.name = "VDDARM",
	363	.min_uV = 1000000,
	364	.max_uV = 1300000,
	365	.always_on = 1,
	366	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	367	},
	368	.num_consumer_supplies = ARRAY_SIZE(vddarm_consumers),
	369	.consumer_supplies = vddarm_consumers,
	370	};
	371
	372	static struct regulator_init_data vddint __initdata = {
	373	.constraints = {
	374	.name = "VDDINT",
	375	.min_uV = 1000000,
	376	.max_uV = 1200000,
	377	.always_on = 1,
	378	.valid_ops_mask = REGULATOR_CHANGE_VOLTAGE,
	379	},
	380	};
	381
	382	static struct regulator_init_data vddmem __initdata = {
	383	.constraints = {
	384	.name = "VDDMEM",
	385	.always_on = 1,
	386	},
	387	};
	388
	389	static struct regulator_init_data vddsys __initdata = {
	390	.constraints = {
	391	.name = "VDDSYS,VDDEXT,VDDPCM,VDDSS",
	392	.always_on = 1,
	393	},
	394	};
	395
	396	static struct regulator_consumer_supply vddmmc_consumers[] __initdata = {
	397	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.0"),
	398	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.1"),
	399	REGULATOR_SUPPLY("vmmc", "s3c-sdhci.2"),
	400	};
	401
	402	static struct regulator_init_data vddmmc __initdata = {
	403	.constraints = {
	404	.name = "VDDMMC,UH",
	405	.always_on = 1,
	406	},
	407	.num_consumer_supplies = ARRAY_SIZE(vddmmc_consumers),
	408	.consumer_supplies = vddmmc_consumers,
	409	};
	410
	411	static struct regulator_init_data vddotgi __initdata = {
	412	.constraints = {
413	.name = "VDDOTGi",
414	.always_on = 1,
415	},
416	};
417
418	static struct regulator_init_data vddotg __initdata = {
419	.constraints = {
420	.name = "VDDOTG",
421	.always_on = 1,
422	},
423	};
424
425	static struct regulator_init_data vddhi __initdata = {
426	.constraints = {
427	.name = "VDDHI",
428	.always_on = 1,
429	},
430	};
431
432	static struct regulator_init_data vddadc __initdata = {
433	.constraints = {
434	.name = "VDDADC,VDDDAC",
435	.always_on = 1,
436	},
437	};
438
439	static struct regulator_init_data vddmem0 __initdata = {
440	.constraints = {
441	.name = "VDDMEM0",
442	.always_on = 1,
443	},
444	};
445
446	static struct regulator_init_data vddpll __initdata = {
447	.constraints = {
448	.name = "VDDPLL",
449	.always_on = 1,
450	},
451	};
452
453	static struct regulator_init_data vddlcd __initdata = {
454	.constraints = {
455	.name = "VDDLCD",
456	.always_on = 1,
457	},
458	};
459
460	static struct regulator_init_data vddalive __initdata = {
461	.constraints = {
462	.name = "VDDALIVE",
463	.always_on = 1,
464	},
465	};
466
467	static struct wm831x_status_pdata banff_red_led __initdata = {
468	.name = "banff:red:",
469	.default_src = WM831X_STATUS_MANUAL,
470	};
471
472	static struct wm831x_status_pdata banff_green_led __initdata = {
473	.name = "banff:green:",
474	.default_src = WM831X_STATUS_MANUAL,
475	};
476
477	static struct wm831x_touch_pdata touch_pdata __initdata = {
478	.data_irq = S3C_EINT(26),
ae24c263	479	.pd_irq = S3C_EINT(27),
e1a3c74f MB	480	};
e1a3c74f MB	481
e1a3c74f	482	static struct wm831x_pdata crag_pmic_pdata __initdata = {
ae24c263	483	.wm831x_num = 1,
e1a3c74f MB	484	.irq_base = BANFF_PMIC_IRQ_BASE,
	485	.gpio_base = GPIO_BOARD_START + 8,
	486
ae24c263 MB	487	.gpio_defaults = {
	488	/* GPIO11: Touchscreen data - CMOS, DBVDD, active high*/
	489	[10] = WM831X_GPN_POL \| WM831X_GPN_ENA \| 0x6,
	490	/* GPIO12: Touchscreen pen down - CMOS, DBVDD, active high*/
	491	[11] = WM831X_GPN_POL \| WM831X_GPN_ENA \| 0x7,
	492	},
	493
e1a3c74f MB	494	.dcdc = {
	495	&vddarm, /* DCDC1 */
	496	&vddint, /* DCDC2 */
	497	&vddmem, /* DCDC3 */
	498	},
	499
	500	.ldo = {
	501	&vddsys, /* LDO1 */
	502	&vddmmc, /* LDO2 */
	503	NULL, /* LDO3 */
	504	&vddotgi, /* LDO4 */
	505	&vddotg, /* LDO5 */
	506	&vddhi, /* LDO6 */
	507	&vddadc, /* LDO7 */
	508	&vddmem0, /* LDO8 */
	509	&vddpll, /* LDO9 */
	510	&vddlcd, /* LDO10 */
	511	&vddalive, /* LDO11 */
	512	},
	513
	514	.status = {
	515	&banff_green_led,
	516	&banff_red_led,
	517	},
	518
	519	.touch = &touch_pdata,
	520	};
	521
	522	static struct i2c_board_info i2c_devs0[] __initdata = {
	523	{ I2C_BOARD_INFO("24c08", 0x50), },
	524	{ I2C_BOARD_INFO("tca6408", 0x20),
	525	.platform_data = &crag6410_pca_data,
	526	},
	527	{ I2C_BOARD_INFO("wm8312", 0x34),
	528	.platform_data = &crag_pmic_pdata,
	529	.irq = S3C_EINT(23),
	530	},
	531	};
	532
	533	static struct s3c2410_platform_i2c i2c0_pdata = {
	534	.frequency = 400000,
	535	};
	536
ae24c263 MB	537	static struct regulator_init_data pvdd_1v2 __initdata = {
	538	.constraints = {
	539	.name = "PVDD_1V2",
	540	.always_on = 1,
	541	},
	542	};
	543
	544	static struct regulator_consumer_supply pvdd_1v8_consumers[] __initdata = {
	545	REGULATOR_SUPPLY("PLLVDD", "1-001a"),
	546	REGULATOR_SUPPLY("DBVDD", "1-001a"),
	547	REGULATOR_SUPPLY("CPVDD", "1-001a"),
	548	REGULATOR_SUPPLY("AVDD2", "1-001a"),
	549	REGULATOR_SUPPLY("DCVDD", "1-001a"),
	550	REGULATOR_SUPPLY("AVDD", "1-001a"),
	551	};
	552
	553	static struct regulator_init_data pvdd_1v8 __initdata = {
	554	.constraints = {
	555	.name = "PVDD_1V8",
	556	.always_on = 1,
	557	},
	558
	559	.consumer_supplies = pvdd_1v8_consumers,
	560	.num_consumer_supplies = ARRAY_SIZE(pvdd_1v8_consumers),
	561	};
	562
	563	static struct regulator_consumer_supply pvdd_3v3_consumers[] __initdata = {
	564	REGULATOR_SUPPLY("MICVDD", "1-001a"),
	565	REGULATOR_SUPPLY("AVDD1", "1-001a"),
	566	};
	567
	568	static struct regulator_init_data pvdd_3v3 __initdata = {
	569	.constraints = {
	570	.name = "PVDD_3V3",
	571	.always_on = 1,
	572	},
	573
	574	.consumer_supplies = pvdd_3v3_consumers,
	575	.num_consumer_supplies = ARRAY_SIZE(pvdd_3v3_consumers),
	576	};
	577
	578	static struct wm831x_pdata glenfarclas_pmic_pdata __initdata = {
	579	.wm831x_num = 2,
	580	.irq_base = GLENFARCLAS_PMIC_IRQ_BASE,
	581	.gpio_base = GLENFARCLAS_PMIC_GPIO_BASE,
	582
	583	.gpio_defaults = {
	584	/* GPIO1-3: IRQ inputs, rising edge triggered, CMOS */
	585	[0] = WM831X_GPN_DIR \| WM831X_GPN_POL \| WM831X_GPN_ENA,
	586	[1] = WM831X_GPN_DIR \| WM831X_GPN_POL \| WM831X_GPN_ENA,
	587	[2] = WM831X_GPN_DIR \| WM831X_GPN_POL \| WM831X_GPN_ENA,
	588	},
	589
	590	.dcdc = {
	591	&pvdd_1v2, /* DCDC1 */
	592	&pvdd_1v8, /* DCDC2 */
	593	&pvdd_3v3, /* DCDC3 */
	594	},
	595
	596	.disable_touch = true,
	597	};
	598
	599	static struct wm8915_retune_mobile_config wm8915_retune[] = {
	600	{
601	.name = "Sub LPF",
602	.rate = 48000,
603	.regs = {
604	0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
605	0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
606	0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
607	},
608	},
609	{
610	.name = "Sub HPF",
611	.rate = 48000,
612	.regs = {
613	0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
614	0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
615	0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
616	},
617	},
618	};
619
620	static struct wm8915_pdata wm8915_pdata __initdata = {
621	.ldo_ena = S3C64XX_GPN(7),
622	.gpio_base = CODEC_GPIO_BASE,
623	.micdet_def = 1,
624	.inl_mode = WM8915_DIFFERRENTIAL_1,
625	.inr_mode = WM8915_DIFFERRENTIAL_1,
626
627	.irq_flags = IRQF_TRIGGER_FALLING,
628
629	.gpio_default = {
630	0x8001, /* GPIO1 == ADCLRCLK1 */
631	0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
632	0x0141, /* GPIO3 == HP_SEL */
633	0x0002, /* GPIO4 == IRQ */
634	0x020e, /* GPIO5 == CLKOUT */
635	},
636
637	.retune_mobile_cfgs = wm8915_retune,
638	.num_retune_mobile_cfgs = ARRAY_SIZE(wm8915_retune),
639	};
640
641	static struct wm8962_pdata wm8962_pdata __initdata = {
642	.gpio_init = {
643	0,
644	WM8962_GPIO_FN_OPCLK,
645	WM8962_GPIO_FN_DMICCLK,
646	0,
647	0x8000 \| WM8962_GPIO_FN_DMICDAT,
648	WM8962_GPIO_FN_IRQ, /* Open drain mode */
649	},
650	.irq_active_low = true,
651	};
652
653	static struct wm9081_pdata wm9081_pdata __initdata = {
654	.irq_high = false,
655	.irq_cmos = false,
656	};
657
e1a3c74f MB	658	static struct i2c_board_info i2c_devs1[] __initdata = {
e1a3c74f MB	659	{ I2C_BOARD_INFO("wm8311", 0x34),
ae24c263 MB	660	.irq = S3C_EINT(0),
	661	.platform_data = &glenfarclas_pmic_pdata },
	662
	663	{ I2C_BOARD_INFO("wm1250-ev1", 0x27) },
	664	{ I2C_BOARD_INFO("wm8915", 0x1a),
	665	.platform_data = &wm8915_pdata,
	666	.irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	667	},
	668	{ I2C_BOARD_INFO("wm9081", 0x6c),
	669	.platform_data = &wm9081_pdata, },
	670	{ I2C_BOARD_INFO("wm8962", 0x1a),
	671	.platform_data = &wm8962_pdata,
	672	.irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
e1a3c74f MB	673	},
	674	};
	675
	676	static void __init crag6410_map_io(void)
	677	{
	678	s3c64xx_init_io(NULL, 0);
	679	s3c24xx_init_clocks(12000000);
	680	s3c24xx_init_uarts(crag6410_uartcfgs, ARRAY_SIZE(crag6410_uartcfgs));
	681
	682	/* LCD type and Bypass set by bootloader */
	683	}
	684
	685	static struct s3c_sdhci_platdata crag6410_hsmmc2_pdata = {
	686	.max_width = 4,
	687	.cd_type = S3C_SDHCI_CD_PERMANENT,
	688	};
	689
	690	static struct s3c_sdhci_platdata crag6410_hsmmc1_pdata = {
	691	.max_width = 4,
	692	.cd_type = S3C_SDHCI_CD_GPIO,
	693	.ext_cd_gpio = S3C64XX_GPF(11),
	694	};
	695
	696	static void crag6410_cfg_sdhci0(struct platform_device *dev, int width)
	697	{
	698	/* Set all the necessary GPG pins to special-function 2 */
	699	s3c_gpio_cfgrange_nopull(S3C64XX_GPG(0), 2 + width, S3C_GPIO_SFN(2));
	700
	701	/* force card-detected for prototype 0 */
	702	s3c_gpio_setpull(S3C64XX_GPG(6), S3C_GPIO_PULL_DOWN);
	703	}
	704
	705	static struct s3c_sdhci_platdata crag6410_hsmmc0_pdata = {
	706	.max_width = 4,
	707	.cd_type = S3C_SDHCI_CD_INTERNAL,
	708	.cfg_gpio = crag6410_cfg_sdhci0,
	709	};
	710
	711	static void __init crag6410_machine_init(void)
	712	{
	713	/* Open drain IRQs need pullups */
	714	s3c_gpio_setpull(S3C64XX_GPM(0), S3C_GPIO_PULL_UP);
	715	s3c_gpio_setpull(S3C64XX_GPN(0), S3C_GPIO_PULL_UP);
	716
	717	gpio_request(S3C64XX_GPB(0), "LCD power");
	718	gpio_direction_output(S3C64XX_GPB(0), 0);
	719
	720	gpio_request(S3C64XX_GPF(14), "LCD PWM");
	721	gpio_direction_output(S3C64XX_GPF(14), 0); /* turn off */
	722
	723	gpio_request(S3C64XX_GPB(1), "SD power");
	724	gpio_direction_output(S3C64XX_GPB(1), 0);
	725
	726	gpio_request(S3C64XX_GPF(10), "nRESETSEL");
	727	gpio_direction_output(S3C64XX_GPF(10), 1);
	728
	729	s3c_sdhci0_set_platdata(&crag6410_hsmmc0_pdata);
	730	s3c_sdhci1_set_platdata(&crag6410_hsmmc1_pdata);
	731	s3c_sdhci2_set_platdata(&crag6410_hsmmc2_pdata);
	732
	733	s3c_i2c0_set_platdata(&i2c0_pdata);
	734	s3c_i2c1_set_platdata(NULL);
	735	s3c_fb_set_platdata(&crag6410_lcd_pdata);
	736
737	i2c_register_board_info(0, i2c_devs0, ARRAY_SIZE(i2c_devs0));
738	i2c_register_board_info(1, i2c_devs1, ARRAY_SIZE(i2c_devs1));
739
740	samsung_keypad_set_platdata(&crag6410_keypad_data);
741
742	platform_add_devices(crag6410_devices, ARRAY_SIZE(crag6410_devices));
743
ae24c263 MB	744	regulator_has_full_constraints();
ae24c263 MB	745
e1a3c74f MB	746	s3c_pm_init();
	747	}
	748
	749	MACHINE_START(WLF_CRAGG_6410, "Wolfson Cragganmore 6410")
	750	/* Maintainer: Mark Brown <broonie@opensource.wolfsonmicro.com> */
	751	.boot_params = S3C64XX_PA_SDRAM + 0x100,
	752	.init_irq = s3c6410_init_irq,
	753	.map_io = crag6410_map_io,
	754	.init_machine = crag6410_machine_init,
	755	.timer = &s3c24xx_timer,
	756	MACHINE_END