[linux-2.6-block.git] / arch / arm / mach-s3c64xx / mach-crag6410-module.c

/* Speyside modules for Cragganmore - board data probing
 *
 * Copyright 2011 Wolfson Microelectronics plc
 *	Mark Brown <broonie@opensource.wolfsonmicro.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License version 2 as
 * published by the Free Software Foundation.
 */

#include <linux/export.h>
#include <linux/interrupt.h>
#include <linux/i2c.h>
#include <linux/spi/spi.h>

#include <linux/mfd/wm831x/irq.h>
#include <linux/mfd/wm831x/gpio.h>
#include <linux/mfd/wm8994/pdata.h>
#include <linux/mfd/arizona/pdata.h>

#include <linux/regulator/machine.h>

#include <sound/wm0010.h>
#include <sound/wm2200.h>
#include <sound/wm5100.h>
#include <sound/wm8996.h>
#include <sound/wm8962.h>
#include <sound/wm9081.h>

#include <linux/platform_data/spi-s3c64xx.h>

#include "crag6410.h"

static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = {
	.line = S3C64XX_GPC(3),
};

static struct wm0010_pdata wm0010_pdata = {
	.gpio_reset = S3C64XX_GPN(6),
	.reset_active_high = 1, /* Active high for Glenfarclas Rev 2 */
};

static struct spi_board_info wm1253_devs[] = {
	[0] = {
		.modalias	= "wm0010",
		.max_speed_hz	= 26 * 1000 * 1000,
		.bus_num	= 0,
		.chip_select	= 0,
		.mode		= SPI_MODE_0,
		.irq		= S3C_EINT(4),
		.controller_data = &wm0010_spi_csinfo,
		.platform_data = &wm0010_pdata,
	},
};

static struct spi_board_info balblair_devs[] = {
	[0] = {
		.modalias	= "wm0010",
		.max_speed_hz	= 26 * 1000 * 1000,
		.bus_num	= 0,
		.chip_select	= 0,
		.mode		= SPI_MODE_0,
		.irq		= S3C_EINT(4),
		.controller_data = &wm0010_spi_csinfo,
		.platform_data = &wm0010_pdata,
	},
};

static struct wm5100_pdata wm5100_pdata = {
	.ldo_ena = S3C64XX_GPN(7),
	.irq_flags = IRQF_TRIGGER_HIGH,
	.gpio_base = CODEC_GPIO_BASE,

	.in_mode = {
		WM5100_IN_DIFF,
		WM5100_IN_DIFF,
		WM5100_IN_DIFF,
		WM5100_IN_SE,
	},

	.hp_pol = CODEC_GPIO_BASE + 3,
	.jack_modes = {
		{ WM5100_MICDET_MICBIAS3, 0, 0 },
		{ WM5100_MICDET_MICBIAS2, 1, 1 },
	},

	.gpio_defaults = {
		0,
		0,
		0,
		0,
		0x2, /* IRQ: CMOS output */
		0x3, /* CLKOUT: CMOS output */
	},
};

static struct wm8996_retune_mobile_config wm8996_retune[] = {
	{
		.name = "Sub LPF",
		.rate = 48000,
		.regs = {
			0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
			0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
			0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
		},
	},
	{
		.name = "Sub HPF",
		.rate = 48000,
		.regs = {
			0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
			0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
			0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
		},
	},
};

static struct wm8996_pdata wm8996_pdata __initdata = {
	.ldo_ena = S3C64XX_GPN(7),
	.gpio_base = CODEC_GPIO_BASE,
	.micdet_def = 1,
	.inl_mode = WM8996_DIFFERRENTIAL_1,
	.inr_mode = WM8996_DIFFERRENTIAL_1,

	.irq_flags = IRQF_TRIGGER_RISING,

	.gpio_default = {
		0x8001, /* GPIO1 == ADCLRCLK1 */
		0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
		0x0141, /* GPIO3 == HP_SEL */
		0x0002, /* GPIO4 == IRQ */
		0x020e, /* GPIO5 == CLKOUT */
	},

	.retune_mobile_cfgs = wm8996_retune,
	.num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune),
};

static struct wm8962_pdata wm8962_pdata __initdata = {
	.gpio_init = {
		0,
		WM8962_GPIO_FN_OPCLK,
		WM8962_GPIO_FN_DMICCLK,
		0,
		0x8000 | WM8962_GPIO_FN_DMICDAT,
		WM8962_GPIO_FN_IRQ,    /* Open drain mode */
	},
	.in4_dc_measure = true,
};

static struct wm9081_pdata wm9081_pdata __initdata = {
	.irq_high = false,
	.irq_cmos = false,
};

static const struct i2c_board_info wm1254_devs[] = {
	{ I2C_BOARD_INFO("wm8996", 0x1a),
	  .platform_data = &wm8996_pdata,
	  .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	},
	{ I2C_BOARD_INFO("wm9081", 0x6c),
	  .platform_data = &wm9081_pdata, },
};

static const struct i2c_board_info wm1255_devs[] = {
	{ I2C_BOARD_INFO("wm5100", 0x1a),
	  .platform_data = &wm5100_pdata,
	  .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	},
	{ I2C_BOARD_INFO("wm9081", 0x6c),
	  .platform_data = &wm9081_pdata, },
};

static const struct i2c_board_info wm1259_devs[] = {
	{ I2C_BOARD_INFO("wm8962", 0x1a),
	  .platform_data = &wm8962_pdata,
	  .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	},
};

static struct regulator_init_data wm8994_ldo1 = {
	.supply_regulator = "WALLVDD",
};

static struct regulator_init_data wm8994_ldo2 = {
	.supply_regulator = "WALLVDD",
};

static struct wm8994_pdata wm8994_pdata = {
	.gpio_base = CODEC_GPIO_BASE,
	.micb2_delay = 150,
	.gpio_defaults = {
		0x3,          /* IRQ out, active high, CMOS */
	},
	.ldo = {
		 { .enable = S3C64XX_GPN(6), .init_data = &wm8994_ldo1, },
		 { .enable = S3C64XX_GPN(4), .init_data = &wm8994_ldo2, },
	},
};

static const struct i2c_board_info wm1277_devs[] = {
	{ I2C_BOARD_INFO("wm8958", 0x1a),  /* WM8958 is the superset */
	  .platform_data = &wm8994_pdata,
	  .irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	},
};

static struct arizona_pdata wm5102_reva_pdata = {
	.ldoena = S3C64XX_GPN(7),
	.gpio_base = CODEC_GPIO_BASE,
	.irq_flags = IRQF_TRIGGER_HIGH,
	.micd_pol_gpio = CODEC_GPIO_BASE + 4,
	.micd_rate = 6,
	.gpio_defaults = {
		[2] = 0x10000, /* AIF3TXLRCLK */
		[3] = 0x4,     /* OPCLK */
	},
};

static struct s3c64xx_spi_csinfo codec_spi_csinfo = {
	.line = S3C64XX_GPN(5),
};

static struct spi_board_info wm5102_reva_spi_devs[] = {
	[0] = {
		.modalias	= "wm5102",
		.max_speed_hz	= 10 * 1000 * 1000,
		.bus_num	= 0,
		.chip_select	= 1,
		.mode		= SPI_MODE_0,
		.irq		= GLENFARCLAS_PMIC_IRQ_BASE +
				  WM831X_IRQ_GPIO_2,
		.controller_data = &codec_spi_csinfo,
		.platform_data = &wm5102_reva_pdata,
	},
};

static struct arizona_pdata wm5102_pdata = {
	.ldoena = S3C64XX_GPN(7),
	.gpio_base = CODEC_GPIO_BASE,
	.irq_flags = IRQF_TRIGGER_HIGH,
	.micd_pol_gpio = CODEC_GPIO_BASE + 2,
	.gpio_defaults = {
		[2] = 0x10000, /* AIF3TXLRCLK */
		[3] = 0x4,     /* OPCLK */
	},
};

static struct spi_board_info wm5102_spi_devs[] = {
	[0] = {
		.modalias	= "wm5102",
		.max_speed_hz	= 10 * 1000 * 1000,
		.bus_num	= 0,
		.chip_select	= 1,
		.mode		= SPI_MODE_0,
		.irq		= GLENFARCLAS_PMIC_IRQ_BASE +
				  WM831X_IRQ_GPIO_2,
		.controller_data = &codec_spi_csinfo,
		.platform_data = &wm5102_pdata,
	},
};

static struct spi_board_info wm5110_spi_devs[] = {
	[0] = {
		.modalias	= "wm5110",
		.max_speed_hz	= 10 * 1000 * 1000,
		.bus_num	= 0,
		.chip_select	= 1,
		.mode		= SPI_MODE_0,
		.irq		= GLENFARCLAS_PMIC_IRQ_BASE +
				  WM831X_IRQ_GPIO_2,
		.controller_data = &codec_spi_csinfo,
		.platform_data = &wm5102_reva_pdata,
	},
};

static const struct i2c_board_info wm6230_i2c_devs[] = {
	{ I2C_BOARD_INFO("wm9081", 0x6c),
	  .platform_data = &wm9081_pdata, },
};

static struct wm2200_pdata wm2200_pdata = {
	.ldo_ena = S3C64XX_GPN(7),
	.gpio_defaults = {
		[2] = 0x0005,  /* GPIO3 24.576MHz output clock */
	},
};

static const struct i2c_board_info wm2200_i2c[] = {
	{ I2C_BOARD_INFO("wm2200", 0x3a),
	  .platform_data = &wm2200_pdata, },
};

static const struct {
	u8 id;
	u8 rev;
	const char *name;
	const struct i2c_board_info *i2c_devs;
	int num_i2c_devs;
	const struct spi_board_info *spi_devs;
	int num_spi_devs;
} gf_mods[] = {
	{ .id = 0x01, .rev = 0xff, .name = "1250-EV1 Springbank" },
	{ .id = 0x02, .rev = 0xff, .name = "1251-EV1 Jura" },
	{ .id = 0x03, .rev = 0xff, .name = "1252-EV1 Glenlivet" },
	{ .id = 0x06, .rev = 0xff, .name = "WM8997-6721-CS96-EV1 Lapraoig" },
	{ .id = 0x07, .rev = 0xff, .name = "WM5110-6271 Deanston",
	  .spi_devs = wm5110_spi_devs,
	  .num_spi_devs = ARRAY_SIZE(wm5110_spi_devs) },
	{ .id = 0x08, .rev = 0xff, .name = "WM8903-6102 Tamdhu" },
	{ .id = 0x09, .rev = 0xff, .name = "WM1811A-6305 Adelphi" },
	{ .id = 0x0a, .rev = 0xff, .name = "WM8996-6272 Blackadder" },
	{ .id = 0x0b, .rev = 0xff, .name = "WM8994-6235 Benromach" },
	{ .id = 0x11, .rev = 0xff, .name = "6249-EV2 Glenfarclas", },
	{ .id = 0x14, .rev = 0xff, .name = "6271-EV1 Lochnagar" },
	{ .id = 0x15, .rev = 0xff, .name = "6320-EV1 Bells",
	  .i2c_devs = wm6230_i2c_devs,
	  .num_i2c_devs = ARRAY_SIZE(wm6230_i2c_devs) },
	{ .id = 0x21, .rev = 0xff, .name = "1275-EV1 Mortlach" },
	{ .id = 0x25, .rev = 0xff, .name = "1274-EV1 Glencadam" },
	{ .id = 0x31, .rev = 0xff, .name = "1253-EV1 Tomatin",
	  .spi_devs = wm1253_devs, .num_spi_devs = ARRAY_SIZE(wm1253_devs) },
	{ .id = 0x32, .rev = 0xff, .name = "XXXX-EV1 Caol Illa" },
	{ .id = 0x33, .rev = 0xff, .name = "XXXX-EV1 Oban" },
	{ .id = 0x34, .rev = 0xff, .name = "WM0010-6320-CS42 Balblair",
	  .spi_devs = balblair_devs,
	  .num_spi_devs = ARRAY_SIZE(balblair_devs) },
	{ .id = 0x39, .rev = 0xff, .name = "1254-EV1 Dallas Dhu",
	  .i2c_devs = wm1254_devs, .num_i2c_devs = ARRAY_SIZE(wm1254_devs) },
	{ .id = 0x3a, .rev = 0xff, .name = "1259-EV1 Tobermory",
	  .i2c_devs = wm1259_devs, .num_i2c_devs = ARRAY_SIZE(wm1259_devs) },
	{ .id = 0x3b, .rev = 0xff, .name = "1255-EV1 Kilchoman",
	  .i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) },
	{ .id = 0x3c, .rev = 0xff, .name = "1273-EV1 Longmorn" },
	{ .id = 0x3d, .rev = 0xff, .name = "1277-EV1 Littlemill",
	  .i2c_devs = wm1277_devs, .num_i2c_devs = ARRAY_SIZE(wm1277_devs) },
	{ .id = 0x3e, .rev = 0, .name = "WM5102-6271-EV1-CS127 Amrut",
	  .spi_devs = wm5102_reva_spi_devs,
	  .num_spi_devs = ARRAY_SIZE(wm5102_reva_spi_devs) },
	{ .id = 0x3e, .rev = -1, .name = "WM5102-6271-EV1-CS127 Amrut",
	  .spi_devs = wm5102_spi_devs,
	  .num_spi_devs = ARRAY_SIZE(wm5102_spi_devs) },
	{ .id = 0x3f, .rev = -1, .name = "WM2200-6271-CS90-M-REV1",
	  .i2c_devs = wm2200_i2c, .num_i2c_devs = ARRAY_SIZE(wm2200_i2c) },
};

static int wlf_gf_module_probe(struct i2c_client *i2c,
			       const struct i2c_device_id *i2c_id)
{
	int ret, i, j, id, rev;

	ret = i2c_smbus_read_byte_data(i2c, 0);
	if (ret < 0) {
		dev_err(&i2c->dev, "Failed to read ID: %d\n", ret);
		return ret;
	}

	id = (ret & 0xfe) >> 2;
	rev = ret & 0x3;
	for (i = 0; i < ARRAY_SIZE(gf_mods); i++)
		if (id == gf_mods[i].id && (gf_mods[i].rev == 0xff ||
					    rev == gf_mods[i].rev))
			break;

	if (i < ARRAY_SIZE(gf_mods)) {
		dev_info(&i2c->dev, "%s revision %d\n",
			 gf_mods[i].name, rev + 1);

		for (j = 0; j < gf_mods[i].num_i2c_devs; j++) {
			if (!i2c_new_device(i2c->adapter,
					    &(gf_mods[i].i2c_devs[j])))
				dev_err(&i2c->dev,
					"Failed to register dev: %d\n", ret);
		}

		spi_register_board_info(gf_mods[i].spi_devs,
					gf_mods[i].num_spi_devs);
	} else {
		dev_warn(&i2c->dev, "Unknown module ID 0x%x revision %d\n",
			 id, rev + 1);
	}

	return 0;
}

static const struct i2c_device_id wlf_gf_module_id[] = {
	{ "wlf-gf-module", 0 },
	{ }
};

static struct i2c_driver wlf_gf_module_driver = {
	.driver = {
		.name = "wlf-gf-module",
		.owner = THIS_MODULE,
	},
	.probe = wlf_gf_module_probe,
	.id_table = wlf_gf_module_id,
};

static int __init wlf_gf_module_register(void)
{
	return i2c_add_driver(&wlf_gf_module_driver);
}
device_initcall(wlf_gf_module_register);
Commit	Line	Data
d0f0b43f MB	1	/* Speyside modules for Cragganmore - board data probing
	2	*
	3	* Copyright 2011 Wolfson Microelectronics plc
	4	* Mark Brown <broonie@opensource.wolfsonmicro.com>
	5	*
	6	* This program is free software; you can redistribute it and/or modify
	7	* it under the terms of the GNU General Public License version 2 as
	8	* published by the Free Software Foundation.
	9	*/
	10
a69e4c28	11	#include <linux/export.h>
d0f0b43f MB	12	#include <linux/interrupt.h>
d0f0b43f MB	13	#include <linux/i2c.h>
cda2349a	14	#include <linux/spi/spi.h>
d0f0b43f MB	15
	16	#include <linux/mfd/wm831x/irq.h>
	17	#include <linux/mfd/wm831x/gpio.h>
c5c32c96	18	#include <linux/mfd/wm8994/pdata.h>
853b1eb8	19	#include <linux/mfd/arizona/pdata.h>
d0f0b43f	20
719a4240 MB	21	#include <linux/regulator/machine.h>
719a4240 MB	22
c8968ad8	23	#include <sound/wm0010.h>
e6a194b7	24	#include <sound/wm2200.h>
3d19f1cd	25	#include <sound/wm5100.h>
d0f0b43f MB	26	#include <sound/wm8996.h>
	27	#include <sound/wm8962.h>
	28	#include <sound/wm9081.h>
	29
436d42c6	30	#include <linux/platform_data/spi-s3c64xx.h>
cda2349a	31
e6235928	32	#include "crag6410.h"
d0f0b43f	33
cda2349a	34	static struct s3c64xx_spi_csinfo wm0010_spi_csinfo = {
cda2349a MB	35	.line = S3C64XX_GPC(3),
	36	};
	37
c8968ad8 MB	38	static struct wm0010_pdata wm0010_pdata = {
	39	.gpio_reset = S3C64XX_GPN(6),
	40	.reset_active_high = 1, /* Active high for Glenfarclas Rev 2 */
	41	};
	42
cda2349a MB	43	static struct spi_board_info wm1253_devs[] = {
	44	[0] = {
	45	.modalias = "wm0010",
c8968ad8 MB	46	.max_speed_hz = 26 * 1000 * 1000,
	47	.bus_num = 0,
	48	.chip_select = 0,
	49	.mode = SPI_MODE_0,
b86dc0d8	50	.irq = S3C_EINT(4),
c8968ad8 MB	51	.controller_data = &wm0010_spi_csinfo,
	52	.platform_data = &wm0010_pdata,
	53	},
	54	};
	55
	56	static struct spi_board_info balblair_devs[] = {
	57	[0] = {
	58	.modalias = "wm0010",
	59	.max_speed_hz = 26 * 1000 * 1000,
cda2349a MB	60	.bus_num = 0,
	61	.chip_select = 0,
	62	.mode = SPI_MODE_0,
f032b49e	63	.irq = S3C_EINT(4),
cda2349a	64	.controller_data = &wm0010_spi_csinfo,
c8968ad8	65	.platform_data = &wm0010_pdata,
cda2349a MB	66	},
	67	};
	68
3d19f1cd MB	69	static struct wm5100_pdata wm5100_pdata = {
	70	.ldo_ena = S3C64XX_GPN(7),
	71	.irq_flags = IRQF_TRIGGER_HIGH,
	72	.gpio_base = CODEC_GPIO_BASE,
	73
	74	.in_mode = {
	75	WM5100_IN_DIFF,
	76	WM5100_IN_DIFF,
	77	WM5100_IN_DIFF,
	78	WM5100_IN_SE,
	79	},
	80
	81	.hp_pol = CODEC_GPIO_BASE + 3,
	82	.jack_modes = {
	83	{ WM5100_MICDET_MICBIAS3, 0, 0 },
	84	{ WM5100_MICDET_MICBIAS2, 1, 1 },
	85	},
	86
	87	.gpio_defaults = {
	88	0,
	89	0,
	90	0,
	91	0,
	92	0x2, /* IRQ: CMOS output */
	93	0x3, /* CLKOUT: CMOS output */
	94	},
	95	};
	96
d0f0b43f MB	97	static struct wm8996_retune_mobile_config wm8996_retune[] = {
	98	{
	99	.name = "Sub LPF",
	100	.rate = 48000,
	101	.regs = {
	102	0x6318, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
	103	0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
	104	0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
	105	},
	106	},
	107	{
	108	.name = "Sub HPF",
	109	.rate = 48000,
	110	.regs = {
	111	0x000A, 0x6300, 0x1000, 0x0000, 0x0004, 0x2000, 0xF000,
	112	0x0000, 0x0004, 0x2000, 0xF000, 0x0000, 0x0004, 0x2000,
	113	0xF000, 0x0000, 0x0004, 0x1000, 0x0800, 0x4000
	114	},
	115	},
	116	};
	117
	118	static struct wm8996_pdata wm8996_pdata __initdata = {
	119	.ldo_ena = S3C64XX_GPN(7),
	120	.gpio_base = CODEC_GPIO_BASE,
	121	.micdet_def = 1,
	122	.inl_mode = WM8996_DIFFERRENTIAL_1,
	123	.inr_mode = WM8996_DIFFERRENTIAL_1,
	124
	125	.irq_flags = IRQF_TRIGGER_RISING,
	126
	127	.gpio_default = {
	128	0x8001, /* GPIO1 == ADCLRCLK1 */
	129	0x8001, /* GPIO2 == ADCLRCLK2, input due to CPU */
	130	0x0141, /* GPIO3 == HP_SEL */
	131	0x0002, /* GPIO4 == IRQ */
	132	0x020e, /* GPIO5 == CLKOUT */
	133	},
	134
	135	.retune_mobile_cfgs = wm8996_retune,
	136	.num_retune_mobile_cfgs = ARRAY_SIZE(wm8996_retune),
	137	};
	138
	139	static struct wm8962_pdata wm8962_pdata __initdata = {
	140	.gpio_init = {
	141	0,
	142	WM8962_GPIO_FN_OPCLK,
	143	WM8962_GPIO_FN_DMICCLK,
	144	0,
	145	0x8000 \| WM8962_GPIO_FN_DMICDAT,
	146	WM8962_GPIO_FN_IRQ, /* Open drain mode */
	147	},
4b9c85f9	148	.in4_dc_measure = true,
d0f0b43f MB	149	};
	150
	151	static struct wm9081_pdata wm9081_pdata __initdata = {
	152	.irq_high = false,
	153	.irq_cmos = false,
	154	};
	155
	156	static const struct i2c_board_info wm1254_devs[] = {
	157	{ I2C_BOARD_INFO("wm8996", 0x1a),
	158	.platform_data = &wm8996_pdata,
	159	.irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	160	},
	161	{ I2C_BOARD_INFO("wm9081", 0x6c),
	162	.platform_data = &wm9081_pdata, },
	163	};
	164
3aa7779c MB	165	static const struct i2c_board_info wm1255_devs[] = {
3aa7779c MB	166	{ I2C_BOARD_INFO("wm5100", 0x1a),
3d19f1cd	167	.platform_data = &wm5100_pdata,
3aa7779c MB	168	.irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	169	},
	170	{ I2C_BOARD_INFO("wm9081", 0x6c),
	171	.platform_data = &wm9081_pdata, },
	172	};
	173
d0f0b43f MB	174	static const struct i2c_board_info wm1259_devs[] = {
	175	{ I2C_BOARD_INFO("wm8962", 0x1a),
	176	.platform_data = &wm8962_pdata,
	177	.irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	178	},
	179	};
	180
bd155d2c MB	181	static struct regulator_init_data wm8994_ldo1 = {
	182	.supply_regulator = "WALLVDD",
	183	};
	184
	185	static struct regulator_init_data wm8994_ldo2 = {
	186	.supply_regulator = "WALLVDD",
	187	};
	188
c5c32c96 MB	189	static struct wm8994_pdata wm8994_pdata = {
c5c32c96 MB	190	.gpio_base = CODEC_GPIO_BASE,
b23bc66c	191	.micb2_delay = 150,
c5c32c96 MB	192	.gpio_defaults = {
	193	0x3, /* IRQ out, active high, CMOS */
	194	},
c5c32c96	195	.ldo = {
b23bc66c MB	196	{ .enable = S3C64XX_GPN(6), .init_data = &wm8994_ldo1, },
b23bc66c MB	197	{ .enable = S3C64XX_GPN(4), .init_data = &wm8994_ldo2, },
c5c32c96 MB	198	},
	199	};
	200
	201	static const struct i2c_board_info wm1277_devs[] = {
	202	{ I2C_BOARD_INFO("wm8958", 0x1a), /* WM8958 is the superset */
	203	.platform_data = &wm8994_pdata,
	204	.irq = GLENFARCLAS_PMIC_IRQ_BASE + WM831X_IRQ_GPIO_2,
	205	},
	206	};
d0f0b43f	207
b23bc66c	208	static struct arizona_pdata wm5102_reva_pdata = {
853b1eb8 MB	209	.ldoena = S3C64XX_GPN(7),
853b1eb8 MB	210	.gpio_base = CODEC_GPIO_BASE,
f8a0941f	211	.irq_flags = IRQF_TRIGGER_HIGH,
853b1eb8	212	.micd_pol_gpio = CODEC_GPIO_BASE + 4,
1fa86dcf	213	.micd_rate = 6,
853b1eb8 MB	214	.gpio_defaults = {
	215	[2] = 0x10000, /* AIF3TXLRCLK */
	216	[3] = 0x4, /* OPCLK */
	217	},
	218	};
	219
41830ee0	220	static struct s3c64xx_spi_csinfo codec_spi_csinfo = {
853b1eb8 MB	221	.line = S3C64XX_GPN(5),
	222	};
	223
b23bc66c MB	224	static struct spi_board_info wm5102_reva_spi_devs[] = {
	225	[0] = {
	226	.modalias = "wm5102",
	227	.max_speed_hz = 10 * 1000 * 1000,
	228	.bus_num = 0,
	229	.chip_select = 1,
	230	.mode = SPI_MODE_0,
	231	.irq = GLENFARCLAS_PMIC_IRQ_BASE +
	232	WM831X_IRQ_GPIO_2,
41830ee0	233	.controller_data = &codec_spi_csinfo,
b23bc66c MB	234	.platform_data = &wm5102_reva_pdata,
	235	},
	236	};
	237
	238	static struct arizona_pdata wm5102_pdata = {
	239	.ldoena = S3C64XX_GPN(7),
	240	.gpio_base = CODEC_GPIO_BASE,
f8a0941f	241	.irq_flags = IRQF_TRIGGER_HIGH,
b23bc66c MB	242	.micd_pol_gpio = CODEC_GPIO_BASE + 2,
	243	.gpio_defaults = {
	244	[2] = 0x10000, /* AIF3TXLRCLK */
	245	[3] = 0x4, /* OPCLK */
	246	},
	247	};
	248
853b1eb8 MB	249	static struct spi_board_info wm5102_spi_devs[] = {
	250	[0] = {
	251	.modalias = "wm5102",
	252	.max_speed_hz = 10 * 1000 * 1000,
	253	.bus_num = 0,
479535ed	254	.chip_select = 1,
853b1eb8 MB	255	.mode = SPI_MODE_0,
	256	.irq = GLENFARCLAS_PMIC_IRQ_BASE +
	257	WM831X_IRQ_GPIO_2,
41830ee0	258	.controller_data = &codec_spi_csinfo,
853b1eb8 MB	259	.platform_data = &wm5102_pdata,
853b1eb8 MB	260	},
9b6e1b0e MB	261	};
9b6e1b0e MB	262
41830ee0 MB	263	static struct spi_board_info wm5110_spi_devs[] = {
	264	[0] = {
	265	.modalias = "wm5110",
	266	.max_speed_hz = 10 * 1000 * 1000,
	267	.bus_num = 0,
	268	.chip_select = 1,
	269	.mode = SPI_MODE_0,
	270	.irq = GLENFARCLAS_PMIC_IRQ_BASE +
	271	WM831X_IRQ_GPIO_2,
	272	.controller_data = &codec_spi_csinfo,
	273	.platform_data = &wm5102_reva_pdata,
	274	},
	275	};
	276
98dcf905 MB	277	static const struct i2c_board_info wm6230_i2c_devs[] = {
	278	{ I2C_BOARD_INFO("wm9081", 0x6c),
	279	.platform_data = &wm9081_pdata, },
	280	};
	281
e6a194b7 MB	282	static struct wm2200_pdata wm2200_pdata = {
	283	.ldo_ena = S3C64XX_GPN(7),
	284	.gpio_defaults = {
	285	[2] = 0x0005, /* GPIO3 24.576MHz output clock */
	286	},
	287	};
	288
	289	static const struct i2c_board_info wm2200_i2c[] = {
	290	{ I2C_BOARD_INFO("wm2200", 0x3a),
	291	.platform_data = &wm2200_pdata, },
	292	};
	293
351a102d	294	static const struct {
d0f0b43f	295	u8 id;
64aecb4a	296	u8 rev;
d0f0b43f MB	297	const char *name;
	298	const struct i2c_board_info *i2c_devs;
	299	int num_i2c_devs;
cda2349a MB	300	const struct spi_board_info *spi_devs;
cda2349a MB	301	int num_spi_devs;
d0f0b43f	302	} gf_mods[] = {
64aecb4a MB	303	{ .id = 0x01, .rev = 0xff, .name = "1250-EV1 Springbank" },
	304	{ .id = 0x02, .rev = 0xff, .name = "1251-EV1 Jura" },
	305	{ .id = 0x03, .rev = 0xff, .name = "1252-EV1 Glenlivet" },
	306	{ .id = 0x06, .rev = 0xff, .name = "WM8997-6721-CS96-EV1 Lapraoig" },
41830ee0 MB	307	{ .id = 0x07, .rev = 0xff, .name = "WM5110-6271 Deanston",
	308	.spi_devs = wm5110_spi_devs,
	309	.num_spi_devs = ARRAY_SIZE(wm5110_spi_devs) },
64aecb4a MB	310	{ .id = 0x08, .rev = 0xff, .name = "WM8903-6102 Tamdhu" },
	311	{ .id = 0x09, .rev = 0xff, .name = "WM1811A-6305 Adelphi" },
	312	{ .id = 0x0a, .rev = 0xff, .name = "WM8996-6272 Blackadder" },
	313	{ .id = 0x0b, .rev = 0xff, .name = "WM8994-6235 Benromach" },
	314	{ .id = 0x11, .rev = 0xff, .name = "6249-EV2 Glenfarclas", },
	315	{ .id = 0x14, .rev = 0xff, .name = "6271-EV1 Lochnagar" },
	316	{ .id = 0x15, .rev = 0xff, .name = "6320-EV1 Bells",
98dcf905 MB	317	.i2c_devs = wm6230_i2c_devs,
98dcf905 MB	318	.num_i2c_devs = ARRAY_SIZE(wm6230_i2c_devs) },
64aecb4a MB	319	{ .id = 0x21, .rev = 0xff, .name = "1275-EV1 Mortlach" },
	320	{ .id = 0x25, .rev = 0xff, .name = "1274-EV1 Glencadam" },
	321	{ .id = 0x31, .rev = 0xff, .name = "1253-EV1 Tomatin",
cda2349a	322	.spi_devs = wm1253_devs, .num_spi_devs = ARRAY_SIZE(wm1253_devs) },
64aecb4a MB	323	{ .id = 0x32, .rev = 0xff, .name = "XXXX-EV1 Caol Illa" },
	324	{ .id = 0x33, .rev = 0xff, .name = "XXXX-EV1 Oban" },
	325	{ .id = 0x34, .rev = 0xff, .name = "WM0010-6320-CS42 Balblair",
c8968ad8 MB	326	.spi_devs = balblair_devs,
c8968ad8 MB	327	.num_spi_devs = ARRAY_SIZE(balblair_devs) },
64aecb4a	328	{ .id = 0x39, .rev = 0xff, .name = "1254-EV1 Dallas Dhu",
d0f0b43f	329	.i2c_devs = wm1254_devs, .num_i2c_devs = ARRAY_SIZE(wm1254_devs) },
64aecb4a	330	{ .id = 0x3a, .rev = 0xff, .name = "1259-EV1 Tobermory",
d0f0b43f	331	.i2c_devs = wm1259_devs, .num_i2c_devs = ARRAY_SIZE(wm1259_devs) },
64aecb4a	332	{ .id = 0x3b, .rev = 0xff, .name = "1255-EV1 Kilchoman",
3aa7779c	333	.i2c_devs = wm1255_devs, .num_i2c_devs = ARRAY_SIZE(wm1255_devs) },
64aecb4a MB	334	{ .id = 0x3c, .rev = 0xff, .name = "1273-EV1 Longmorn" },
64aecb4a MB	335	{ .id = 0x3d, .rev = 0xff, .name = "1277-EV1 Littlemill",
c5c32c96	336	.i2c_devs = wm1277_devs, .num_i2c_devs = ARRAY_SIZE(wm1277_devs) },
b23bc66c MB	337	{ .id = 0x3e, .rev = 0, .name = "WM5102-6271-EV1-CS127 Amrut",
	338	.spi_devs = wm5102_reva_spi_devs,
	339	.num_spi_devs = ARRAY_SIZE(wm5102_reva_spi_devs) },
64aecb4a	340	{ .id = 0x3e, .rev = -1, .name = "WM5102-6271-EV1-CS127 Amrut",
853b1eb8 MB	341	.spi_devs = wm5102_spi_devs,
853b1eb8 MB	342	.num_spi_devs = ARRAY_SIZE(wm5102_spi_devs) },
e6a194b7 MB	343	{ .id = 0x3f, .rev = -1, .name = "WM2200-6271-CS90-M-REV1",
e6a194b7 MB	344	.i2c_devs = wm2200_i2c, .num_i2c_devs = ARRAY_SIZE(wm2200_i2c) },
d0f0b43f MB	345	};
d0f0b43f MB	346
351a102d GKH	347	static int wlf_gf_module_probe(struct i2c_client *i2c,
351a102d GKH	348	const struct i2c_device_id *i2c_id)
d0f0b43f MB	349	{
	350	int ret, i, j, id, rev;
	351
	352	ret = i2c_smbus_read_byte_data(i2c, 0);
	353	if (ret < 0) {
	354	dev_err(&i2c->dev, "Failed to read ID: %d\n", ret);
	355	return ret;
	356	}
	357
	358	id = (ret & 0xfe) >> 2;
	359	rev = ret & 0x3;
	360	for (i = 0; i < ARRAY_SIZE(gf_mods); i++)
64aecb4a MB	361	if (id == gf_mods[i].id && (gf_mods[i].rev == 0xff \|\|
64aecb4a MB	362	rev == gf_mods[i].rev))
d0f0b43f MB	363	break;
	364
	365	if (i < ARRAY_SIZE(gf_mods)) {
	366	dev_info(&i2c->dev, "%s revision %d\n",
	367	gf_mods[i].name, rev + 1);
cda2349a	368
d0f0b43f MB	369	for (j = 0; j < gf_mods[i].num_i2c_devs; j++) {
	370	if (!i2c_new_device(i2c->adapter,
	371	&(gf_mods[i].i2c_devs[j])))
	372	dev_err(&i2c->dev,
	373	"Failed to register dev: %d\n", ret);
	374	}
cda2349a MB	375
	376	spi_register_board_info(gf_mods[i].spi_devs,
	377	gf_mods[i].num_spi_devs);
d0f0b43f	378	} else {
fc716894 MB	379	dev_warn(&i2c->dev, "Unknown module ID 0x%x revision %d\n",
fc716894 MB	380	id, rev + 1);
d0f0b43f MB	381	}
	382
	383	return 0;
	384	}
	385
	386	static const struct i2c_device_id wlf_gf_module_id[] = {
	387	{ "wlf-gf-module", 0 },
	388	{ }
	389	};
	390
	391	static struct i2c_driver wlf_gf_module_driver = {
	392	.driver = {
	393	.name = "wlf-gf-module",
	394	.owner = THIS_MODULE,
	395	},
	396	.probe = wlf_gf_module_probe,
	397	.id_table = wlf_gf_module_id,
	398	};
	399
	400	static int __init wlf_gf_module_register(void)
	401	{
	402	return i2c_add_driver(&wlf_gf_module_driver);
	403	}
baf64abc	404	device_initcall(wlf_gf_module_register);