Merge tag 'firewire-updates' of git://git.kernel.org/pub/scm/linux/kernel/git/ieee139...
[linux-2.6-block.git] / arch / arm / mach-s3c24xx / s3c2443.c
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1/* linux/arch/arm/mach-s3c2443/s3c2443.c
2 *
3 * Copyright (c) 2007 Simtec Electronics
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * Samsung S3C2443 Mobile CPU support
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11*/
12
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/interrupt.h>
16#include <linux/list.h>
17#include <linux/timer.h>
18#include <linux/init.h>
0536d0d0 19#include <linux/gpio.h>
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20#include <linux/platform_device.h>
21#include <linux/serial_core.h>
4a858cfc 22#include <linux/device.h>
e4d06e39 23#include <linux/clk.h>
fced80c7 24#include <linux/io.h>
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25
26#include <asm/mach/arch.h>
27#include <asm/mach/map.h>
28#include <asm/mach/irq.h>
29
a09e64fb 30#include <mach/hardware.h>
e4d06e39 31#include <asm/irq.h>
9f97da78 32#include <asm/system_misc.h>
e4d06e39 33
a09e64fb 34#include <mach/regs-s3c2443-clock.h>
e4d06e39 35
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36#include <plat/gpio-core.h>
37#include <plat/gpio-cfg.h>
38#include <plat/gpio-cfg-helpers.h>
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39#include <plat/devs.h>
40#include <plat/cpu.h>
eb42b044 41#include <plat/fb-core.h>
ef3f2dd4 42#include <plat/nand-core.h>
6247cea2 43#include <plat/adc-core.h>
b2994d31 44#include <plat/rtc-core.h>
308b3afb 45#include <plat/spi-core.h>
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46
47static struct map_desc s3c2443_iodesc[] __initdata = {
48 IODESC_ENT(WATCHDOG),
49 IODESC_ENT(CLKPWR),
50 IODESC_ENT(TIMER),
51};
52
4a858cfc 53struct bus_type s3c2443_subsys = {
af5ca3f4 54 .name = "s3c2443-core",
4a858cfc 55 .dev_name = "s3c2443-core",
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56};
57
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58static struct device s3c2443_dev = {
59 .bus = &s3c2443_subsys,
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60};
61
57538975 62void s3c2443_restart(char mode, const char *cmd)
b4f14eb8 63{
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64 if (mode == 's')
65 soft_restart(0);
66
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67 __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST);
68}
69
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70int __init s3c2443_init(void)
71{
72 printk("S3C2443: Initialising architecture\n");
73
ef3f2dd4 74 s3c_nand_setname("s3c2412-nand");
eb42b044 75 s3c_fb_setname("s3c2443-fb");
d9c0ebbd 76
6247cea2 77 s3c_adc_setname("s3c2443-adc");
b2994d31 78 s3c_rtc_setname("s3c2443-rtc");
6247cea2 79
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80 /* change WDT IRQ number */
81 s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT;
82 s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT;
83
4a858cfc 84 return device_register(&s3c2443_dev);
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85}
86
87void __init s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no)
88{
89 s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no);
90}
91
92/* s3c2443_map_io
93 *
94 * register the standard cpu IO areas, and any passed in from the
95 * machine specific initialisation.
96 */
97
74b265d4 98void __init s3c2443_map_io(void)
e4d06e39 99{
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100 s3c24xx_gpiocfg_default.set_pull = s3c2443_gpio_setpull;
101 s3c24xx_gpiocfg_default.get_pull = s3c2443_gpio_getpull;
0536d0d0 102
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103 /* initialize device information early */
104 s3c64xx_spi_setname("s3c2443-spi");
105
e4d06e39 106 iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc));
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107}
108
4a858cfc 109/* need to register the subsystem before we actually register the device, and
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110 * we also need to ensure that it has been initialised before any of the
111 * drivers even try to use it (even if not on an s3c2443 based system)
112 * as a driver which may support both 2443 and 2440 may try and use it.
113*/
114
115static int __init s3c2443_core_init(void)
116{
4a858cfc 117 return subsys_system_register(&s3c2443_subsys, NULL);
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118}
119
120core_initcall(s3c2443_core_init);