Merge tag 'armsoc-fixes-nc' of git://git.kernel.org/pub/scm/linux/kernel/git/arm...
[linux-2.6-block.git] / arch / arm / mach-s3c24xx / mach-rx3715.c
CommitLineData
a21765a7 1/* linux/arch/arm/mach-s3c2440/mach-rx3715.c
1da177e4 2 *
e02f8664 3 * Copyright (c) 2003-2004 Simtec Electronics
1da177e4
LT
4 * Ben Dooks <ben@simtec.co.uk>
5 *
6 * http://www.handhelds.org/projects/rx3715.html
7 *
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
11 *
1da177e4
LT
12*/
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/interrupt.h>
17#include <linux/list.h>
8d717a52 18#include <linux/memblock.h>
1da177e4
LT
19#include <linux/timer.h>
20#include <linux/init.h>
21#include <linux/tty.h>
22#include <linux/console.h>
edbaa603 23#include <linux/device.h>
d052d1be 24#include <linux/platform_device.h>
1da177e4 25#include <linux/serial_core.h>
334a1c70 26#include <linux/serial_s3c.h>
1da177e4 27#include <linux/serial.h>
fced80c7 28#include <linux/io.h>
272eb575
BD
29#include <linux/mtd/mtd.h>
30#include <linux/mtd/nand.h>
31#include <linux/mtd/nand_ecc.h>
32#include <linux/mtd/partitions.h>
33
1da177e4 34#include <asm/mach/arch.h>
1da177e4 35#include <asm/mach/irq.h>
232910d6
KK
36#include <asm/mach/map.h>
37
38#include <linux/platform_data/mtd-nand-s3c2410.h>
1da177e4 39
1da177e4
LT
40#include <asm/irq.h>
41#include <asm/mach-types.h>
42
232910d6
KK
43#include <mach/fb.h>
44#include <mach/hardware.h>
a09e64fb
RK
45#include <mach/regs-gpio.h>
46#include <mach/regs-lcd.h>
b0161caa 47#include <mach/gpio-samsung.h>
e838ffc2 48
a2b7ba9c 49#include <plat/cpu.h>
232910d6 50#include <plat/devs.h>
a2b7ba9c 51#include <plat/pm.h>
7f78b6eb 52#include <plat/samsung-time.h>
1da177e4 53
b27b0727 54#include "common.h"
232910d6 55#include "h1940.h"
b27b0727 56
1da177e4
LT
57static struct map_desc rx3715_iodesc[] __initdata = {
58 /* dump ISA space somewhere unused */
59
ff6ffa82
BD
60 {
61 .virtual = (u32)S3C24XX_VA_ISA_WORD,
62 .pfn = __phys_to_pfn(S3C2410_CS3),
63 .length = SZ_1M,
64 .type = MT_DEVICE,
65 }, {
66 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
67 .pfn = __phys_to_pfn(S3C2410_CS3),
68 .length = SZ_1M,
69 .type = MT_DEVICE,
70 },
1da177e4
LT
71};
72
1da177e4
LT
73static struct s3c2410_uartcfg rx3715_uartcfgs[] = {
74 [0] = {
75 .hwport = 0,
76 .flags = 0,
77 .ucon = 0x3c5,
78 .ulcon = 0x03,
79 .ufcon = 0x51,
afba7f91 80 .clk_sel = S3C2410_UCON_CLKSEL3,
1da177e4
LT
81 },
82 [1] = {
83 .hwport = 1,
84 .flags = 0,
85 .ucon = 0x3c5,
86 .ulcon = 0x03,
87 .ufcon = 0x00,
afba7f91 88 .clk_sel = S3C2410_UCON_CLKSEL3,
1da177e4
LT
89 },
90 /* IR port */
91 [2] = {
92 .hwport = 2,
93 .uart_flags = UPF_CONS_FLOW,
94 .ucon = 0x3c5,
95 .ulcon = 0x43,
96 .ufcon = 0x51,
afba7f91 97 .clk_sel = S3C2410_UCON_CLKSEL3,
1da177e4
LT
98 }
99};
100
e838ffc2
BD
101/* framebuffer lcd controller information */
102
09fe75f6 103static struct s3c2410fb_display rx3715_lcdcfg __initdata = {
f28ef573
KH
104 .lcdcon5 = S3C2410_LCDCON5_INVVLINE |
105 S3C2410_LCDCON5_FRM565 |
106 S3C2410_LCDCON5_HWSWP,
e838ffc2 107
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KH
108 .type = S3C2410_LCDCON1_TFT,
109 .width = 240,
110 .height = 320,
111
69816699 112 .pixclock = 260000,
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KH
113 .xres = 240,
114 .yres = 320,
115 .bpp = 16,
116 .left_margin = 36,
117 .right_margin = 36,
93d11f5a 118 .hsync_len = 8,
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KH
119 .upper_margin = 6,
120 .lower_margin = 7,
93d11f5a 121 .vsync_len = 3,
09fe75f6
KH
122};
123
124static struct s3c2410fb_mach_info rx3715_fb_info __initdata = {
125
126 .displays = &rx3715_lcdcfg,
127 .num_displays = 1,
128 .default_display = 0,
129
e838ffc2
BD
130 .lpcsel = 0xf82,
131
132 .gpccon = 0xaa955699,
133 .gpccon_mask = 0xffc003cc,
134 .gpcup = 0x0000ffff,
135 .gpcup_mask = 0xffffffff,
136
137 .gpdcon = 0xaa95aaa1,
138 .gpdcon_mask = 0xffc0fff0,
139 .gpdup = 0x0000faff,
140 .gpdup_mask = 0xffffffff,
e838ffc2
BD
141};
142
2a3a1804 143static struct mtd_partition __initdata rx3715_nand_part[] = {
272eb575
BD
144 [0] = {
145 .name = "Whole Flash",
146 .offset = 0,
147 .size = MTDPART_SIZ_FULL,
148 .mask_flags = MTD_WRITEABLE,
149 }
150};
151
2a3a1804 152static struct s3c2410_nand_set __initdata rx3715_nand_sets[] = {
272eb575
BD
153 [0] = {
154 .name = "Internal",
155 .nr_chips = 1,
156 .nr_partitions = ARRAY_SIZE(rx3715_nand_part),
157 .partitions = rx3715_nand_part,
158 },
159};
160
2a3a1804 161static struct s3c2410_platform_nand __initdata rx3715_nand_info = {
272eb575
BD
162 .tacls = 25,
163 .twrph0 = 50,
164 .twrph1 = 15,
165 .nr_sets = ARRAY_SIZE(rx3715_nand_sets),
166 .sets = rx3715_nand_sets,
e9f66ae2 167 .ecc_mode = NAND_ECC_SOFT,
272eb575
BD
168};
169
1da177e4 170static struct platform_device *rx3715_devices[] __initdata = {
b813248c 171 &s3c_device_ohci,
1da177e4
LT
172 &s3c_device_lcd,
173 &s3c_device_wdt,
3e1b776c 174 &s3c_device_i2c0,
1da177e4 175 &s3c_device_iis,
272eb575 176 &s3c_device_nand,
1da177e4
LT
177};
178
5fe10ab1 179static void __init rx3715_map_io(void)
1da177e4
LT
180{
181 s3c24xx_init_io(rx3715_iodesc, ARRAY_SIZE(rx3715_iodesc));
1da177e4 182 s3c24xx_init_uarts(rx3715_uartcfgs, ARRAY_SIZE(rx3715_uartcfgs));
7f78b6eb 183 samsung_set_timer_source(SAMSUNG_PWM3, SAMSUNG_PWM4);
1da177e4
LT
184}
185
a28d618e
HS
186static void __init rx3715_init_time(void)
187{
188 s3c2440_init_clocks(16934000);
189 samsung_timer_init();
190}
191
98c672cf
RK
192/* H1940 and RX3715 need to reserve this for suspend */
193static void __init rx3715_reserve(void)
194{
8d717a52
RK
195 memblock_reserve(0x30003000, 0x1000);
196 memblock_reserve(0x30081000, 0x1000);
98c672cf
RK
197}
198
1da177e4
LT
199static void __init rx3715_init_machine(void)
200{
b1dfe1f1 201#ifdef CONFIG_PM_H1940
bbf6f280 202 memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024);
b1dfe1f1 203#endif
4e59c25d 204 s3c_pm_init();
bbf6f280 205
2a3a1804 206 s3c_nand_set_platdata(&rx3715_nand_info);
09fe75f6 207 s3c24xx_fb_set_platdata(&rx3715_fb_info);
57e5171c 208 platform_add_devices(rx3715_devices, ARRAY_SIZE(rx3715_devices));
1da177e4 209}
e838ffc2 210
1da177e4 211MACHINE_START(RX3715, "IPAQ-RX3715")
afdd225d 212 /* Maintainer: Ben Dooks <ben-linux@fluff.org> */
69d50710 213 .atag_offset = 0x100,
e9dea0c6 214 .map_io = rx3715_map_io,
98c672cf 215 .reserve = rx3715_reserve,
ce6c164b 216 .init_irq = s3c2440_init_irq,
e9dea0c6 217 .init_machine = rx3715_init_machine,
a28d618e 218 .init_time = rx3715_init_time,
1da177e4 219MACHINE_END