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09ec1d7e | 1 | /* |
a24c091d BD |
2 | * Copyright (c) 2009 Simtec Electronics |
3 | * http://armlinux.simtec.co.uk/ | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * S3C24XX CPU Frequency scaling - utils for S3C2410/S3C2440/S3C2442 | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/kernel.h> | |
14 | #include <linux/errno.h> | |
15 | #include <linux/cpufreq.h> | |
16 | #include <linux/io.h> | |
17 | ||
18 | #include <mach/map.h> | |
a24c091d BD |
19 | #include <mach/regs-clock.h> |
20 | ||
21 | #include <plat/cpu-freq-core.h> | |
22 | ||
37c3adca KK |
23 | #include "regs-mem.h" |
24 | ||
a24c091d BD |
25 | /** |
26 | * s3c2410_cpufreq_setrefresh - set SDRAM refresh value | |
27 | * @cfg: The frequency configuration | |
28 | * | |
29 | * Set the SDRAM refresh value appropriately for the configured | |
30 | * frequency. | |
31 | */ | |
32 | void s3c2410_cpufreq_setrefresh(struct s3c_cpufreq_config *cfg) | |
33 | { | |
34 | struct s3c_cpufreq_board *board = cfg->board; | |
35 | unsigned long refresh; | |
36 | unsigned long refval; | |
37 | ||
38 | /* Reduce both the refresh time (in ns) and the frequency (in MHz) | |
39 | * down to ensure that we do not overflow 32 bit numbers. | |
40 | * | |
41 | * This should work for HCLK up to 133MHz and refresh period up | |
42 | * to 30usec. | |
43 | */ | |
44 | ||
45 | refresh = (cfg->freq.hclk / 100) * (board->refresh / 10); | |
46 | refresh = DIV_ROUND_UP(refresh, (1000 * 1000)); /* apply scale */ | |
47 | refresh = (1 << 11) + 1 - refresh; | |
48 | ||
49 | s3c_freq_dbg("%s: refresh value %lu\n", __func__, refresh); | |
50 | ||
51 | refval = __raw_readl(S3C2410_REFRESH); | |
52 | refval &= ~((1 << 12) - 1); | |
53 | refval |= refresh; | |
54 | __raw_writel(refval, S3C2410_REFRESH); | |
55 | } | |
56 | ||
57 | /** | |
58 | * s3c2410_set_fvco - set the PLL value | |
59 | * @cfg: The frequency configuration | |
60 | */ | |
61 | void s3c2410_set_fvco(struct s3c_cpufreq_config *cfg) | |
62 | { | |
50701588 | 63 | __raw_writel(cfg->pll.driver_data, S3C2410_MPLLCON); |
a24c091d | 64 | } |