projects / linux-2.6-block.git / blame
| Commit | Line | Data |
|---|---|---|
| 8551f3ff KK |
1 | /* |
| 2 | * Copyright (c) 2012 Samsung Electronics Co., Ltd. | |
| 3 | * http://www.samsung.com | |
| 4 | * | |
| 5 | * Common Header for S3C24XX SoCs | |
| 6 | * | |
| 7 | * This program is free software; you can redistribute it and/or modify | |
| 8 | * it under the terms of the GNU General Public License version 2 as | |
| 9 | * published by the Free Software Foundation. | |
| 10 | */ | |
| 11 | ||
| 12 | #ifndef __ARCH_ARM_MACH_S3C24XX_COMMON_H | |
| 13 | #define __ARCH_ARM_MACH_S3C24XX_COMMON_H __FILE__ | |
| 14 | ||
| 7b6d864b RH |
15 | #include <linux/reboot.h> |
| 16 | ||
| 7488335d | 17 | struct s3c2410_uartcfg; |
| e1a621da | 18 | |
| 7488335d | 19 | #ifdef CONFIG_CPU_S3C2410 |
| e1a621da HS |
20 | extern int s3c2410_init(void); |
| 21 | extern int s3c2410a_init(void); | |
| e1a621da | 22 | extern void s3c2410_map_io(void); |
| e1a621da | 23 | extern void s3c2410_init_uarts(struct s3c2410_uartcfg *cfg, int no); |
| e1a621da | 24 | extern void s3c2410_init_clocks(int xtal); |
| 7b6d864b | 25 | extern void s3c2410_restart(enum reboot_mode mode, const char *cmd); |
| f182aa1d | 26 | extern void s3c2410_init_irq(void); |
| e1a621da HS |
27 | #else |
| 28 | #define s3c2410_init_clocks NULL | |
| 29 | #define s3c2410_init_uarts NULL | |
| 30 | #define s3c2410_map_io NULL | |
| 31 | #define s3c2410_init NULL | |
| 32 | #define s3c2410a_init NULL | |
| 33 | #endif | |
| 34 | ||
| 35 | #ifdef CONFIG_CPU_S3C2412 | |
| e1a621da | 36 | extern int s3c2412_init(void); |
| e1a621da | 37 | extern void s3c2412_map_io(void); |
| e1a621da | 38 | extern void s3c2412_init_uarts(struct s3c2410_uartcfg *cfg, int no); |
| e1a621da | 39 | extern void s3c2412_init_clocks(int xtal); |
| e1a621da | 40 | extern int s3c2412_baseclk_add(void); |
| 7b6d864b | 41 | extern void s3c2412_restart(enum reboot_mode mode, const char *cmd); |
| 0da09930 | 42 | extern void s3c2412_init_irq(void); |
| e1a621da HS |
43 | #else |
| 44 | #define s3c2412_init_clocks NULL | |
| 45 | #define s3c2412_init_uarts NULL | |
| 46 | #define s3c2412_map_io NULL | |
| 47 | #define s3c2412_init NULL | |
| e1a621da HS |
48 | #endif |
| 49 | ||
| 50 | #ifdef CONFIG_CPU_S3C2416 | |
| e1a621da | 51 | extern int s3c2416_init(void); |
| e1a621da | 52 | extern void s3c2416_map_io(void); |
| e1a621da | 53 | extern void s3c2416_init_uarts(struct s3c2410_uartcfg *cfg, int no); |
| e1a621da | 54 | extern void s3c2416_init_clocks(int xtal); |
| e1a621da | 55 | extern int s3c2416_baseclk_add(void); |
| 7b6d864b | 56 | extern void s3c2416_restart(enum reboot_mode mode, const char *cmd); |
| e1a621da | 57 | extern void s3c2416_init_irq(void); |
| e1a621da | 58 | |
| 7488335d | 59 | extern struct syscore_ops s3c2416_irq_syscore_ops; |
| e1a621da HS |
60 | #else |
| 61 | #define s3c2416_init_clocks NULL | |
| 62 | #define s3c2416_init_uarts NULL | |
| 63 | #define s3c2416_map_io NULL | |
| 64 | #define s3c2416_init NULL | |
| e1a621da HS |
65 | #endif |
| 66 | ||
| 67 | #if defined(CONFIG_CPU_S3C2440) || defined(CONFIG_CPU_S3C2442) | |
| e1a621da | 68 | extern void s3c244x_map_io(void); |
| e1a621da | 69 | extern void s3c244x_init_uarts(struct s3c2410_uartcfg *cfg, int no); |
| e1a621da | 70 | extern void s3c244x_init_clocks(int xtal); |
| 7b6d864b | 71 | extern void s3c244x_restart(enum reboot_mode mode, const char *cmd); |
| e1a621da HS |
72 | #else |
| 73 | #define s3c244x_init_clocks NULL | |
| 74 | #define s3c244x_init_uarts NULL | |
| 75 | #endif | |
| 76 | ||
| 77 | #ifdef CONFIG_CPU_S3C2440 | |
| 78 | extern int s3c2440_init(void); | |
| e1a621da | 79 | extern void s3c2440_map_io(void); |
| ce6c164b | 80 | extern void s3c2440_init_irq(void); |
| e1a621da HS |
81 | #else |
| 82 | #define s3c2440_init NULL | |
| 83 | #define s3c2440_map_io NULL | |
| 84 | #endif | |
| 85 | ||
| 86 | #ifdef CONFIG_CPU_S3C2442 | |
| 87 | extern int s3c2442_init(void); | |
| e1a621da | 88 | extern void s3c2442_map_io(void); |
| ce6c164b | 89 | extern void s3c2442_init_irq(void); |
| e1a621da HS |
90 | #else |
| 91 | #define s3c2442_init NULL | |
| 92 | #define s3c2442_map_io NULL | |
| 93 | #endif | |
| 94 | ||
| 95 | #ifdef CONFIG_CPU_S3C2443 | |
| e1a621da | 96 | extern int s3c2443_init(void); |
| e1a621da | 97 | extern void s3c2443_map_io(void); |
| e1a621da | 98 | extern void s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no); |
| e1a621da | 99 | extern void s3c2443_init_clocks(int xtal); |
| e1a621da | 100 | extern int s3c2443_baseclk_add(void); |
| 7b6d864b | 101 | extern void s3c2443_restart(enum reboot_mode mode, const char *cmd); |
| e1a621da HS |
102 | extern void s3c2443_init_irq(void); |
| 103 | #else | |
| 104 | #define s3c2443_init_clocks NULL | |
| 105 | #define s3c2443_init_uarts NULL | |
| 106 | #define s3c2443_map_io NULL | |
| 107 | #define s3c2443_init NULL | |
| e1a621da HS |
108 | #endif |
| 109 | ||
| d8fdec16 HS |
110 | extern struct syscore_ops s3c24xx_irq_syscore_ops; |
| 111 | ||
| 1fecf895 | 112 | extern struct platform_device s3c2410_device_dma; |
| f2dda07d | 113 | extern struct platform_device s3c2412_device_dma; |
| 1fecf895 | 114 | extern struct platform_device s3c2440_device_dma; |
| f2dda07d HS |
115 | extern struct platform_device s3c2443_device_dma; |
| 116 | ||
| 8551f3ff | 117 | #endif /* __ARCH_ARM_MACH_S3C24XX_COMMON_H */ |