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1 | /* linux/arch/arm/mach-s3c2443/s3c2443.c |
2 | * | |
3 | * Copyright (c) 2007 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * Samsung S3C2443 Mobile CPU support | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | */ | |
12 | ||
13 | #include <linux/kernel.h> | |
14 | #include <linux/types.h> | |
15 | #include <linux/interrupt.h> | |
16 | #include <linux/list.h> | |
17 | #include <linux/timer.h> | |
18 | #include <linux/init.h> | |
19 | #include <linux/platform_device.h> | |
20 | #include <linux/serial_core.h> | |
21 | #include <linux/sysdev.h> | |
22 | #include <linux/clk.h> | |
23 | ||
24 | #include <asm/mach/arch.h> | |
25 | #include <asm/mach/map.h> | |
26 | #include <asm/mach/irq.h> | |
27 | ||
a09e64fb | 28 | #include <mach/hardware.h> |
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29 | #include <asm/io.h> |
30 | #include <asm/irq.h> | |
31 | ||
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32 | #include <mach/regs-s3c2443-clock.h> |
33 | #include <mach/reset.h> | |
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34 | |
35 | #include <asm/plat-s3c24xx/s3c2443.h> | |
36 | #include <asm/plat-s3c24xx/devs.h> | |
37 | #include <asm/plat-s3c24xx/cpu.h> | |
38 | ||
39 | static struct map_desc s3c2443_iodesc[] __initdata = { | |
40 | IODESC_ENT(WATCHDOG), | |
41 | IODESC_ENT(CLKPWR), | |
42 | IODESC_ENT(TIMER), | |
43 | }; | |
44 | ||
45 | struct sysdev_class s3c2443_sysclass = { | |
af5ca3f4 | 46 | .name = "s3c2443-core", |
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47 | }; |
48 | ||
49 | static struct sys_device s3c2443_sysdev = { | |
50 | .cls = &s3c2443_sysclass, | |
51 | }; | |
52 | ||
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53 | static void s3c2443_hard_reset(void) |
54 | { | |
55 | __raw_writel(S3C2443_SWRST_RESET, S3C2443_SWRST); | |
56 | } | |
57 | ||
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58 | int __init s3c2443_init(void) |
59 | { | |
60 | printk("S3C2443: Initialising architecture\n"); | |
61 | ||
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62 | s3c24xx_reset_hook = s3c2443_hard_reset; |
63 | ||
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64 | s3c_device_nand.name = "s3c2412-nand"; |
65 | ||
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66 | /* change WDT IRQ number */ |
67 | s3c_device_wdt.resource[1].start = IRQ_S3C2443_WDT; | |
68 | s3c_device_wdt.resource[1].end = IRQ_S3C2443_WDT; | |
69 | ||
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70 | return sysdev_register(&s3c2443_sysdev); |
71 | } | |
72 | ||
73 | void __init s3c2443_init_uarts(struct s3c2410_uartcfg *cfg, int no) | |
74 | { | |
75 | s3c24xx_init_uartdevs("s3c2440-uart", s3c2410_uart_resources, cfg, no); | |
76 | } | |
77 | ||
78 | /* s3c2443_map_io | |
79 | * | |
80 | * register the standard cpu IO areas, and any passed in from the | |
81 | * machine specific initialisation. | |
82 | */ | |
83 | ||
84 | void __init s3c2443_map_io(struct map_desc *mach_desc, int mach_size) | |
85 | { | |
86 | iotable_init(s3c2443_iodesc, ARRAY_SIZE(s3c2443_iodesc)); | |
87 | iotable_init(mach_desc, mach_size); | |
88 | } | |
89 | ||
90 | /* need to register class before we actually register the device, and | |
91 | * we also need to ensure that it has been initialised before any of the | |
92 | * drivers even try to use it (even if not on an s3c2443 based system) | |
93 | * as a driver which may support both 2443 and 2440 may try and use it. | |
94 | */ | |
95 | ||
96 | static int __init s3c2443_core_init(void) | |
97 | { | |
98 | return sysdev_class_register(&s3c2443_sysclass); | |
99 | } | |
100 | ||
101 | core_initcall(s3c2443_core_init); |