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1da177e4 LT |
1 | /* linux/arch/arm/mach-s3c2410/mach-h1940.c |
2 | * | |
3 | * Copyright (c) 2003-2005 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * http://www.handhelds.org/projects/h1940.html | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
1da177e4 LT |
12 | */ |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/types.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/timer.h> | |
19 | #include <linux/init.h> | |
b6d1f542 | 20 | #include <linux/serial_core.h> |
d052d1be | 21 | #include <linux/platform_device.h> |
1da177e4 LT |
22 | |
23 | #include <asm/mach/arch.h> | |
24 | #include <asm/mach/map.h> | |
25 | #include <asm/mach/irq.h> | |
26 | ||
27 | #include <asm/hardware.h> | |
28 | #include <asm/hardware/iomd.h> | |
29 | #include <asm/io.h> | |
30 | #include <asm/irq.h> | |
31 | #include <asm/mach-types.h> | |
32 | ||
e1981680 | 33 | |
1da177e4 | 34 | #include <asm/arch/regs-serial.h> |
f92273c1 | 35 | #include <asm/arch/regs-lcd.h> |
71a9c424 AP |
36 | #include <asm/arch/regs-gpio.h> |
37 | #include <asm/arch/regs-clock.h> | |
f92273c1 | 38 | |
9073341c | 39 | #include <asm/arch/h1940.h> |
e1981680 | 40 | #include <asm/arch/h1940-latch.h> |
f92273c1 | 41 | #include <asm/arch/fb.h> |
71a9c424 | 42 | #include <asm/arch/udc.h> |
1da177e4 | 43 | |
a21765a7 BD |
44 | #include <asm/plat-s3c24xx/clock.h> |
45 | #include <asm/plat-s3c24xx/devs.h> | |
46 | #include <asm/plat-s3c24xx/cpu.h> | |
47 | #include <asm/plat-s3c24xx/pm.h> | |
1da177e4 LT |
48 | |
49 | static struct map_desc h1940_iodesc[] __initdata = { | |
e1981680 BD |
50 | [0] = { |
51 | .virtual = (unsigned long)H1940_LATCH, | |
52 | .pfn = __phys_to_pfn(H1940_PA_LATCH), | |
53 | .length = SZ_16K, | |
54 | .type = MT_DEVICE | |
55 | }, | |
1da177e4 LT |
56 | }; |
57 | ||
58 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | |
59 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | |
60 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | |
61 | ||
66a9b49a | 62 | static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = { |
1da177e4 LT |
63 | [0] = { |
64 | .hwport = 0, | |
65 | .flags = 0, | |
66 | .ucon = 0x3c5, | |
67 | .ulcon = 0x03, | |
68 | .ufcon = 0x51, | |
69 | }, | |
70 | [1] = { | |
71 | .hwport = 1, | |
72 | .flags = 0, | |
73 | .ucon = 0x245, | |
74 | .ulcon = 0x03, | |
75 | .ufcon = 0x00, | |
76 | }, | |
77 | /* IR port */ | |
78 | [2] = { | |
79 | .hwport = 2, | |
80 | .flags = 0, | |
81 | .uart_flags = UPF_CONS_FLOW, | |
82 | .ucon = 0x3c5, | |
83 | .ulcon = 0x43, | |
84 | .ufcon = 0x51, | |
85 | } | |
86 | }; | |
87 | ||
e1981680 BD |
88 | /* Board control latch control */ |
89 | ||
90 | static unsigned int latch_state = H1940_LATCH_DEFAULT; | |
91 | ||
92 | void h1940_latch_control(unsigned int clear, unsigned int set) | |
93 | { | |
94 | unsigned long flags; | |
95 | ||
96 | local_irq_save(flags); | |
97 | ||
98 | latch_state &= ~clear; | |
99 | latch_state |= set; | |
100 | ||
101 | __raw_writel(latch_state, H1940_LATCH); | |
102 | ||
103 | local_irq_restore(flags); | |
104 | } | |
105 | ||
106 | EXPORT_SYMBOL_GPL(h1940_latch_control); | |
1da177e4 | 107 | |
71a9c424 AP |
108 | static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd) |
109 | { | |
110 | printk(KERN_DEBUG "udc: pullup(%d)\n",cmd); | |
111 | ||
112 | switch (cmd) | |
113 | { | |
114 | case S3C2410_UDC_P_ENABLE : | |
115 | h1940_latch_control(0, H1940_LATCH_USB_DP); | |
116 | break; | |
117 | case S3C2410_UDC_P_DISABLE : | |
118 | h1940_latch_control(H1940_LATCH_USB_DP, 0); | |
119 | break; | |
120 | case S3C2410_UDC_P_RESET : | |
121 | break; | |
122 | default: | |
123 | break; | |
124 | } | |
125 | } | |
126 | ||
127 | static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = { | |
128 | .udc_command = h1940_udc_pullup, | |
129 | .vbus_pin = S3C2410_GPG5, | |
130 | .vbus_pin_inverted = 1, | |
131 | }; | |
132 | ||
133 | ||
1da177e4 | 134 | |
f92273c1 AP |
135 | /** |
136 | * Set lcd on or off | |
137 | **/ | |
138 | static struct s3c2410fb_mach_info h1940_lcdcfg __initdata = { | |
139 | .fixed_syncs= 1, | |
140 | .regs={ | |
141 | .lcdcon1= S3C2410_LCDCON1_TFT16BPP | \ | |
142 | S3C2410_LCDCON1_TFT | \ | |
143 | S3C2410_LCDCON1_CLKVAL(0x0C), | |
144 | ||
145 | .lcdcon2= S3C2410_LCDCON2_VBPD(7) | \ | |
146 | S3C2410_LCDCON2_LINEVAL(319) | \ | |
147 | S3C2410_LCDCON2_VFPD(6) | \ | |
148 | S3C2410_LCDCON2_VSPW(0), | |
149 | ||
150 | .lcdcon3= S3C2410_LCDCON3_HBPD(19) | \ | |
151 | S3C2410_LCDCON3_HOZVAL(239) | \ | |
152 | S3C2410_LCDCON3_HFPD(7), | |
153 | ||
154 | .lcdcon4= S3C2410_LCDCON4_MVAL(0) | \ | |
155 | S3C2410_LCDCON4_HSPW(3), | |
156 | ||
157 | .lcdcon5= S3C2410_LCDCON5_FRM565 | \ | |
158 | S3C2410_LCDCON5_INVVLINE | \ | |
159 | S3C2410_LCDCON5_HWSWP, | |
160 | }, | |
161 | .lpcsel= 0x02, | |
162 | .gpccon= 0xaa940659, | |
163 | .gpccon_mask= 0xffffffff, | |
164 | .gpcup= 0x0000ffff, | |
165 | .gpcup_mask= 0xffffffff, | |
166 | .gpdcon= 0xaa84aaa0, | |
167 | .gpdcon_mask= 0xffffffff, | |
168 | .gpdup= 0x0000faff, | |
169 | .gpdup_mask= 0xffffffff, | |
170 | ||
171 | .width= 240, | |
172 | .height= 320, | |
173 | .xres= {240,240,240}, | |
174 | .yres= {320,320,320}, | |
175 | .bpp= {16,16,16}, | |
176 | }; | |
1da177e4 LT |
177 | |
178 | static struct platform_device *h1940_devices[] __initdata = { | |
179 | &s3c_device_usb, | |
180 | &s3c_device_lcd, | |
181 | &s3c_device_wdt, | |
182 | &s3c_device_i2c, | |
183 | &s3c_device_iis, | |
71a9c424 | 184 | &s3c_device_usbgadget, |
1da177e4 LT |
185 | }; |
186 | ||
187 | static struct s3c24xx_board h1940_board __initdata = { | |
188 | .devices = h1940_devices, | |
189 | .devices_count = ARRAY_SIZE(h1940_devices) | |
190 | }; | |
191 | ||
5fe10ab1 | 192 | static void __init h1940_map_io(void) |
1da177e4 LT |
193 | { |
194 | s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc)); | |
195 | s3c24xx_init_clocks(0); | |
196 | s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs)); | |
197 | s3c24xx_set_board(&h1940_board); | |
9073341c BD |
198 | |
199 | /* setup PM */ | |
200 | ||
201 | memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); | |
202 | s3c2410_pm_init(); | |
1da177e4 LT |
203 | } |
204 | ||
5fe10ab1 | 205 | static void __init h1940_init_irq(void) |
1da177e4 LT |
206 | { |
207 | s3c24xx_init_irq(); | |
1da177e4 LT |
208 | } |
209 | ||
5fe10ab1 | 210 | static void __init h1940_init(void) |
f92273c1 | 211 | { |
71a9c424 AP |
212 | u32 tmp; |
213 | ||
893b0309 | 214 | s3c24xx_fb_set_platdata(&h1940_lcdcfg); |
71a9c424 AP |
215 | s3c24xx_udc_set_platdata(&h1940_udc_cfg); |
216 | ||
217 | /* Turn off suspend on both USB ports, and switch the | |
218 | * selectable USB port to USB device mode. */ | |
219 | ||
220 | s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | | |
221 | S3C2410_MISCCR_USBSUSPND0 | | |
222 | S3C2410_MISCCR_USBSUSPND1, 0x0); | |
223 | ||
224 | tmp = ( | |
225 | 0x78 << S3C2410_PLLCON_MDIVSHIFT) | |
226 | | (0x02 << S3C2410_PLLCON_PDIVSHIFT) | |
227 | | (0x03 << S3C2410_PLLCON_SDIVSHIFT); | |
228 | writel(tmp, S3C2410_UPLLCON); | |
f92273c1 AP |
229 | } |
230 | ||
1da177e4 | 231 | MACHINE_START(H1940, "IPAQ-H1940") |
e9dea0c6 | 232 | /* Maintainer: Ben Dooks <ben@fluff.org> */ |
e9dea0c6 RK |
233 | .phys_io = S3C2410_PA_UART, |
234 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, | |
235 | .boot_params = S3C2410_SDRAM_PA + 0x100, | |
236 | .map_io = h1940_map_io, | |
237 | .init_irq = h1940_init_irq, | |
71a9c424 | 238 | .init_machine = h1940_init, |
1da177e4 LT |
239 | .timer = &s3c24xx_timer, |
240 | MACHINE_END |