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1da177e4 LT |
1 | /* linux/arch/arm/mach-s3c2410/mach-h1940.c |
2 | * | |
3 | * Copyright (c) 2003-2005 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * http://www.handhelds.org/projects/h1940.html | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
1da177e4 LT |
12 | */ |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/types.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/timer.h> | |
19 | #include <linux/init.h> | |
b6d1f542 | 20 | #include <linux/serial_core.h> |
d052d1be | 21 | #include <linux/platform_device.h> |
1da177e4 LT |
22 | |
23 | #include <asm/mach/arch.h> | |
24 | #include <asm/mach/map.h> | |
25 | #include <asm/mach/irq.h> | |
26 | ||
27 | #include <asm/hardware.h> | |
1da177e4 LT |
28 | #include <asm/io.h> |
29 | #include <asm/irq.h> | |
30 | #include <asm/mach-types.h> | |
31 | ||
1da177e4 | 32 | #include <asm/arch/regs-serial.h> |
f92273c1 | 33 | #include <asm/arch/regs-lcd.h> |
71a9c424 AP |
34 | #include <asm/arch/regs-gpio.h> |
35 | #include <asm/arch/regs-clock.h> | |
f92273c1 | 36 | |
9073341c | 37 | #include <asm/arch/h1940.h> |
e1981680 | 38 | #include <asm/arch/h1940-latch.h> |
f92273c1 | 39 | #include <asm/arch/fb.h> |
71a9c424 | 40 | #include <asm/arch/udc.h> |
1da177e4 | 41 | |
a21765a7 BD |
42 | #include <asm/plat-s3c24xx/clock.h> |
43 | #include <asm/plat-s3c24xx/devs.h> | |
44 | #include <asm/plat-s3c24xx/cpu.h> | |
45 | #include <asm/plat-s3c24xx/pm.h> | |
1da177e4 LT |
46 | |
47 | static struct map_desc h1940_iodesc[] __initdata = { | |
e1981680 BD |
48 | [0] = { |
49 | .virtual = (unsigned long)H1940_LATCH, | |
50 | .pfn = __phys_to_pfn(H1940_PA_LATCH), | |
51 | .length = SZ_16K, | |
52 | .type = MT_DEVICE | |
53 | }, | |
1da177e4 LT |
54 | }; |
55 | ||
56 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | |
57 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | |
58 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | |
59 | ||
66a9b49a | 60 | static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = { |
1da177e4 LT |
61 | [0] = { |
62 | .hwport = 0, | |
63 | .flags = 0, | |
64 | .ucon = 0x3c5, | |
65 | .ulcon = 0x03, | |
66 | .ufcon = 0x51, | |
67 | }, | |
68 | [1] = { | |
69 | .hwport = 1, | |
70 | .flags = 0, | |
71 | .ucon = 0x245, | |
72 | .ulcon = 0x03, | |
73 | .ufcon = 0x00, | |
74 | }, | |
75 | /* IR port */ | |
76 | [2] = { | |
77 | .hwport = 2, | |
78 | .flags = 0, | |
79 | .uart_flags = UPF_CONS_FLOW, | |
80 | .ucon = 0x3c5, | |
81 | .ulcon = 0x43, | |
82 | .ufcon = 0x51, | |
83 | } | |
84 | }; | |
85 | ||
e1981680 BD |
86 | /* Board control latch control */ |
87 | ||
88 | static unsigned int latch_state = H1940_LATCH_DEFAULT; | |
89 | ||
90 | void h1940_latch_control(unsigned int clear, unsigned int set) | |
91 | { | |
92 | unsigned long flags; | |
93 | ||
94 | local_irq_save(flags); | |
95 | ||
96 | latch_state &= ~clear; | |
97 | latch_state |= set; | |
98 | ||
99 | __raw_writel(latch_state, H1940_LATCH); | |
100 | ||
101 | local_irq_restore(flags); | |
102 | } | |
103 | ||
104 | EXPORT_SYMBOL_GPL(h1940_latch_control); | |
1da177e4 | 105 | |
71a9c424 AP |
106 | static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd) |
107 | { | |
108 | printk(KERN_DEBUG "udc: pullup(%d)\n",cmd); | |
109 | ||
110 | switch (cmd) | |
111 | { | |
112 | case S3C2410_UDC_P_ENABLE : | |
113 | h1940_latch_control(0, H1940_LATCH_USB_DP); | |
114 | break; | |
115 | case S3C2410_UDC_P_DISABLE : | |
116 | h1940_latch_control(H1940_LATCH_USB_DP, 0); | |
117 | break; | |
118 | case S3C2410_UDC_P_RESET : | |
119 | break; | |
120 | default: | |
121 | break; | |
122 | } | |
123 | } | |
124 | ||
125 | static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = { | |
126 | .udc_command = h1940_udc_pullup, | |
127 | .vbus_pin = S3C2410_GPG5, | |
128 | .vbus_pin_inverted = 1, | |
129 | }; | |
130 | ||
131 | ||
1da177e4 | 132 | |
f92273c1 AP |
133 | /** |
134 | * Set lcd on or off | |
135 | **/ | |
136 | static struct s3c2410fb_mach_info h1940_lcdcfg __initdata = { | |
137 | .fixed_syncs= 1, | |
138 | .regs={ | |
139 | .lcdcon1= S3C2410_LCDCON1_TFT16BPP | \ | |
140 | S3C2410_LCDCON1_TFT | \ | |
141 | S3C2410_LCDCON1_CLKVAL(0x0C), | |
142 | ||
143 | .lcdcon2= S3C2410_LCDCON2_VBPD(7) | \ | |
144 | S3C2410_LCDCON2_LINEVAL(319) | \ | |
145 | S3C2410_LCDCON2_VFPD(6) | \ | |
146 | S3C2410_LCDCON2_VSPW(0), | |
147 | ||
148 | .lcdcon3= S3C2410_LCDCON3_HBPD(19) | \ | |
149 | S3C2410_LCDCON3_HOZVAL(239) | \ | |
150 | S3C2410_LCDCON3_HFPD(7), | |
151 | ||
152 | .lcdcon4= S3C2410_LCDCON4_MVAL(0) | \ | |
153 | S3C2410_LCDCON4_HSPW(3), | |
154 | ||
155 | .lcdcon5= S3C2410_LCDCON5_FRM565 | \ | |
156 | S3C2410_LCDCON5_INVVLINE | \ | |
157 | S3C2410_LCDCON5_HWSWP, | |
158 | }, | |
159 | .lpcsel= 0x02, | |
160 | .gpccon= 0xaa940659, | |
161 | .gpccon_mask= 0xffffffff, | |
162 | .gpcup= 0x0000ffff, | |
163 | .gpcup_mask= 0xffffffff, | |
164 | .gpdcon= 0xaa84aaa0, | |
165 | .gpdcon_mask= 0xffffffff, | |
166 | .gpdup= 0x0000faff, | |
167 | .gpdup_mask= 0xffffffff, | |
168 | ||
169 | .width= 240, | |
170 | .height= 320, | |
171 | .xres= {240,240,240}, | |
172 | .yres= {320,320,320}, | |
173 | .bpp= {16,16,16}, | |
174 | }; | |
1da177e4 | 175 | |
d2a76020 AP |
176 | static struct platform_device s3c_device_leds = { |
177 | .name = "h1940-leds", | |
178 | .id = -1, | |
179 | }; | |
180 | ||
1da177e4 LT |
181 | static struct platform_device *h1940_devices[] __initdata = { |
182 | &s3c_device_usb, | |
183 | &s3c_device_lcd, | |
184 | &s3c_device_wdt, | |
185 | &s3c_device_i2c, | |
186 | &s3c_device_iis, | |
71a9c424 | 187 | &s3c_device_usbgadget, |
d2a76020 | 188 | &s3c_device_leds, |
1da177e4 LT |
189 | }; |
190 | ||
191 | static struct s3c24xx_board h1940_board __initdata = { | |
192 | .devices = h1940_devices, | |
193 | .devices_count = ARRAY_SIZE(h1940_devices) | |
194 | }; | |
195 | ||
5fe10ab1 | 196 | static void __init h1940_map_io(void) |
1da177e4 LT |
197 | { |
198 | s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc)); | |
199 | s3c24xx_init_clocks(0); | |
200 | s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs)); | |
201 | s3c24xx_set_board(&h1940_board); | |
9073341c BD |
202 | |
203 | /* setup PM */ | |
204 | ||
b1dfe1f1 | 205 | #ifdef CONFIG_PM_H1940 |
9073341c | 206 | memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); |
b1dfe1f1 | 207 | #endif |
9073341c | 208 | s3c2410_pm_init(); |
1da177e4 LT |
209 | } |
210 | ||
5fe10ab1 | 211 | static void __init h1940_init_irq(void) |
1da177e4 LT |
212 | { |
213 | s3c24xx_init_irq(); | |
1da177e4 LT |
214 | } |
215 | ||
5fe10ab1 | 216 | static void __init h1940_init(void) |
f92273c1 | 217 | { |
71a9c424 AP |
218 | u32 tmp; |
219 | ||
893b0309 | 220 | s3c24xx_fb_set_platdata(&h1940_lcdcfg); |
71a9c424 AP |
221 | s3c24xx_udc_set_platdata(&h1940_udc_cfg); |
222 | ||
223 | /* Turn off suspend on both USB ports, and switch the | |
224 | * selectable USB port to USB device mode. */ | |
225 | ||
226 | s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | | |
227 | S3C2410_MISCCR_USBSUSPND0 | | |
228 | S3C2410_MISCCR_USBSUSPND1, 0x0); | |
229 | ||
230 | tmp = ( | |
231 | 0x78 << S3C2410_PLLCON_MDIVSHIFT) | |
232 | | (0x02 << S3C2410_PLLCON_PDIVSHIFT) | |
233 | | (0x03 << S3C2410_PLLCON_SDIVSHIFT); | |
234 | writel(tmp, S3C2410_UPLLCON); | |
f92273c1 AP |
235 | } |
236 | ||
1da177e4 | 237 | MACHINE_START(H1940, "IPAQ-H1940") |
e9dea0c6 | 238 | /* Maintainer: Ben Dooks <ben@fluff.org> */ |
e9dea0c6 RK |
239 | .phys_io = S3C2410_PA_UART, |
240 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, | |
241 | .boot_params = S3C2410_SDRAM_PA + 0x100, | |
242 | .map_io = h1940_map_io, | |
243 | .init_irq = h1940_init_irq, | |
71a9c424 | 244 | .init_machine = h1940_init, |
1da177e4 LT |
245 | .timer = &s3c24xx_timer, |
246 | MACHINE_END |