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1da177e4 LT |
1 | /* linux/arch/arm/mach-s3c2410/mach-h1940.c |
2 | * | |
3 | * Copyright (c) 2003-2005 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * http://www.handhelds.org/projects/h1940.html | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
1da177e4 LT |
12 | */ |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/types.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/list.h> | |
18 | #include <linux/timer.h> | |
19 | #include <linux/init.h> | |
333a42e1 | 20 | #include <linux/sysdev.h> |
b6d1f542 | 21 | #include <linux/serial_core.h> |
d052d1be | 22 | #include <linux/platform_device.h> |
fced80c7 | 23 | #include <linux/io.h> |
1da177e4 LT |
24 | |
25 | #include <asm/mach/arch.h> | |
26 | #include <asm/mach/map.h> | |
27 | #include <asm/mach/irq.h> | |
28 | ||
a09e64fb | 29 | #include <mach/hardware.h> |
1da177e4 LT |
30 | #include <asm/irq.h> |
31 | #include <asm/mach-types.h> | |
32 | ||
a2b7ba9c | 33 | #include <plat/regs-serial.h> |
a09e64fb RK |
34 | #include <mach/regs-lcd.h> |
35 | #include <mach/regs-gpio.h> | |
36 | #include <mach/regs-clock.h> | |
f92273c1 | 37 | |
a09e64fb RK |
38 | #include <mach/h1940.h> |
39 | #include <mach/h1940-latch.h> | |
40 | #include <mach/fb.h> | |
57bd4b91 | 41 | #include <plat/udc.h> |
1da177e4 | 42 | |
d5120ae7 | 43 | #include <plat/clock.h> |
a2b7ba9c BD |
44 | #include <plat/devs.h> |
45 | #include <plat/cpu.h> | |
e24b864a | 46 | #include <plat/pll.h> |
a2b7ba9c | 47 | #include <plat/pm.h> |
1da177e4 LT |
48 | |
49 | static struct map_desc h1940_iodesc[] __initdata = { | |
e1981680 BD |
50 | [0] = { |
51 | .virtual = (unsigned long)H1940_LATCH, | |
52 | .pfn = __phys_to_pfn(H1940_PA_LATCH), | |
53 | .length = SZ_16K, | |
54 | .type = MT_DEVICE | |
55 | }, | |
1da177e4 LT |
56 | }; |
57 | ||
58 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | |
59 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | |
60 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | |
61 | ||
66a9b49a | 62 | static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = { |
1da177e4 LT |
63 | [0] = { |
64 | .hwport = 0, | |
65 | .flags = 0, | |
66 | .ucon = 0x3c5, | |
67 | .ulcon = 0x03, | |
68 | .ufcon = 0x51, | |
69 | }, | |
70 | [1] = { | |
71 | .hwport = 1, | |
72 | .flags = 0, | |
73 | .ucon = 0x245, | |
74 | .ulcon = 0x03, | |
75 | .ufcon = 0x00, | |
76 | }, | |
77 | /* IR port */ | |
78 | [2] = { | |
79 | .hwport = 2, | |
80 | .flags = 0, | |
81 | .uart_flags = UPF_CONS_FLOW, | |
82 | .ucon = 0x3c5, | |
83 | .ulcon = 0x43, | |
84 | .ufcon = 0x51, | |
85 | } | |
86 | }; | |
87 | ||
e1981680 BD |
88 | /* Board control latch control */ |
89 | ||
90 | static unsigned int latch_state = H1940_LATCH_DEFAULT; | |
91 | ||
92 | void h1940_latch_control(unsigned int clear, unsigned int set) | |
93 | { | |
94 | unsigned long flags; | |
95 | ||
96 | local_irq_save(flags); | |
97 | ||
98 | latch_state &= ~clear; | |
99 | latch_state |= set; | |
100 | ||
101 | __raw_writel(latch_state, H1940_LATCH); | |
102 | ||
103 | local_irq_restore(flags); | |
104 | } | |
105 | ||
106 | EXPORT_SYMBOL_GPL(h1940_latch_control); | |
1da177e4 | 107 | |
71a9c424 AP |
108 | static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd) |
109 | { | |
110 | printk(KERN_DEBUG "udc: pullup(%d)\n",cmd); | |
111 | ||
112 | switch (cmd) | |
113 | { | |
114 | case S3C2410_UDC_P_ENABLE : | |
115 | h1940_latch_control(0, H1940_LATCH_USB_DP); | |
116 | break; | |
117 | case S3C2410_UDC_P_DISABLE : | |
118 | h1940_latch_control(H1940_LATCH_USB_DP, 0); | |
119 | break; | |
120 | case S3C2410_UDC_P_RESET : | |
121 | break; | |
122 | default: | |
123 | break; | |
124 | } | |
125 | } | |
126 | ||
127 | static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = { | |
128 | .udc_command = h1940_udc_pullup, | |
129 | .vbus_pin = S3C2410_GPG5, | |
130 | .vbus_pin_inverted = 1, | |
131 | }; | |
132 | ||
133 | ||
f92273c1 AP |
134 | /** |
135 | * Set lcd on or off | |
136 | **/ | |
09fe75f6 | 137 | static struct s3c2410fb_display h1940_lcd __initdata = { |
f28ef573 KH |
138 | .lcdcon5= S3C2410_LCDCON5_FRM565 | \ |
139 | S3C2410_LCDCON5_INVVLINE | \ | |
140 | S3C2410_LCDCON5_HWSWP, | |
09fe75f6 | 141 | |
1f411537 | 142 | .type = S3C2410_LCDCON1_TFT, |
09fe75f6 KH |
143 | .width = 240, |
144 | .height = 320, | |
69816699 | 145 | .pixclock = 260000, |
09fe75f6 KH |
146 | .xres = 240, |
147 | .yres = 320, | |
148 | .bpp = 16, | |
1f411537 KH |
149 | .left_margin = 20, |
150 | .right_margin = 8, | |
93d11f5a | 151 | .hsync_len = 4, |
5f20f69b KH |
152 | .upper_margin = 8, |
153 | .lower_margin = 7, | |
93d11f5a | 154 | .vsync_len = 1, |
09fe75f6 KH |
155 | }; |
156 | ||
157 | static struct s3c2410fb_mach_info h1940_fb_info __initdata = { | |
09fe75f6 KH |
158 | .displays = &h1940_lcd, |
159 | .num_displays = 1, | |
160 | .default_display = 0, | |
161 | ||
f92273c1 AP |
162 | .lpcsel= 0x02, |
163 | .gpccon= 0xaa940659, | |
164 | .gpccon_mask= 0xffffffff, | |
165 | .gpcup= 0x0000ffff, | |
166 | .gpcup_mask= 0xffffffff, | |
167 | .gpdcon= 0xaa84aaa0, | |
168 | .gpdcon_mask= 0xffffffff, | |
169 | .gpdup= 0x0000faff, | |
170 | .gpdup_mask= 0xffffffff, | |
f92273c1 | 171 | }; |
1da177e4 | 172 | |
d2a76020 AP |
173 | static struct platform_device s3c_device_leds = { |
174 | .name = "h1940-leds", | |
175 | .id = -1, | |
176 | }; | |
177 | ||
7fdc7849 AP |
178 | static struct platform_device s3c_device_bluetooth = { |
179 | .name = "h1940-bt", | |
180 | .id = -1, | |
181 | }; | |
182 | ||
1da177e4 LT |
183 | static struct platform_device *h1940_devices[] __initdata = { |
184 | &s3c_device_usb, | |
185 | &s3c_device_lcd, | |
186 | &s3c_device_wdt, | |
187 | &s3c_device_i2c, | |
188 | &s3c_device_iis, | |
71a9c424 | 189 | &s3c_device_usbgadget, |
d2a76020 | 190 | &s3c_device_leds, |
7fdc7849 | 191 | &s3c_device_bluetooth, |
1da177e4 LT |
192 | }; |
193 | ||
5fe10ab1 | 194 | static void __init h1940_map_io(void) |
1da177e4 LT |
195 | { |
196 | s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc)); | |
197 | s3c24xx_init_clocks(0); | |
198 | s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs)); | |
9073341c BD |
199 | |
200 | /* setup PM */ | |
201 | ||
b1dfe1f1 | 202 | #ifdef CONFIG_PM_H1940 |
9073341c | 203 | memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); |
b1dfe1f1 | 204 | #endif |
9073341c | 205 | s3c2410_pm_init(); |
1da177e4 LT |
206 | } |
207 | ||
5fe10ab1 | 208 | static void __init h1940_init_irq(void) |
1da177e4 LT |
209 | { |
210 | s3c24xx_init_irq(); | |
1da177e4 LT |
211 | } |
212 | ||
5fe10ab1 | 213 | static void __init h1940_init(void) |
f92273c1 | 214 | { |
71a9c424 AP |
215 | u32 tmp; |
216 | ||
09fe75f6 | 217 | s3c24xx_fb_set_platdata(&h1940_fb_info); |
71a9c424 AP |
218 | s3c24xx_udc_set_platdata(&h1940_udc_cfg); |
219 | ||
220 | /* Turn off suspend on both USB ports, and switch the | |
221 | * selectable USB port to USB device mode. */ | |
222 | ||
223 | s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | | |
224 | S3C2410_MISCCR_USBSUSPND0 | | |
225 | S3C2410_MISCCR_USBSUSPND1, 0x0); | |
226 | ||
e24b864a BD |
227 | tmp = (0x78 << S3C24XX_PLLCON_MDIVSHIFT) |
228 | | (0x02 << S3C24XX_PLLCON_PDIVSHIFT) | |
229 | | (0x03 << S3C24XX_PLLCON_SDIVSHIFT); | |
71a9c424 | 230 | writel(tmp, S3C2410_UPLLCON); |
57e5171c BD |
231 | |
232 | platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); | |
f92273c1 AP |
233 | } |
234 | ||
1da177e4 | 235 | MACHINE_START(H1940, "IPAQ-H1940") |
e9dea0c6 | 236 | /* Maintainer: Ben Dooks <ben@fluff.org> */ |
e9dea0c6 RK |
237 | .phys_io = S3C2410_PA_UART, |
238 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, | |
239 | .boot_params = S3C2410_SDRAM_PA + 0x100, | |
240 | .map_io = h1940_map_io, | |
241 | .init_irq = h1940_init_irq, | |
71a9c424 | 242 | .init_machine = h1940_init, |
1da177e4 LT |
243 | .timer = &s3c24xx_timer, |
244 | MACHINE_END |