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1da177e4 LT |
1 | /* linux/arch/arm/mach-s3c2410/mach-h1940.c |
2 | * | |
3 | * Copyright (c) 2003-2005 Simtec Electronics | |
4 | * Ben Dooks <ben@simtec.co.uk> | |
5 | * | |
6 | * http://www.handhelds.org/projects/h1940.html | |
7 | * | |
8 | * This program is free software; you can redistribute it and/or modify | |
9 | * it under the terms of the GNU General Public License version 2 as | |
10 | * published by the Free Software Foundation. | |
11 | * | |
1da177e4 LT |
12 | */ |
13 | ||
14 | #include <linux/kernel.h> | |
15 | #include <linux/types.h> | |
16 | #include <linux/interrupt.h> | |
17 | #include <linux/list.h> | |
8d717a52 | 18 | #include <linux/memblock.h> |
1da177e4 LT |
19 | #include <linux/timer.h> |
20 | #include <linux/init.h> | |
333a42e1 | 21 | #include <linux/sysdev.h> |
b6d1f542 | 22 | #include <linux/serial_core.h> |
d052d1be | 23 | #include <linux/platform_device.h> |
fced80c7 | 24 | #include <linux/io.h> |
3909b9f7 | 25 | #include <linux/gpio.h> |
22e649ff | 26 | #include <linux/pwm_backlight.h> |
27 | #include <video/platform_lcd.h> | |
3909b9f7 | 28 | |
29 | #include <linux/mmc/host.h> | |
1da177e4 LT |
30 | |
31 | #include <asm/mach/arch.h> | |
32 | #include <asm/mach/map.h> | |
33 | #include <asm/mach/irq.h> | |
34 | ||
a09e64fb | 35 | #include <mach/hardware.h> |
1da177e4 LT |
36 | #include <asm/irq.h> |
37 | #include <asm/mach-types.h> | |
38 | ||
a2b7ba9c | 39 | #include <plat/regs-serial.h> |
a09e64fb | 40 | #include <mach/regs-lcd.h> |
a09e64fb | 41 | #include <mach/regs-clock.h> |
f92273c1 | 42 | |
3909b9f7 | 43 | #include <mach/regs-gpio.h> |
44 | #include <mach/gpio-fns.h> | |
45 | #include <mach/gpio-nrs.h> | |
46 | ||
a09e64fb RK |
47 | #include <mach/h1940.h> |
48 | #include <mach/h1940-latch.h> | |
49 | #include <mach/fb.h> | |
57bd4b91 | 50 | #include <plat/udc.h> |
3e1b776c | 51 | #include <plat/iic.h> |
1da177e4 | 52 | |
40b956f0 | 53 | #include <plat/gpio-cfg.h> |
d5120ae7 | 54 | #include <plat/clock.h> |
a2b7ba9c BD |
55 | #include <plat/devs.h> |
56 | #include <plat/cpu.h> | |
e24b864a | 57 | #include <plat/pll.h> |
a2b7ba9c | 58 | #include <plat/pm.h> |
3909b9f7 | 59 | #include <plat/mci.h> |
73e59b1d | 60 | #include <plat/ts.h> |
1da177e4 | 61 | |
14477095 VK |
62 | #define H1940_LATCH ((void __force __iomem *)0xF8000000) |
63 | ||
64 | #define H1940_PA_LATCH S3C2410_CS2 | |
65 | ||
66 | #define H1940_LATCH_BIT(x) (1 << ((x) + 16 - S3C_GPIO_END)) | |
67 | ||
1da177e4 | 68 | static struct map_desc h1940_iodesc[] __initdata = { |
e1981680 BD |
69 | [0] = { |
70 | .virtual = (unsigned long)H1940_LATCH, | |
71 | .pfn = __phys_to_pfn(H1940_PA_LATCH), | |
72 | .length = SZ_16K, | |
73 | .type = MT_DEVICE | |
74 | }, | |
1da177e4 LT |
75 | }; |
76 | ||
77 | #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK | |
78 | #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB | |
79 | #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE | |
80 | ||
66a9b49a | 81 | static struct s3c2410_uartcfg h1940_uartcfgs[] __initdata = { |
1da177e4 LT |
82 | [0] = { |
83 | .hwport = 0, | |
84 | .flags = 0, | |
85 | .ucon = 0x3c5, | |
86 | .ulcon = 0x03, | |
87 | .ufcon = 0x51, | |
88 | }, | |
89 | [1] = { | |
90 | .hwport = 1, | |
91 | .flags = 0, | |
92 | .ucon = 0x245, | |
93 | .ulcon = 0x03, | |
94 | .ufcon = 0x00, | |
95 | }, | |
96 | /* IR port */ | |
97 | [2] = { | |
98 | .hwport = 2, | |
99 | .flags = 0, | |
100 | .uart_flags = UPF_CONS_FLOW, | |
101 | .ucon = 0x3c5, | |
102 | .ulcon = 0x43, | |
103 | .ufcon = 0x51, | |
104 | } | |
105 | }; | |
106 | ||
e1981680 BD |
107 | /* Board control latch control */ |
108 | ||
14477095 VK |
109 | static unsigned int latch_state = H1940_LATCH_BIT(H1940_LATCH_LCD_P4) | |
110 | H1940_LATCH_BIT(H1940_LATCH_SM803_ENABLE) | | |
111 | H1940_LATCH_BIT(H1940_LATCH_SDQ1) | | |
112 | H1940_LATCH_BIT(H1940_LATCH_LCD_P1) | | |
113 | H1940_LATCH_BIT(H1940_LATCH_LCD_P2) | | |
114 | H1940_LATCH_BIT(H1940_LATCH_LCD_P3) | | |
115 | H1940_LATCH_BIT(H1940_LATCH_MAX1698_nSHUTDOWN) | | |
116 | H1940_LATCH_BIT(H1940_LATCH_CPUQ5); | |
e1981680 | 117 | |
14477095 | 118 | static void h1940_latch_control(unsigned int clear, unsigned int set) |
e1981680 BD |
119 | { |
120 | unsigned long flags; | |
121 | ||
122 | local_irq_save(flags); | |
123 | ||
124 | latch_state &= ~clear; | |
125 | latch_state |= set; | |
126 | ||
127 | __raw_writel(latch_state, H1940_LATCH); | |
128 | ||
129 | local_irq_restore(flags); | |
130 | } | |
131 | ||
14477095 VK |
132 | static inline int h1940_gpiolib_to_latch(int offset) |
133 | { | |
134 | return 1 << (offset + 16); | |
135 | } | |
136 | ||
137 | static void h1940_gpiolib_latch_set(struct gpio_chip *chip, | |
138 | unsigned offset, int value) | |
139 | { | |
140 | int latch_bit = h1940_gpiolib_to_latch(offset); | |
141 | ||
142 | h1940_latch_control(value ? 0 : latch_bit, | |
143 | value ? latch_bit : 0); | |
144 | } | |
145 | ||
146 | static int h1940_gpiolib_latch_output(struct gpio_chip *chip, | |
147 | unsigned offset, int value) | |
148 | { | |
149 | h1940_gpiolib_latch_set(chip, offset, value); | |
150 | return 0; | |
151 | } | |
152 | ||
153 | static int h1940_gpiolib_latch_get(struct gpio_chip *chip, | |
154 | unsigned offset) | |
155 | { | |
156 | return (latch_state >> (offset + 16)) & 1; | |
157 | } | |
158 | ||
159 | struct gpio_chip h1940_latch_gpiochip = { | |
160 | .base = H1940_LATCH_GPIO(0), | |
161 | .owner = THIS_MODULE, | |
162 | .label = "H1940_LATCH", | |
163 | .ngpio = 16, | |
164 | .direction_output = h1940_gpiolib_latch_output, | |
165 | .set = h1940_gpiolib_latch_set, | |
166 | .get = h1940_gpiolib_latch_get, | |
167 | }; | |
1da177e4 | 168 | |
71a9c424 AP |
169 | static void h1940_udc_pullup(enum s3c2410_udc_cmd_e cmd) |
170 | { | |
171 | printk(KERN_DEBUG "udc: pullup(%d)\n",cmd); | |
172 | ||
173 | switch (cmd) | |
174 | { | |
175 | case S3C2410_UDC_P_ENABLE : | |
14477095 | 176 | gpio_set_value(H1940_LATCH_USB_DP, 1); |
71a9c424 AP |
177 | break; |
178 | case S3C2410_UDC_P_DISABLE : | |
14477095 | 179 | gpio_set_value(H1940_LATCH_USB_DP, 0); |
71a9c424 AP |
180 | break; |
181 | case S3C2410_UDC_P_RESET : | |
182 | break; | |
183 | default: | |
184 | break; | |
185 | } | |
186 | } | |
187 | ||
188 | static struct s3c2410_udc_mach_info h1940_udc_cfg __initdata = { | |
189 | .udc_command = h1940_udc_pullup, | |
070276d5 | 190 | .vbus_pin = S3C2410_GPG(5), |
71a9c424 AP |
191 | .vbus_pin_inverted = 1, |
192 | }; | |
193 | ||
ce8877b5 AP |
194 | static struct s3c2410_ts_mach_info h1940_ts_cfg __initdata = { |
195 | .delay = 10000, | |
196 | .presc = 49, | |
197 | .oversampling_shift = 2, | |
5bfdca14 | 198 | .cfg_gpio = s3c24xx_ts_cfg_gpio, |
ce8877b5 | 199 | }; |
71a9c424 | 200 | |
f92273c1 AP |
201 | /** |
202 | * Set lcd on or off | |
203 | **/ | |
09fe75f6 | 204 | static struct s3c2410fb_display h1940_lcd __initdata = { |
f28ef573 KH |
205 | .lcdcon5= S3C2410_LCDCON5_FRM565 | \ |
206 | S3C2410_LCDCON5_INVVLINE | \ | |
207 | S3C2410_LCDCON5_HWSWP, | |
09fe75f6 | 208 | |
1f411537 | 209 | .type = S3C2410_LCDCON1_TFT, |
09fe75f6 KH |
210 | .width = 240, |
211 | .height = 320, | |
69816699 | 212 | .pixclock = 260000, |
09fe75f6 KH |
213 | .xres = 240, |
214 | .yres = 320, | |
215 | .bpp = 16, | |
26be1b7b MS |
216 | .left_margin = 8, |
217 | .right_margin = 20, | |
93d11f5a | 218 | .hsync_len = 4, |
5f20f69b KH |
219 | .upper_margin = 8, |
220 | .lower_margin = 7, | |
93d11f5a | 221 | .vsync_len = 1, |
09fe75f6 KH |
222 | }; |
223 | ||
224 | static struct s3c2410fb_mach_info h1940_fb_info __initdata = { | |
09fe75f6 KH |
225 | .displays = &h1940_lcd, |
226 | .num_displays = 1, | |
227 | .default_display = 0, | |
228 | ||
f92273c1 AP |
229 | .lpcsel= 0x02, |
230 | .gpccon= 0xaa940659, | |
231 | .gpccon_mask= 0xffffffff, | |
232 | .gpcup= 0x0000ffff, | |
233 | .gpcup_mask= 0xffffffff, | |
234 | .gpdcon= 0xaa84aaa0, | |
235 | .gpdcon_mask= 0xffffffff, | |
236 | .gpdup= 0x0000faff, | |
237 | .gpdup_mask= 0xffffffff, | |
f92273c1 | 238 | }; |
1da177e4 | 239 | |
ff34aaa9 | 240 | static struct platform_device h1940_device_leds = { |
d2a76020 AP |
241 | .name = "h1940-leds", |
242 | .id = -1, | |
243 | }; | |
244 | ||
ff34aaa9 | 245 | static struct platform_device h1940_device_bluetooth = { |
7fdc7849 AP |
246 | .name = "h1940-bt", |
247 | .id = -1, | |
248 | }; | |
249 | ||
22c810ab | 250 | static struct s3c24xx_mci_pdata h1940_mmc_cfg __initdata = { |
3909b9f7 | 251 | .gpio_detect = S3C2410_GPF(5), |
252 | .gpio_wprotect = S3C2410_GPH(8), | |
253 | .set_power = NULL, | |
254 | .ocr_avail = MMC_VDD_32_33, | |
255 | }; | |
256 | ||
22e649ff | 257 | static int h1940_backlight_init(struct device *dev) |
258 | { | |
259 | gpio_request(S3C2410_GPB(0), "Backlight"); | |
260 | ||
db61ac54 | 261 | gpio_direction_output(S3C2410_GPB(0), 0); |
fb378747 | 262 | s3c_gpio_setpull(S3C2410_GPB(0), S3C_GPIO_PULL_NONE); |
40b956f0 | 263 | s3c_gpio_cfgpin(S3C2410_GPB(0), S3C2410_GPB0_TOUT0); |
22e649ff | 264 | |
265 | return 0; | |
266 | } | |
267 | ||
268 | static void h1940_backlight_exit(struct device *dev) | |
269 | { | |
db61ac54 | 270 | gpio_direction_output(S3C2410_GPB(0), 1); |
22e649ff | 271 | } |
272 | ||
273 | static struct platform_pwm_backlight_data backlight_data = { | |
274 | .pwm_id = 0, | |
275 | .max_brightness = 100, | |
276 | .dft_brightness = 50, | |
277 | /* tcnt = 0x31 */ | |
278 | .pwm_period_ns = 36296, | |
279 | .init = h1940_backlight_init, | |
280 | .exit = h1940_backlight_exit, | |
281 | }; | |
282 | ||
283 | static struct platform_device h1940_backlight = { | |
284 | .name = "pwm-backlight", | |
285 | .dev = { | |
286 | .parent = &s3c_device_timer[0].dev, | |
287 | .platform_data = &backlight_data, | |
288 | }, | |
289 | .id = -1, | |
290 | }; | |
291 | ||
292 | static void h1940_lcd_power_set(struct plat_lcd_data *pd, | |
293 | unsigned int power) | |
294 | { | |
295 | int value; | |
296 | ||
297 | if (!power) { | |
298 | /* set to 3ec */ | |
db61ac54 | 299 | gpio_direction_output(S3C2410_GPC(0), 0); |
22e649ff | 300 | /* wait for 3ac */ |
301 | do { | |
db61ac54 | 302 | value = gpio_get_value(S3C2410_GPC(6)); |
22e649ff | 303 | } while (value); |
304 | /* set to 38c */ | |
db61ac54 | 305 | gpio_direction_output(S3C2410_GPC(5), 0); |
22e649ff | 306 | } else { |
307 | /* Set to 3ac */ | |
db61ac54 | 308 | gpio_direction_output(S3C2410_GPC(5), 1); |
22e649ff | 309 | /* Set to 3ad */ |
db61ac54 | 310 | gpio_direction_output(S3C2410_GPC(0), 1); |
22e649ff | 311 | } |
312 | } | |
313 | ||
314 | static struct plat_lcd_data h1940_lcd_power_data = { | |
315 | .set_power = h1940_lcd_power_set, | |
316 | }; | |
317 | ||
318 | static struct platform_device h1940_lcd_powerdev = { | |
319 | .name = "platform-lcd", | |
320 | .dev.parent = &s3c_device_lcd.dev, | |
321 | .dev.platform_data = &h1940_lcd_power_data, | |
322 | }; | |
323 | ||
1da177e4 | 324 | static struct platform_device *h1940_devices[] __initdata = { |
b813248c | 325 | &s3c_device_ohci, |
1da177e4 LT |
326 | &s3c_device_lcd, |
327 | &s3c_device_wdt, | |
3e1b776c | 328 | &s3c_device_i2c0, |
1da177e4 | 329 | &s3c_device_iis, |
71a9c424 | 330 | &s3c_device_usbgadget, |
ff34aaa9 BD |
331 | &h1940_device_leds, |
332 | &h1940_device_bluetooth, | |
3909b9f7 | 333 | &s3c_device_sdi, |
13733d52 | 334 | &s3c_device_rtc, |
22e649ff | 335 | &s3c_device_timer[0], |
336 | &h1940_backlight, | |
337 | &h1940_lcd_powerdev, | |
17dcd13a AP |
338 | &s3c_device_adc, |
339 | &s3c_device_ts, | |
1da177e4 LT |
340 | }; |
341 | ||
5fe10ab1 | 342 | static void __init h1940_map_io(void) |
1da177e4 LT |
343 | { |
344 | s3c24xx_init_io(h1940_iodesc, ARRAY_SIZE(h1940_iodesc)); | |
345 | s3c24xx_init_clocks(0); | |
346 | s3c24xx_init_uarts(h1940_uartcfgs, ARRAY_SIZE(h1940_uartcfgs)); | |
9073341c BD |
347 | |
348 | /* setup PM */ | |
349 | ||
b1dfe1f1 | 350 | #ifdef CONFIG_PM_H1940 |
9073341c | 351 | memcpy(phys_to_virt(H1940_SUSPEND_RESUMEAT), h1940_pm_return, 1024); |
b1dfe1f1 | 352 | #endif |
4e59c25d | 353 | s3c_pm_init(); |
14477095 VK |
354 | |
355 | WARN_ON(gpiochip_add(&h1940_latch_gpiochip)); | |
1da177e4 LT |
356 | } |
357 | ||
98c672cf RK |
358 | /* H1940 and RX3715 need to reserve this for suspend */ |
359 | static void __init h1940_reserve(void) | |
360 | { | |
8d717a52 RK |
361 | memblock_reserve(0x30003000, 0x1000); |
362 | memblock_reserve(0x30081000, 0x1000); | |
98c672cf RK |
363 | } |
364 | ||
5fe10ab1 | 365 | static void __init h1940_init_irq(void) |
1da177e4 LT |
366 | { |
367 | s3c24xx_init_irq(); | |
1da177e4 LT |
368 | } |
369 | ||
5fe10ab1 | 370 | static void __init h1940_init(void) |
f92273c1 | 371 | { |
71a9c424 AP |
372 | u32 tmp; |
373 | ||
09fe75f6 | 374 | s3c24xx_fb_set_platdata(&h1940_fb_info); |
22c810ab | 375 | s3c24xx_mci_set_platdata(&h1940_mmc_cfg); |
71a9c424 | 376 | s3c24xx_udc_set_platdata(&h1940_udc_cfg); |
ce8877b5 | 377 | s3c24xx_ts_set_platdata(&h1940_ts_cfg); |
3e1b776c | 378 | s3c_i2c0_set_platdata(NULL); |
71a9c424 AP |
379 | |
380 | /* Turn off suspend on both USB ports, and switch the | |
381 | * selectable USB port to USB device mode. */ | |
382 | ||
383 | s3c2410_modify_misccr(S3C2410_MISCCR_USBHOST | | |
384 | S3C2410_MISCCR_USBSUSPND0 | | |
385 | S3C2410_MISCCR_USBSUSPND1, 0x0); | |
386 | ||
e24b864a BD |
387 | tmp = (0x78 << S3C24XX_PLLCON_MDIVSHIFT) |
388 | | (0x02 << S3C24XX_PLLCON_PDIVSHIFT) | |
389 | | (0x03 << S3C24XX_PLLCON_SDIVSHIFT); | |
71a9c424 | 390 | writel(tmp, S3C2410_UPLLCON); |
57e5171c | 391 | |
22e649ff | 392 | gpio_request(S3C2410_GPC(0), "LCD power"); |
393 | gpio_request(S3C2410_GPC(5), "LCD power"); | |
394 | gpio_request(S3C2410_GPC(6), "LCD power"); | |
db61ac54 | 395 | gpio_direction_input(S3C2410_GPC(6)); |
22e649ff | 396 | |
14477095 VK |
397 | gpio_request(H1940_LATCH_USB_DP, "USB pullup"); |
398 | gpio_direction_output(H1940_LATCH_USB_DP, 0); | |
399 | ||
57e5171c | 400 | platform_add_devices(h1940_devices, ARRAY_SIZE(h1940_devices)); |
f92273c1 AP |
401 | } |
402 | ||
1da177e4 | 403 | MACHINE_START(H1940, "IPAQ-H1940") |
afdd225d | 404 | /* Maintainer: Ben Dooks <ben-linux@fluff.org> */ |
e9dea0c6 RK |
405 | .phys_io = S3C2410_PA_UART, |
406 | .io_pg_offst = (((u32)S3C24XX_VA_UART) >> 18) & 0xfffc, | |
407 | .boot_params = S3C2410_SDRAM_PA + 0x100, | |
408 | .map_io = h1940_map_io, | |
98c672cf | 409 | .reserve = h1940_reserve, |
e9dea0c6 | 410 | .init_irq = h1940_init_irq, |
71a9c424 | 411 | .init_machine = h1940_init, |
1da177e4 LT |
412 | .timer = &s3c24xx_timer, |
413 | MACHINE_END |